Add support for DCN2 DSC (Display Stream Compression)
HW Blocks:
 +--------++------+       +----------+
 | HUBBUB || HUBP |  <--  | MMHUBBUB |
 +--------++------+       +----------+
        |                     ^
        v                     |
    +--------+            +--------+
    |  DPP   |            |  DWB   |
    +--------+            +--------+
        |
        v                      ^
    +--------+                 |
    |  MPC   |                 |
    +--------+                 |
        |                      |
        v                      |
    +-------+      +-------+   |
    |  OPP  | <--> |  DSC  |   |
    +-------+      +-------+   |
        |                      |
        v                      |
    +--------+                /
    |  OPTC  |  --------------
    +--------+
        |
        v
    +--------+       +--------+
    |  DIO   |       |  DCCG  |
    +--------+       +--------+
v2: rebase (Alex)
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
		
	
			
		
			
				
	
	
		
			141 lines
		
	
	
		
			3.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			141 lines
		
	
	
		
			3.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright 2012-15 Advanced Micro Devices, Inc.
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|  *
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|  * Permission is hereby granted, free of charge, to any person obtaining a
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|  * copy of this software and associated documentation files (the "Software"),
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|  * to deal in the Software without restriction, including without limitation
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|  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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|  * and/or sell copies of the Software, and to permit persons to whom the
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|  * Software is furnished to do so, subject to the following conditions:
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|  *
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|  * The above copyright notice and this permission notice shall be included in
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|  * all copies or substantial portions of the Software.
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|  *
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|  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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|  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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|  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
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|  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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|  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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|  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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|  * OTHER DEALINGS IN THE SOFTWARE.
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|  *
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|  * Authors: AMD
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|  *
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|  */
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| 
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| /**
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|  * This file defines helper functions provided by the Display Manager to
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|  * Display Core.
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|  */
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| #ifndef __DM_HELPERS__
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| #define __DM_HELPERS__
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| 
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| #include "dc_types.h"
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| #include "dc.h"
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| 
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| struct dp_mst_stream_allocation_table;
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| 
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| enum dc_edid_status dm_helpers_parse_edid_caps(
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| 	struct dc_context *ctx,
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| 	const struct dc_edid *edid,
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| 	struct dc_edid_caps *edid_caps);
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| 
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| 
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| /*
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|  * Update DP branch info
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|  */
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| void dm_helpers_dp_update_branch_info(
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| 		struct dc_context *ctx,
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| 		const struct dc_link *link);
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| 
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| /*
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|  * Writes payload allocation table in immediate downstream device.
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|  */
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| bool dm_helpers_dp_mst_write_payload_allocation_table(
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| 		struct dc_context *ctx,
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| 		const struct dc_stream_state *stream,
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| 		struct dp_mst_stream_allocation_table *proposed_table,
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| 		bool enable);
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| 
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| /*
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|  * poll pending down reply
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|  */
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| void dm_helpers_dp_mst_poll_pending_down_reply(
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| 	struct dc_context *ctx,
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| 	const struct dc_link *link);
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| 
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| /*
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|  * Clear payload allocation table before enable MST DP link.
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|  */
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| void dm_helpers_dp_mst_clear_payload_allocation_table(
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| 	struct dc_context *ctx,
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| 	const struct dc_link *link);
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| 
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| /*
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|  * Polls for ACT (allocation change trigger) handled and
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|  */
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| bool dm_helpers_dp_mst_poll_for_allocation_change_trigger(
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| 		struct dc_context *ctx,
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| 		const struct dc_stream_state *stream);
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| /*
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|  * Sends ALLOCATE_PAYLOAD message.
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|  */
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| bool dm_helpers_dp_mst_send_payload_allocation(
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| 		struct dc_context *ctx,
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| 		const struct dc_stream_state *stream,
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| 		bool enable);
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| 
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| bool dm_helpers_dp_mst_start_top_mgr(
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| 		struct dc_context *ctx,
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| 		const struct dc_link *link,
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| 		bool boot);
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| 
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| void dm_helpers_dp_mst_stop_top_mgr(
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| 		struct dc_context *ctx,
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| 		const struct dc_link *link);
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| /**
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|  * OS specific aux read callback.
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|  */
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| bool dm_helpers_dp_read_dpcd(
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| 		struct dc_context *ctx,
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| 		const struct dc_link *link,
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| 		uint32_t address,
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| 		uint8_t *data,
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| 		uint32_t size);
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| 
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| /**
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|  * OS specific aux write callback.
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|  */
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| bool dm_helpers_dp_write_dpcd(
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| 		struct dc_context *ctx,
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| 		const struct dc_link *link,
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| 		uint32_t address,
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| 		const uint8_t *data,
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| 		uint32_t size);
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| 
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| bool dm_helpers_submit_i2c(
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| 		struct dc_context *ctx,
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| 		const struct dc_link *link,
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| 		struct i2c_command *cmd);
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| 
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| #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
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| bool dm_helpers_dp_write_dsc_enable(
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| 		struct dc_context *ctx,
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| 		const struct dc_stream_state *stream,
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| 		bool enable
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| );
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| #endif
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| bool dm_helpers_is_dp_sink_present(
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| 		struct dc_link *link);
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| 
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| enum dc_edid_status dm_helpers_read_local_edid(
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| 		struct dc_context *ctx,
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| 		struct dc_link *link,
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| 		struct dc_sink *sink);
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| 
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| void dm_set_dcn_clocks(
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| 		struct dc_context *ctx,
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| 		struct dc_clocks *clks);
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| 
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| #endif /* __DM_HELPERS__ */
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