Add support for the scv instruction on POWER9 and later CPUs. For now this implements the zeroth scv vector 'scv 0', as identical to 'sc' system calls, with the exception that LR is not preserved, nor are volatile CR registers, and error is not indicated with CR0[SO], but by returning a negative errno. rfscv is implemented to return from scv type system calls. It can not be used to return from sc system calls because those are defined to preserve LR. getpid syscall throughput on POWER9 is improved by 26% (428 to 318 cycles), largely due to reducing mtmsr and mtspr. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> [mpe: Fix ppc64e build] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20200611081203.995112-3-npiggin@gmail.com
81 lines
2.3 KiB
C
81 lines
2.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_POWERPC_SETUP_H
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#define _ASM_POWERPC_SETUP_H
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#include <uapi/asm/setup.h>
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#ifndef __ASSEMBLY__
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extern void ppc_printk_progress(char *s, unsigned short hex);
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extern unsigned int rtas_data;
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extern unsigned long long memory_limit;
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extern bool init_mem_is_free;
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extern unsigned long klimit;
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extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask);
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struct device_node;
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extern void note_scsi_host(struct device_node *, void *);
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/* Used in very early kernel initialization. */
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extern unsigned long reloc_offset(void);
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extern unsigned long add_reloc_offset(unsigned long);
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extern void reloc_got2(unsigned long);
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#define PTRRELOC(x) ((typeof(x)) add_reloc_offset((unsigned long)(x)))
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void check_for_initrd(void);
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void mem_topology_setup(void);
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void initmem_init(void);
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void setup_panic(void);
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#define ARCH_PANIC_TIMEOUT 180
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#ifdef CONFIG_PPC_PSERIES
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extern bool pseries_enable_reloc_on_exc(void);
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extern void pseries_disable_reloc_on_exc(void);
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extern void pseries_big_endian_exceptions(void);
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extern void pseries_little_endian_exceptions(void);
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#else
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static inline bool pseries_enable_reloc_on_exc(void) { return false; }
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static inline void pseries_disable_reloc_on_exc(void) {}
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static inline void pseries_big_endian_exceptions(void) {}
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static inline void pseries_little_endian_exceptions(void) {}
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#endif /* CONFIG_PPC_PSERIES */
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void rfi_flush_enable(bool enable);
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/* These are bit flags */
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enum l1d_flush_type {
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L1D_FLUSH_NONE = 0x1,
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L1D_FLUSH_FALLBACK = 0x2,
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L1D_FLUSH_ORI = 0x4,
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L1D_FLUSH_MTTRIG = 0x8,
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};
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void setup_rfi_flush(enum l1d_flush_type, bool enable);
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void do_rfi_flush_fixups(enum l1d_flush_type types);
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#ifdef CONFIG_PPC_BARRIER_NOSPEC
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void setup_barrier_nospec(void);
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#else
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static inline void setup_barrier_nospec(void) { };
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#endif
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void do_barrier_nospec_fixups(bool enable);
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extern bool barrier_nospec_enabled;
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#ifdef CONFIG_PPC_BARRIER_NOSPEC
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void do_barrier_nospec_fixups_range(bool enable, void *start, void *end);
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#else
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static inline void do_barrier_nospec_fixups_range(bool enable, void *start, void *end) { };
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#endif
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#ifdef CONFIG_PPC_FSL_BOOK3E
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void setup_spectre_v2(void);
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#else
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static inline void setup_spectre_v2(void) {};
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#endif
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void do_btb_flush_fixups(void);
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#endif /* !__ASSEMBLY__ */
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#endif /* _ASM_POWERPC_SETUP_H */
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