forked from Minki/linux
cb38c569e5
Patch from Richard Purdie Add a function to allow machines to set the parent of the pxa framebuffer device. This means the power up/down sequence can be controlled where required by the machine. Update spitz to use the new function, fixing a compile error. Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
71 lines
2.1 KiB
C
71 lines
2.1 KiB
C
/*
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* linux/include/asm-arm/arch-pxa/pxafb.h
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*
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* Support for the xscale frame buffer.
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*
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* Author: Jean-Frederic Clere
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* Created: Sep 22, 2003
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* Copyright: jfclere@sinix.net
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/*
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* This structure describes the machine which we are running on.
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* It is set in linux/arch/arm/mach-pxa/machine_name.c and used in the probe routine
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* of linux/drivers/video/pxafb.c
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*/
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struct pxafb_mach_info {
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u_long pixclock;
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u_short xres;
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u_short yres;
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u_char bpp;
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u_char hsync_len;
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u_char left_margin;
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u_char right_margin;
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u_char vsync_len;
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u_char upper_margin;
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u_char lower_margin;
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u_char sync;
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u_int cmap_greyscale:1,
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cmap_inverse:1,
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cmap_static:1,
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unused:29;
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/* The following should be defined in LCCR0
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* LCCR0_Act or LCCR0_Pas Active or Passive
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* LCCR0_Sngl or LCCR0_Dual Single/Dual panel
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* LCCR0_Mono or LCCR0_Color Mono/Color
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* LCCR0_4PixMono or LCCR0_8PixMono (in mono single mode)
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* LCCR0_DMADel(Tcpu) (optional) DMA request delay
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*
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* The following should not be defined in LCCR0:
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* LCCR0_OUM, LCCR0_BM, LCCR0_QDM, LCCR0_DIS, LCCR0_EFM
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* LCCR0_IUM, LCCR0_SFM, LCCR0_LDM, LCCR0_ENB
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*/
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u_int lccr0;
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/* The following should be defined in LCCR3
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* LCCR3_OutEnH or LCCR3_OutEnL Output enable polarity
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* LCCR3_PixRsEdg or LCCR3_PixFlEdg Pixel clock edge type
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* LCCR3_Acb(X) AB Bias pin frequency
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* LCCR3_DPC (optional) Double Pixel Clock mode (untested)
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*
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* The following should not be defined in LCCR3
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* LCCR3_HSP, LCCR3_VSP, LCCR0_Pcd(x), LCCR3_Bpp
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*/
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u_int lccr3;
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void (*pxafb_backlight_power)(int);
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void (*pxafb_lcd_power)(int);
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};
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void set_pxa_fb_info(struct pxafb_mach_info *hard_pxa_fb_info);
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void set_pxa_fb_parent(struct device *parent_dev);
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unsigned long pxafb_get_hsync_time(struct device *dev);
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