leandrof/linux
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
1f6ccfff63
linux/arch/arc/mm
History
Vineet Gupta 1f6ccfff63 ARCv2: Support for ARCv2 ISA and HS38x cores 
The notable features are:
    - SMP configurations of upto 4 cores with coherency
    - Optional L2 Cache and IO-Coherency
    - Revised Interrupt Architecture (multiple priorites, reg banks,
        auto stack switch, auto regfile save/restore)
    - MMUv4 (PIPT dcache, Huge Pages)
    - Instructions for
	* 64bit load/store: LDD, STD
	* Hardware assisted divide/remainder: DIV, REM
	* Function prologue/epilogue: ENTER_S, LEAVE_S
	* IRQ enable/disable: CLRI, SETI
	* pop count: FFS, FLS
	* SETcc, BMSKN, XBFU...

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-06-22 14:06:55 +05:30
..
cache.c ARC: untangle cache flush loop 2015-06-19 18:09:33 +05:30
dma.c ARC: remove the unused platform helpers from dma mapping API 2015-06-19 18:09:23 +05:30
extable.c ARC: Fix coding style issues 2013-04-09 12:21:14 +05:30
fault.c ARC: perf: Enable generic software events 2015-02-27 10:15:01 +05:30
init.c ARC: mem init spring cleaning - No functional changes 2015-04-13 15:16:29 +05:30
ioremap.c ARC: Use <linux/*> headers instead of <asm/*> 2013-04-09 12:21:14 +05:30
Makefile ARC: mm/cache_arc700.c -> mm/cache.c 2015-06-19 18:09:32 +05:30
mmap.c ARC: [mm] Aliasing VIPT dcache support 4/4 2013-05-09 22:00:57 +05:30
tlb.c ARC: compress cpuinfo_arc_mmu (mainly save page size in KB) 2015-06-19 18:09:25 +05:30
tlbex.S ARCv2: Support for ARCv2 ISA and HS38x cores 2015-06-22 14:06:55 +05:30