linux/drivers/pinctrl/intel
Andy Shevchenko 17fab47369 pinctrl: intel: Set pin direction properly
There are two bits in the PADCFG0 register to configure direction, one per
TX/RX buffers.

For now we wrongly assume that the GPIO is always requested before it is being
used, which is not true when the GPIO is used through irqchip. In this case the
GPIO is never requested and we never enable RX buffer for it.

Fix this by setting both bits accordingly.

Reported-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-11 13:49:05 +01:00
..
Kconfig pinctrl: intel: Add Intel Merrifield pin controller support 2016-06-29 09:59:35 +02:00
Makefile pinctrl: intel: Add Intel Merrifield pin controller support 2016-06-29 09:59:35 +02:00
pinctrl-baytrail.c pinctrl: intel: set default handler to be handle_bad_irq() 2016-12-07 15:26:59 +01:00
pinctrl-broxton.c pinctrl: broxton: Use correct PADCFGLOCK offset 2017-01-11 13:47:11 +01:00
pinctrl-cherryview.c Bulk pin control changes for the v4.10 kernel cycle: 2016-12-13 07:59:10 -08:00
pinctrl-intel.c pinctrl: intel: Set pin direction properly 2017-01-11 13:49:05 +01:00
pinctrl-intel.h pinctrl: intel: fix bug of register offset calculation 2015-12-10 23:01:41 +01:00
pinctrl-merrifield.c pinctrl: intel: merrifield: Add pin config group handlers 2016-10-29 10:33:47 +02:00
pinctrl-sunrisepoint.c pinctrl: intel: fix bug of register offset calculation 2015-12-10 23:01:41 +01:00