0587e9aa04
As of commit 5451781dad ("regulator: core: Only count load for
enabled consumers"), a load isn't counted for a disabled
regulator. That means all the code in the DSI driver to specify and
set loads before disabling a regulator is not actually doing anything
useful. Let's remove it.
It should be noted that all of the loads set that were being specified
were pointless noise anyway. The only use for this number is to pick
between low power and high power modes of regulators. Regulators
appear to do this changeover at loads on the order of 10000 uA. You
would need a lot of clients of the same rail for that 100 uA number to
count for anything.
Note that now that we get rid of the setting of the load at disable
time, we can just set the load once when we first get the regulator
and then forget it.
It should also be noted that the regulator functions
regulator_bulk_enable() and regulator_set_load() already print error
messages when they encounter problems so while moving things around we
get rid of some extra error prints.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/496320/
Link: https://lore.kernel.org/r/20220804073608.v4.3.If1f94fbbdb7c1d0fb3961de61483a851ad1971a7@changeid
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
326 lines
8.5 KiB
C
326 lines
8.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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*/
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#include "dsi_cfg.h"
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static const char * const dsi_v2_bus_clk_names[] = {
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"core_mmss", "iface", "bus",
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};
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static const struct msm_dsi_config apq8064_dsi_cfg = {
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.io_offset = 0,
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.reg_cfg = {
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.num = 3,
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.regs = {
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{"vdda", 100000}, /* 1.2 V */
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{"avdd", 10000}, /* 3.0 V */
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{"vddio", 100000}, /* 1.8 V */
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},
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},
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.bus_clk_names = dsi_v2_bus_clk_names,
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.num_bus_clks = ARRAY_SIZE(dsi_v2_bus_clk_names),
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.io_start = { 0x4700000, 0x5800000 },
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.num_dsi = 2,
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};
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static const char * const dsi_6g_bus_clk_names[] = {
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"mdp_core", "iface", "bus", "core_mmss",
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};
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static const struct msm_dsi_config msm8974_apq8084_dsi_cfg = {
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 3,
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.regs = {
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{"vdd", 150000}, /* 3.0 V */
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{"vdda", 100000}, /* 1.2 V */
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{"vddio", 100000}, /* 1.8 V */
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},
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},
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.bus_clk_names = dsi_6g_bus_clk_names,
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.num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names),
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.io_start = { 0xfd922800, 0xfd922b00 },
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.num_dsi = 2,
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};
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static const char * const dsi_8916_bus_clk_names[] = {
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"mdp_core", "iface", "bus",
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};
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static const struct msm_dsi_config msm8916_dsi_cfg = {
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 2,
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.regs = {
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{"vdda", 100000}, /* 1.2 V */
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{"vddio", 100000}, /* 1.8 V */
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},
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},
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.bus_clk_names = dsi_8916_bus_clk_names,
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.num_bus_clks = ARRAY_SIZE(dsi_8916_bus_clk_names),
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.io_start = { 0x1a98000 },
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.num_dsi = 1,
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};
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static const char * const dsi_8976_bus_clk_names[] = {
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"mdp_core", "iface", "bus",
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};
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static const struct msm_dsi_config msm8976_dsi_cfg = {
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 2,
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.regs = {
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{"vdda", 100000}, /* 1.2 V */
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{"vddio", 100000}, /* 1.8 V */
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},
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},
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.bus_clk_names = dsi_8976_bus_clk_names,
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.num_bus_clks = ARRAY_SIZE(dsi_8976_bus_clk_names),
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.io_start = { 0x1a94000, 0x1a96000 },
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.num_dsi = 2,
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};
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static const struct msm_dsi_config msm8994_dsi_cfg = {
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 6,
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.regs = {
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{"vdda", 100000}, /* 1.25 V */
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{"vddio", 100000}, /* 1.8 V */
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{"vcca", 10000}, /* 1.0 V */
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{"vdd", 100000}, /* 1.8 V */
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{"lab_reg", -1},
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{"ibb_reg", -1},
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},
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},
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.bus_clk_names = dsi_6g_bus_clk_names,
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.num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names),
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.io_start = { 0xfd998000, 0xfd9a0000 },
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.num_dsi = 2,
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};
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static const char * const dsi_8996_bus_clk_names[] = {
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"mdp_core", "iface", "bus", "core_mmss",
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};
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static const struct msm_dsi_config msm8996_dsi_cfg = {
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 3,
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.regs = {
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{"vdda", 18160}, /* 1.25 V */
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{"vcca", 17000}, /* 0.925 V */
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{"vddio", 100000},/* 1.8 V */
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},
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},
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.bus_clk_names = dsi_8996_bus_clk_names,
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.num_bus_clks = ARRAY_SIZE(dsi_8996_bus_clk_names),
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.io_start = { 0x994000, 0x996000 },
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.num_dsi = 2,
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};
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static const char * const dsi_msm8998_bus_clk_names[] = {
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"iface", "bus", "core",
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};
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static const struct msm_dsi_config msm8998_dsi_cfg = {
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 2,
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.regs = {
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{"vdd", 367000}, /* 0.9 V */
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{"vdda", 62800}, /* 1.2 V */
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},
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},
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.bus_clk_names = dsi_msm8998_bus_clk_names,
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.num_bus_clks = ARRAY_SIZE(dsi_msm8998_bus_clk_names),
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.io_start = { 0xc994000, 0xc996000 },
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.num_dsi = 2,
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};
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static const char * const dsi_sdm660_bus_clk_names[] = {
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"iface", "bus", "core", "core_mmss",
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};
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static const struct msm_dsi_config sdm660_dsi_cfg = {
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 1,
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.regs = {
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{"vdda", 12560}, /* 1.2 V */
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},
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},
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.bus_clk_names = dsi_sdm660_bus_clk_names,
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.num_bus_clks = ARRAY_SIZE(dsi_sdm660_bus_clk_names),
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.io_start = { 0xc994000, 0xc996000 },
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.num_dsi = 2,
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};
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static const char * const dsi_sdm845_bus_clk_names[] = {
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"iface", "bus",
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};
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static const char * const dsi_sc7180_bus_clk_names[] = {
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"iface", "bus",
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};
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static const struct msm_dsi_config sdm845_dsi_cfg = {
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 1,
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.regs = {
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{"vdda", 21800}, /* 1.2 V */
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},
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},
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.bus_clk_names = dsi_sdm845_bus_clk_names,
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.num_bus_clks = ARRAY_SIZE(dsi_sdm845_bus_clk_names),
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.io_start = { 0xae94000, 0xae96000 },
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.num_dsi = 2,
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};
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static const struct msm_dsi_config sc7180_dsi_cfg = {
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 1,
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.regs = {
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{"vdda", 21800}, /* 1.2 V */
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},
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},
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.bus_clk_names = dsi_sc7180_bus_clk_names,
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.num_bus_clks = ARRAY_SIZE(dsi_sc7180_bus_clk_names),
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.io_start = { 0xae94000 },
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.num_dsi = 1,
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};
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static const char * const dsi_sc7280_bus_clk_names[] = {
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"iface", "bus",
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};
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static const struct msm_dsi_config sc7280_dsi_cfg = {
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 1,
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.regs = {
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{"vdda", 8350}, /* 1.2 V */
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},
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},
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.bus_clk_names = dsi_sc7280_bus_clk_names,
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.num_bus_clks = ARRAY_SIZE(dsi_sc7280_bus_clk_names),
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.io_start = { 0xae94000 },
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.num_dsi = 1,
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};
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static const char * const dsi_qcm2290_bus_clk_names[] = {
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"iface", "bus",
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};
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static const struct msm_dsi_config qcm2290_dsi_cfg = {
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 1,
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.regs = {
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{"vdda", 21800}, /* 1.2 V */
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},
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},
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.bus_clk_names = dsi_qcm2290_bus_clk_names,
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.num_bus_clks = ARRAY_SIZE(dsi_qcm2290_bus_clk_names),
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.io_start = { 0x5e94000 },
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.num_dsi = 1,
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};
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static const struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = {
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.link_clk_set_rate = dsi_link_clk_set_rate_v2,
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.link_clk_enable = dsi_link_clk_enable_v2,
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.link_clk_disable = dsi_link_clk_disable_v2,
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.clk_init_ver = dsi_clk_init_v2,
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.tx_buf_alloc = dsi_tx_buf_alloc_v2,
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.tx_buf_get = dsi_tx_buf_get_v2,
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.tx_buf_put = NULL,
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.dma_base_get = dsi_dma_base_get_v2,
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.calc_clk_rate = dsi_calc_clk_rate_v2,
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};
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static const struct msm_dsi_host_cfg_ops msm_dsi_6g_host_ops = {
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.link_clk_set_rate = dsi_link_clk_set_rate_6g,
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.link_clk_enable = dsi_link_clk_enable_6g,
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.link_clk_disable = dsi_link_clk_disable_6g,
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.clk_init_ver = NULL,
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.tx_buf_alloc = dsi_tx_buf_alloc_6g,
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.tx_buf_get = dsi_tx_buf_get_6g,
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.tx_buf_put = dsi_tx_buf_put_6g,
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.dma_base_get = dsi_dma_base_get_6g,
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.calc_clk_rate = dsi_calc_clk_rate_6g,
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};
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static const struct msm_dsi_host_cfg_ops msm_dsi_6g_v2_host_ops = {
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.link_clk_set_rate = dsi_link_clk_set_rate_6g,
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.link_clk_enable = dsi_link_clk_enable_6g,
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.link_clk_disable = dsi_link_clk_disable_6g,
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.clk_init_ver = dsi_clk_init_6g_v2,
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.tx_buf_alloc = dsi_tx_buf_alloc_6g,
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.tx_buf_get = dsi_tx_buf_get_6g,
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.tx_buf_put = dsi_tx_buf_put_6g,
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.dma_base_get = dsi_dma_base_get_6g,
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.calc_clk_rate = dsi_calc_clk_rate_6g,
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};
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static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = {
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{MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064,
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&apq8064_dsi_cfg, &msm_dsi_v2_host_ops},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_0,
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&msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1,
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&msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1_1,
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&msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_2,
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&msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3,
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&msm8994_dsi_cfg, &msm_dsi_6g_host_ops},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1,
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&msm8916_dsi_cfg, &msm_dsi_6g_host_ops},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_1,
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&msm8996_dsi_cfg, &msm_dsi_6g_host_ops},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_2,
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&msm8976_dsi_cfg, &msm_dsi_6g_host_ops},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_1_0,
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&sdm660_dsi_cfg, &msm_dsi_6g_v2_host_ops},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_0,
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&msm8998_dsi_cfg, &msm_dsi_6g_v2_host_ops},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_1,
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&sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_3_0,
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&sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_0,
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&sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_1,
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&sc7180_dsi_cfg, &msm_dsi_6g_v2_host_ops},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_5_0,
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&sc7280_dsi_cfg, &msm_dsi_6g_v2_host_ops},
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};
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const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor)
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{
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const struct msm_dsi_cfg_handler *cfg_hnd = NULL;
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int i;
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for (i = ARRAY_SIZE(dsi_cfg_handlers) - 1; i >= 0; i--) {
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if ((dsi_cfg_handlers[i].major == major) &&
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(dsi_cfg_handlers[i].minor == minor)) {
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cfg_hnd = &dsi_cfg_handlers[i];
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break;
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}
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}
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return cfg_hnd;
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}
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/* Non autodetect configs */
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const struct msm_dsi_cfg_handler qcm2290_dsi_cfg_handler = {
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.cfg = &qcm2290_dsi_cfg,
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.ops = &msm_dsi_6g_v2_host_ops,
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};
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