forked from Minki/linux
9e0c42ea3d
- reorganize code for - add support reserve memory for mfc-v7 - consolidate exynos4 and exynos5 machine codes - add generic compatible strings for exynos4 and exynos5 - update DT with generic compatible strings - move clk related dt-binding header file in dt-bindings/clock -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJTK1NAAAoJEA0Cl+kVi2xq8ucP/0Ogcit9IddHzX5yw3wpQ6vS lX+sY15I7gGPplFPF315LFdEkv7N/QExHq5hTexLX5OHH5Teg22VvR91YgoqzhVk 0EL8uE/nKIWv/s5eipMpW9ypCE6HOHhYnjxwSEyQHjPHxgWlrO4r/1/LhlAeRL72 01uCE0sf/+HCEKujQM+i/HvGOIRV1SlNir677NppheM1PvTwlYLcc13fRaXQFblT IHEQcSkEagtau0jhO0xzN6hCZeo5IXC1DhsYFw646zWP5QnZeyeXCKL0DxzROD0f yEbhxbmWgwoJIf/5Mn4v5LhDJJ+OXswGsWgrrCbId0gd9x3UBn3Zq+fy1OXRl5cW GQG9oJXwxgU0dXMHnY0BO741zvCmoUcKfZvCEJihvYSFHJdCi0xb6GFhN/T4Jd93 hMCTH1YyjtSaVVGf5F6KnLxajm1kg8hntYF8tgheEC6oVdUB+ZNSdGO3QPl6w10j MX024K3sOlkxkjCPPz6AptU81YsgG7z8ul9jDkwDUr0Skp254uIfqDbn/+l8X0kI vN0qjtcr9hpQTuxEPNbEUXr4T9a95EiYM1lAg1QOZdN//xzgJoc7VVhyG3RML8un 2UTzy/g8V3kQ/JqfTTphMoVtodOKh60a71F0mBFl59sAbUj3tB4G1GHTfE23Tas6 theD5KDv2w4gGsE4ojWk =7IiH -----END PGP SIGNATURE----- Merge tag 'exynos-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup3 Merge "Exynos cleanup for v3.15" from Kukjin Kim: - reorganize code for - add support reserve memory for mfc-v7 - consolidate exynos4 and exynos5 machine codes - add generic compatible strings for exynos4 and exynos5 - update DT with generic compatible strings - move clk related dt-binding header file in dt-bindings/clock * tag 'exynos-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: dt-bindings: clock: Move exynos-audss-clk.h to dt-bindings/clock ARM: dts: Update Exynos DT files with generic compatible strings ARM: EXYNOS: Add generic compatible strings ARM: EXYNOS: Consolidate exynos4 and exynos5 machine files ARM: EXYNOS: Consolidate CPU init code ARM: SAMSUNG: Introduce generic Exynos4 and 5 helpers ARM: EXYNOS: Add support to reserve memory for MFC-v7 ARM: SAMSUNG: Reorganize calls to reserve memory for MFC Conflicts: arch/arm/mach-exynos/exynos.c Signed-off-by; Arnd Bergmann <arnd@arndb.de>
380 lines
9.0 KiB
Plaintext
380 lines
9.0 KiB
Plaintext
/*
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* Samsung's Exynos5420 based Arndale Octa board device tree source
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*
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* Copyright (c) 2013 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "exynos5420.dtsi"
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "Insignal Arndale Octa evaluation board based on EXYNOS5420";
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compatible = "insignal,arndale-octa", "samsung,exynos5420", "samsung,exynos5";
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memory {
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reg = <0x20000000 0x80000000>;
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};
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chosen {
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bootargs = "console=ttySAC3,115200";
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};
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fixed-rate-clocks {
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oscclk {
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compatible = "samsung,exynos5420-oscclk";
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clock-frequency = <24000000>;
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};
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};
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rtc@101E0000 {
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status = "okay";
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};
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mmc@12200000 {
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status = "okay";
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broken-cd;
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supports-highspeed;
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card-detect-delay = <200>;
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samsung,dw-mshc-ciu-div = <3>;
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samsung,dw-mshc-sdr-timing = <0 4>;
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samsung,dw-mshc-ddr-timing = <0 2>;
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pinctrl-names = "default";
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pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
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vmmc-supply = <&ldo10_reg>;
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slot@0 {
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reg = <0>;
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bus-width = <8>;
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};
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};
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mmc@12220000 {
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status = "okay";
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supports-highspeed;
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card-detect-delay = <200>;
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samsung,dw-mshc-ciu-div = <3>;
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samsung,dw-mshc-sdr-timing = <2 3>;
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samsung,dw-mshc-ddr-timing = <1 2>;
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pinctrl-names = "default";
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pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
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vmmc-supply = <&ldo10_reg>;
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slot@0 {
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reg = <0>;
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bus-width = <4>;
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};
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};
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hsi2c_4: i2c@12CA0000 {
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status = "okay";
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s2mps11_pmic@66 {
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compatible = "samsung,s2mps11-pmic";
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reg = <0x66>;
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s2mps11,buck2-ramp-delay = <12>;
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s2mps11,buck34-ramp-delay = <12>;
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s2mps11,buck16-ramp-delay = <12>;
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s2mps11,buck6-ramp-enable = <1>;
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s2mps11,buck2-ramp-enable = <1>;
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s2mps11,buck3-ramp-enable = <1>;
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s2mps11,buck4-ramp-enable = <1>;
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interrupt-parent = <&gpx3>;
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interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
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s2mps11_osc: clocks {
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#clock-cells = <1>;
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clock-output-names = "s2mps11_ap",
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"s2mps11_cp", "s2mps11_bt";
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};
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regulators {
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ldo1_reg: LDO1 {
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regulator-name = "PVDD_ALIVE_1V0";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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};
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ldo2_reg: LDO2 {
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regulator-name = "PVDD_APIO_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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ldo3_reg: LDO3 {
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regulator-name = "PVDD_APIO_MMCON_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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ldo4_reg: LDO4 {
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regulator-name = "PVDD_ADC_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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ldo5_reg: LDO5 {
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regulator-name = "PVDD_PLL_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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ldo6_reg: LDO6 {
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regulator-name = "PVDD_ANAIP_1V0";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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};
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ldo7_reg: LDO7 {
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regulator-name = "PVDD_ANAIP_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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ldo8_reg: LDO8 {
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regulator-name = "PVDD_ABB_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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ldo9_reg: LDO9 {
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regulator-name = "PVDD_USB_3V3";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-always-on;
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};
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ldo10_reg: LDO10 {
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regulator-name = "PVDD_PRE_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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ldo11_reg: LDO11 {
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regulator-name = "PVDD_USB_1V0";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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};
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ldo12_reg: LDO12 {
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regulator-name = "PVDD_HSIC_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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ldo13_reg: LDO13 {
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regulator-name = "PVDD_APIO_MMCOFF_2V8";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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};
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ldo15_reg: LDO15 {
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regulator-name = "PVDD_PERI_2V8";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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ldo16_reg: LDO16 {
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regulator-name = "PVDD_PERI_3V3";
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regulator-min-microvolt = <2200000>;
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regulator-max-microvolt = <2200000>;
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};
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ldo18_reg: LDO18 {
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regulator-name = "PVDD_EMMC_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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ldo19_reg: LDO19 {
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regulator-name = "PVDD_TFLASH_2V8";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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};
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ldo20_reg: LDO20 {
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regulator-name = "PVDD_BTWIFI_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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ldo21_reg: LDO21 {
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regulator-name = "PVDD_CAM1IO_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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ldo23_reg: LDO23 {
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regulator-name = "PVDD_MIFS_1V1";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-always-on;
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};
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ldo24_reg: LDO24 {
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regulator-name = "PVDD_CAM1_AVDD_2V8";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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};
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ldo26_reg: LDO26 {
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regulator-name = "PVDD_CAM0_AF_2V8";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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};
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ldo27_reg: LDO27 {
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regulator-name = "PVDD_G3DS_1V0";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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};
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ldo28_reg: LDO28 {
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regulator-name = "PVDD_TSP_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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ldo29_reg: LDO29 {
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regulator-name = "PVDD_AUDIO_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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ldo31_reg: LDO31 {
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regulator-name = "PVDD_PERI_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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ldo32_reg: LDO32 {
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regulator-name = "PVDD_LCD_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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ldo33_reg: LDO33 {
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regulator-name = "PVDD_CAM0IO_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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ldo35_reg: LDO35 {
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regulator-name = "PVDD_CAM0_DVDD_1V2";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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};
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ldo38_reg: LDO38 {
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regulator-name = "PVDD_CAM0_AVDD_2V8";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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};
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buck1_reg: BUCK1 {
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regulator-name = "PVDD_MIF_1V1";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1100000>;
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regulator-always-on;
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};
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buck2_reg: BUCK2 {
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regulator-name = "vdd_arm";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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};
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buck3_reg: BUCK3 {
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regulator-name = "PVDD_INT_1V0";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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};
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buck4_reg: BUCK4 {
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regulator-name = "PVDD_G3D_1V0";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1000000>;
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};
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buck5_reg: BUCK5 {
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regulator-name = "PVDD_LPDDR3_1V2";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1200000>;
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regulator-always-on;
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};
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buck6_reg: BUCK6 {
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regulator-name = "PVDD_KFC_1V0";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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};
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buck7_reg: BUCK7 {
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regulator-name = "VIN_LLDO_1V4";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1400000>;
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regulator-always-on;
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};
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buck8_reg: BUCK8 {
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regulator-name = "VIN_MLDO_2V0";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <2000000>;
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regulator-always-on;
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};
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buck9_reg: BUCK9 {
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regulator-name = "VIN_HLDO_3V5";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3500000>;
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regulator-always-on;
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};
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buck10_reg: BUCK10 {
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regulator-name = "PVDD_EMMCF_2V8";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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};
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};
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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wakeup {
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label = "SW-TACT1";
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gpios = <&gpx2 7 1>;
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linux,code = <KEY_WAKEUP>;
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gpio-key,wakeup;
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};
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};
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amba {
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mdma1: mdma@11C10000 {
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/*
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* MDMA1 can support both secure and non-secure
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* AXI transactions. When this is enabled in the kernel
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* for boards that run in secure mode, we are getting
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* imprecise external aborts causing the kernel to oops.
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*/
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status = "disabled";
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};
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};
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};
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