Wrong DPCD addresses were used for clock recovery during Link Training. The training pattern should be set by TRAINING_PATTERN_SET (0x102), while voltage swing and pre-emphasis should be set by TRAINING_LANE0_SET (0x103). Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de> |
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.. | ||
exynos_dp_core.c | ||
exynos_dp_core.h | ||
exynos_dp_reg.c | ||
exynos_dp_reg.h | ||
exynos_mipi_dsi_common.c | ||
exynos_mipi_dsi_common.h | ||
exynos_mipi_dsi_lowlevel.c | ||
exynos_mipi_dsi_lowlevel.h | ||
exynos_mipi_dsi_regs.h | ||
exynos_mipi_dsi.c | ||
Kconfig | ||
Makefile | ||
s6e8ax0.c |