7aa1aa6ece
ls1 has qe and ls1 has arm cpu. move qe from arch/powerpc to drivers/soc/fsl to adapt to powerpc and arm Signed-off-by: Zhao Qiang <qiang.zhao@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
39 lines
830 B
Plaintext
39 lines
830 B
Plaintext
#
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# QE Communication options
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#
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config QUICC_ENGINE
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bool "Freescale QUICC Engine (QE) Support"
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depends on FSL_SOC && PPC32
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select GENERIC_ALLOCATOR
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select CRC32
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help
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The QUICC Engine (QE) is a new generation of communications
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coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
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Selecting this option means that you wish to build a kernel
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for a machine with a QE coprocessor.
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config UCC_SLOW
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bool
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default y if SERIAL_QE
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help
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This option provides qe_lib support to UCC slow
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protocols: UART, BISYNC, QMC
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config UCC_FAST
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bool
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default y if UCC_GETH
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help
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This option provides qe_lib support to UCC fast
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protocols: HDLC, Ethernet, ATM, transparent
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config UCC
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bool
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default y if UCC_FAST || UCC_SLOW
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config QE_USB
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bool
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default y if USB_FSL_QE
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help
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QE USB Controller support
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