.. |
hw
|
drm/amd/display: Rename dc_stream to dc_stream_state
|
2017-09-26 18:16:04 -04:00 |
bw_fixed.h
|
|
|
clock_source.h
|
drm/amd/display: HDMI YCbCr422 12bpc pixel format issue
|
2017-09-26 17:13:37 -04:00 |
compressor.h
|
drm/amd/display: Initial prototype of FBC implementation
|
2017-09-26 18:15:56 -04:00 |
core_dc.h
|
drm/amd/display: Roll core_link into dc_link
|
2017-09-26 18:15:36 -04:00 |
core_status.h
|
drm/amd/display: Continue with stream enable if DP link training fails.
|
2017-09-26 18:06:58 -04:00 |
core_types.h
|
drm/amd/display: Rename dc_stream to dc_stream_state
|
2017-09-26 18:16:04 -04:00 |
custom_float.h
|
drm/amd/display: Enable regamma 25 segments and use double buffer.
|
2017-09-26 17:14:18 -04:00 |
dc_link_ddc.h
|
drm/amd/display: Roll core_link into dc_link
|
2017-09-26 18:15:36 -04:00 |
dc_link_dp.h
|
drm/amd/display: Rename dc_stream to dc_stream_state
|
2017-09-26 18:16:04 -04:00 |
dce_calcs.h
|
drm/amd/display: refactor bw related variable structure in val_ctx
|
2017-09-26 18:07:01 -04:00 |
dcn_calcs.h
|
drm/amd/display: block modes that require read bw greater than 30%
|
2017-09-26 18:08:39 -04:00 |
hw_sequencer.h
|
drm/amd/display: Rename dc_stream to dc_stream_state
|
2017-09-26 18:16:04 -04:00 |
link_hwss.h
|
drm/amd/display: Roll core_link into dc_link
|
2017-09-26 18:15:36 -04:00 |
reg_helper.h
|
drm/amd/display: add line number to reg_wait timeout print
|
2017-09-26 18:15:11 -04:00 |
resource.h
|
drm/amd/display: Rename dc_stream to dc_stream_state
|
2017-09-26 18:16:04 -04:00 |