093e943548
The sx150x gpio driver used a loop to set liner irq map for gpio pins. Now we use the irq domain to rebuild this irq mappig and make sure the codes are still compatible to old users. this patch also adds IRQF_ONESHOT flag to fix the IRQ flooding issues. Signed-off-by: Wei Chen <Wei.Chen@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> [Make Kconfig select GPIOLIB_IRQCHIP] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
625 lines
15 KiB
C
625 lines
15 KiB
C
/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*/
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#include <linux/gpio.h>
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#include <linux/i2c.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/slab.h>
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#include <linux/i2c/sx150x.h>
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#define NO_UPDATE_PENDING -1
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struct sx150x_device_data {
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u8 reg_pullup;
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u8 reg_pulldn;
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u8 reg_drain;
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u8 reg_polarity;
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u8 reg_dir;
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u8 reg_data;
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u8 reg_irq_mask;
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u8 reg_irq_src;
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u8 reg_sense;
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u8 reg_clock;
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u8 reg_misc;
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u8 reg_reset;
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u8 ngpios;
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};
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struct sx150x_chip {
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struct gpio_chip gpio_chip;
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struct i2c_client *client;
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const struct sx150x_device_data *dev_cfg;
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int irq_summary;
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int irq_base;
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int irq_update;
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u32 irq_sense;
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u32 irq_masked;
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u32 dev_sense;
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u32 dev_masked;
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struct irq_chip irq_chip;
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struct mutex lock;
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};
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static const struct sx150x_device_data sx150x_devices[] = {
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[0] = { /* sx1508q */
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.reg_pullup = 0x03,
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.reg_pulldn = 0x04,
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.reg_drain = 0x05,
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.reg_polarity = 0x06,
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.reg_dir = 0x07,
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.reg_data = 0x08,
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.reg_irq_mask = 0x09,
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.reg_irq_src = 0x0c,
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.reg_sense = 0x0b,
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.reg_clock = 0x0f,
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.reg_misc = 0x10,
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.reg_reset = 0x7d,
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.ngpios = 8
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},
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[1] = { /* sx1509q */
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.reg_pullup = 0x07,
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.reg_pulldn = 0x09,
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.reg_drain = 0x0b,
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.reg_polarity = 0x0d,
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.reg_dir = 0x0f,
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.reg_data = 0x11,
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.reg_irq_mask = 0x13,
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.reg_irq_src = 0x19,
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.reg_sense = 0x17,
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.reg_clock = 0x1e,
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.reg_misc = 0x1f,
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.reg_reset = 0x7d,
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.ngpios = 16
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},
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};
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static const struct i2c_device_id sx150x_id[] = {
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{"sx1508q", 0},
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{"sx1509q", 1},
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{}
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};
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MODULE_DEVICE_TABLE(i2c, sx150x_id);
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static s32 sx150x_i2c_write(struct i2c_client *client, u8 reg, u8 val)
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{
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s32 err = i2c_smbus_write_byte_data(client, reg, val);
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if (err < 0)
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dev_warn(&client->dev,
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"i2c write fail: can't write %02x to %02x: %d\n",
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val, reg, err);
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return err;
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}
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static s32 sx150x_i2c_read(struct i2c_client *client, u8 reg, u8 *val)
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{
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s32 err = i2c_smbus_read_byte_data(client, reg);
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if (err >= 0)
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*val = err;
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else
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dev_warn(&client->dev,
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"i2c read fail: can't read from %02x: %d\n",
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reg, err);
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return err;
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}
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static inline bool offset_is_oscio(struct sx150x_chip *chip, unsigned offset)
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{
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return (chip->dev_cfg->ngpios == offset);
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}
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/*
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* These utility functions solve the common problem of locating and setting
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* configuration bits. Configuration bits are grouped into registers
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* whose indexes increase downwards. For example, with eight-bit registers,
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* sixteen gpios would have their config bits grouped in the following order:
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* REGISTER N-1 [ f e d c b a 9 8 ]
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* N [ 7 6 5 4 3 2 1 0 ]
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*
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* For multi-bit configurations, the pattern gets wider:
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* REGISTER N-3 [ f f e e d d c c ]
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* N-2 [ b b a a 9 9 8 8 ]
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* N-1 [ 7 7 6 6 5 5 4 4 ]
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* N [ 3 3 2 2 1 1 0 0 ]
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*
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* Given the address of the starting register 'N', the index of the gpio
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* whose configuration we seek to change, and the width in bits of that
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* configuration, these functions allow us to locate the correct
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* register and mask the correct bits.
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*/
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static inline void sx150x_find_cfg(u8 offset, u8 width,
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u8 *reg, u8 *mask, u8 *shift)
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{
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*reg -= offset * width / 8;
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*mask = (1 << width) - 1;
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*shift = (offset * width) % 8;
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*mask <<= *shift;
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}
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static s32 sx150x_write_cfg(struct sx150x_chip *chip,
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u8 offset, u8 width, u8 reg, u8 val)
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{
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u8 mask;
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u8 data;
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u8 shift;
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s32 err;
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sx150x_find_cfg(offset, width, ®, &mask, &shift);
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err = sx150x_i2c_read(chip->client, reg, &data);
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if (err < 0)
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return err;
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data &= ~mask;
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data |= (val << shift) & mask;
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return sx150x_i2c_write(chip->client, reg, data);
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}
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static int sx150x_get_io(struct sx150x_chip *chip, unsigned offset)
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{
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u8 reg = chip->dev_cfg->reg_data;
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u8 mask;
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u8 data;
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u8 shift;
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s32 err;
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sx150x_find_cfg(offset, 1, ®, &mask, &shift);
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err = sx150x_i2c_read(chip->client, reg, &data);
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if (err >= 0)
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err = (data & mask) != 0 ? 1 : 0;
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return err;
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}
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static void sx150x_set_oscio(struct sx150x_chip *chip, int val)
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{
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sx150x_i2c_write(chip->client,
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chip->dev_cfg->reg_clock,
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(val ? 0x1f : 0x10));
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}
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static void sx150x_set_io(struct sx150x_chip *chip, unsigned offset, int val)
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{
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sx150x_write_cfg(chip,
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offset,
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1,
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chip->dev_cfg->reg_data,
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(val ? 1 : 0));
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}
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static int sx150x_io_input(struct sx150x_chip *chip, unsigned offset)
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{
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return sx150x_write_cfg(chip,
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offset,
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1,
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chip->dev_cfg->reg_dir,
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1);
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}
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static int sx150x_io_output(struct sx150x_chip *chip, unsigned offset, int val)
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{
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int err;
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err = sx150x_write_cfg(chip,
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offset,
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1,
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chip->dev_cfg->reg_data,
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(val ? 1 : 0));
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if (err >= 0)
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err = sx150x_write_cfg(chip,
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offset,
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1,
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chip->dev_cfg->reg_dir,
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0);
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return err;
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}
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static int sx150x_gpio_get(struct gpio_chip *gc, unsigned offset)
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{
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struct sx150x_chip *chip;
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int status = -EINVAL;
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chip = container_of(gc, struct sx150x_chip, gpio_chip);
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if (!offset_is_oscio(chip, offset)) {
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mutex_lock(&chip->lock);
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status = sx150x_get_io(chip, offset);
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mutex_unlock(&chip->lock);
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}
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return status;
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}
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static void sx150x_gpio_set(struct gpio_chip *gc, unsigned offset, int val)
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{
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struct sx150x_chip *chip;
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chip = container_of(gc, struct sx150x_chip, gpio_chip);
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mutex_lock(&chip->lock);
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if (offset_is_oscio(chip, offset))
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sx150x_set_oscio(chip, val);
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else
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sx150x_set_io(chip, offset, val);
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mutex_unlock(&chip->lock);
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}
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static int sx150x_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
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{
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struct sx150x_chip *chip;
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int status = -EINVAL;
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chip = container_of(gc, struct sx150x_chip, gpio_chip);
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if (!offset_is_oscio(chip, offset)) {
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mutex_lock(&chip->lock);
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status = sx150x_io_input(chip, offset);
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mutex_unlock(&chip->lock);
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}
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return status;
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}
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static int sx150x_gpio_direction_output(struct gpio_chip *gc,
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unsigned offset,
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int val)
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{
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struct sx150x_chip *chip;
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int status = 0;
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chip = container_of(gc, struct sx150x_chip, gpio_chip);
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if (!offset_is_oscio(chip, offset)) {
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mutex_lock(&chip->lock);
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status = sx150x_io_output(chip, offset, val);
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mutex_unlock(&chip->lock);
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}
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return status;
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}
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static void sx150x_irq_mask(struct irq_data *d)
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{
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struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
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unsigned n = d->hwirq;
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chip->irq_masked |= (1 << n);
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chip->irq_update = n;
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}
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static void sx150x_irq_unmask(struct irq_data *d)
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{
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struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
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unsigned n = d->hwirq;
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chip->irq_masked &= ~(1 << n);
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chip->irq_update = n;
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}
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static int sx150x_irq_set_type(struct irq_data *d, unsigned int flow_type)
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{
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struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
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unsigned n, val = 0;
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if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
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return -EINVAL;
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n = d->hwirq;
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if (flow_type & IRQ_TYPE_EDGE_RISING)
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val |= 0x1;
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if (flow_type & IRQ_TYPE_EDGE_FALLING)
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val |= 0x2;
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chip->irq_sense &= ~(3UL << (n * 2));
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chip->irq_sense |= val << (n * 2);
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chip->irq_update = n;
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return 0;
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}
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static irqreturn_t sx150x_irq_thread_fn(int irq, void *dev_id)
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{
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struct sx150x_chip *chip = (struct sx150x_chip *)dev_id;
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unsigned nhandled = 0;
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unsigned sub_irq;
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unsigned n;
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s32 err;
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u8 val;
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int i;
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for (i = (chip->dev_cfg->ngpios / 8) - 1; i >= 0; --i) {
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err = sx150x_i2c_read(chip->client,
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chip->dev_cfg->reg_irq_src - i,
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&val);
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if (err < 0)
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continue;
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sx150x_i2c_write(chip->client,
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chip->dev_cfg->reg_irq_src - i,
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val);
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for (n = 0; n < 8; ++n) {
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if (val & (1 << n)) {
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sub_irq = irq_find_mapping(
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chip->gpio_chip.irqdomain,
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(i * 8) + n);
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handle_nested_irq(sub_irq);
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++nhandled;
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}
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}
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}
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return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE);
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}
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static void sx150x_irq_bus_lock(struct irq_data *d)
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{
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struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
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mutex_lock(&chip->lock);
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}
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static void sx150x_irq_bus_sync_unlock(struct irq_data *d)
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{
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struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
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unsigned n;
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if (chip->irq_update == NO_UPDATE_PENDING)
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goto out;
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n = chip->irq_update;
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chip->irq_update = NO_UPDATE_PENDING;
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/* Avoid updates if nothing changed */
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if (chip->dev_sense == chip->irq_sense &&
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chip->dev_sense == chip->irq_masked)
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goto out;
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chip->dev_sense = chip->irq_sense;
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chip->dev_masked = chip->irq_masked;
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if (chip->irq_masked & (1 << n)) {
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sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 1);
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sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense, 0);
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} else {
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sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 0);
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sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense,
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chip->irq_sense >> (n * 2));
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}
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out:
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mutex_unlock(&chip->lock);
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}
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static void sx150x_init_chip(struct sx150x_chip *chip,
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struct i2c_client *client,
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kernel_ulong_t driver_data,
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struct sx150x_platform_data *pdata)
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{
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mutex_init(&chip->lock);
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chip->client = client;
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chip->dev_cfg = &sx150x_devices[driver_data];
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chip->gpio_chip.dev = &client->dev;
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chip->gpio_chip.label = client->name;
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chip->gpio_chip.direction_input = sx150x_gpio_direction_input;
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chip->gpio_chip.direction_output = sx150x_gpio_direction_output;
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chip->gpio_chip.get = sx150x_gpio_get;
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chip->gpio_chip.set = sx150x_gpio_set;
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chip->gpio_chip.base = pdata->gpio_base;
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chip->gpio_chip.can_sleep = true;
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chip->gpio_chip.ngpio = chip->dev_cfg->ngpios;
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if (pdata->oscio_is_gpo)
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++chip->gpio_chip.ngpio;
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chip->irq_chip.name = client->name;
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chip->irq_chip.irq_mask = sx150x_irq_mask;
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chip->irq_chip.irq_unmask = sx150x_irq_unmask;
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chip->irq_chip.irq_set_type = sx150x_irq_set_type;
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chip->irq_chip.irq_bus_lock = sx150x_irq_bus_lock;
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chip->irq_chip.irq_bus_sync_unlock = sx150x_irq_bus_sync_unlock;
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chip->irq_summary = -1;
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chip->irq_base = -1;
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chip->irq_masked = ~0;
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chip->irq_sense = 0;
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chip->dev_masked = ~0;
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chip->dev_sense = 0;
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chip->irq_update = NO_UPDATE_PENDING;
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}
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static int sx150x_init_io(struct sx150x_chip *chip, u8 base, u16 cfg)
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{
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int err = 0;
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unsigned n;
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for (n = 0; err >= 0 && n < (chip->dev_cfg->ngpios / 8); ++n)
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err = sx150x_i2c_write(chip->client, base - n, cfg >> (n * 8));
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return err;
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}
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static int sx150x_reset(struct sx150x_chip *chip)
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{
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int err;
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err = i2c_smbus_write_byte_data(chip->client,
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chip->dev_cfg->reg_reset,
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0x12);
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if (err < 0)
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return err;
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err = i2c_smbus_write_byte_data(chip->client,
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chip->dev_cfg->reg_reset,
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0x34);
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return err;
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}
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static int sx150x_init_hw(struct sx150x_chip *chip,
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struct sx150x_platform_data *pdata)
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{
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int err = 0;
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if (pdata->reset_during_probe) {
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err = sx150x_reset(chip);
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if (err < 0)
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return err;
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}
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err = sx150x_i2c_write(chip->client,
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chip->dev_cfg->reg_misc,
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0x01);
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if (err < 0)
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return err;
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err = sx150x_init_io(chip, chip->dev_cfg->reg_pullup,
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pdata->io_pullup_ena);
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if (err < 0)
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return err;
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err = sx150x_init_io(chip, chip->dev_cfg->reg_pulldn,
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pdata->io_pulldn_ena);
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if (err < 0)
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return err;
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err = sx150x_init_io(chip, chip->dev_cfg->reg_drain,
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|
pdata->io_open_drain_ena);
|
|
if (err < 0)
|
|
return err;
|
|
|
|
err = sx150x_init_io(chip, chip->dev_cfg->reg_polarity,
|
|
pdata->io_polarity);
|
|
if (err < 0)
|
|
return err;
|
|
|
|
if (pdata->oscio_is_gpo)
|
|
sx150x_set_oscio(chip, 0);
|
|
|
|
return err;
|
|
}
|
|
|
|
static int sx150x_install_irq_chip(struct sx150x_chip *chip,
|
|
int irq_summary,
|
|
int irq_base)
|
|
{
|
|
int err;
|
|
|
|
chip->irq_summary = irq_summary;
|
|
chip->irq_base = irq_base;
|
|
|
|
/* Add gpio chip to irq subsystem */
|
|
err = gpiochip_irqchip_add(&chip->gpio_chip,
|
|
&chip->irq_chip, chip->irq_base,
|
|
handle_edge_irq, IRQ_TYPE_EDGE_BOTH);
|
|
if (err) {
|
|
dev_err(&chip->client->dev,
|
|
"could not connect irqchip to gpiochip\n");
|
|
return err;
|
|
}
|
|
|
|
err = devm_request_threaded_irq(&chip->client->dev,
|
|
irq_summary, NULL, sx150x_irq_thread_fn,
|
|
IRQF_ONESHOT | IRQF_SHARED | IRQF_TRIGGER_FALLING,
|
|
chip->irq_chip.name, chip);
|
|
if (err < 0) {
|
|
chip->irq_summary = -1;
|
|
chip->irq_base = -1;
|
|
}
|
|
|
|
return err;
|
|
}
|
|
|
|
static int sx150x_probe(struct i2c_client *client,
|
|
const struct i2c_device_id *id)
|
|
{
|
|
static const u32 i2c_funcs = I2C_FUNC_SMBUS_BYTE_DATA |
|
|
I2C_FUNC_SMBUS_WRITE_WORD_DATA;
|
|
struct sx150x_platform_data *pdata;
|
|
struct sx150x_chip *chip;
|
|
int rc;
|
|
|
|
pdata = dev_get_platdata(&client->dev);
|
|
if (!pdata)
|
|
return -EINVAL;
|
|
|
|
if (!i2c_check_functionality(client->adapter, i2c_funcs))
|
|
return -ENOSYS;
|
|
|
|
chip = devm_kzalloc(&client->dev,
|
|
sizeof(struct sx150x_chip), GFP_KERNEL);
|
|
if (!chip)
|
|
return -ENOMEM;
|
|
|
|
sx150x_init_chip(chip, client, id->driver_data, pdata);
|
|
rc = sx150x_init_hw(chip, pdata);
|
|
if (rc < 0)
|
|
return rc;
|
|
|
|
rc = gpiochip_add(&chip->gpio_chip);
|
|
if (rc)
|
|
return rc;
|
|
|
|
if (pdata->irq_summary >= 0) {
|
|
rc = sx150x_install_irq_chip(chip,
|
|
pdata->irq_summary,
|
|
pdata->irq_base);
|
|
if (rc < 0)
|
|
goto probe_fail_post_gpiochip_add;
|
|
}
|
|
|
|
i2c_set_clientdata(client, chip);
|
|
|
|
return 0;
|
|
probe_fail_post_gpiochip_add:
|
|
gpiochip_remove(&chip->gpio_chip);
|
|
return rc;
|
|
}
|
|
|
|
static int sx150x_remove(struct i2c_client *client)
|
|
{
|
|
struct sx150x_chip *chip;
|
|
|
|
chip = i2c_get_clientdata(client);
|
|
gpiochip_remove(&chip->gpio_chip);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct i2c_driver sx150x_driver = {
|
|
.driver = {
|
|
.name = "sx150x",
|
|
.owner = THIS_MODULE
|
|
},
|
|
.probe = sx150x_probe,
|
|
.remove = sx150x_remove,
|
|
.id_table = sx150x_id,
|
|
};
|
|
|
|
static int __init sx150x_init(void)
|
|
{
|
|
return i2c_add_driver(&sx150x_driver);
|
|
}
|
|
subsys_initcall(sx150x_init);
|
|
|
|
static void __exit sx150x_exit(void)
|
|
{
|
|
return i2c_del_driver(&sx150x_driver);
|
|
}
|
|
module_exit(sx150x_exit);
|
|
|
|
MODULE_AUTHOR("Gregory Bean <gbean@codeaurora.org>");
|
|
MODULE_DESCRIPTION("Driver for Semtech SX150X I2C GPIO Expanders");
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_ALIAS("i2c:sx150x");
|