0856eba75c
HDMI PLL's REGSD field is only set by the driver if the PLL's output clock is over 1GHz. This is clearly an error, as REGSD should be set always. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> |
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| .. | ||
| displays-new | ||
| dss | ||
| omapfb | ||
| Kconfig | ||
| Makefile | ||
| vrfb.c | ||