Raise mode include raising as exception or raising as poll, it is specified via the mce.inject_flags field. This can be used to specify raise mode of UCNA, which is UC error but raised not as exception. And this can be used to test the filter code of poll handler or exception handler too. For example, enforce a poll raise mode for a fatal MCE. ChangeLog: v2: - Re-base on latest x86-tip.git/mce3 Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
224 lines
5.2 KiB
C
224 lines
5.2 KiB
C
/*
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* Machine check injection support.
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* Copyright 2008 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; version 2
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* of the License.
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*
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* Authors:
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* Andi Kleen
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* Ying Huang
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*/
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#include <linux/uaccess.h>
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#include <linux/module.h>
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#include <linux/timer.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/fs.h>
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#include <linux/smp.h>
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#include <linux/notifier.h>
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#include <linux/kdebug.h>
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#include <linux/cpu.h>
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#include <linux/sched.h>
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#include <asm/mce.h>
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#include <asm/apic.h>
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/* Update fake mce registers on current CPU. */
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static void inject_mce(struct mce *m)
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{
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struct mce *i = &per_cpu(injectm, m->extcpu);
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/* Make sure noone reads partially written injectm */
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i->finished = 0;
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mb();
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m->finished = 0;
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/* First set the fields after finished */
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i->extcpu = m->extcpu;
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mb();
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/* Now write record in order, finished last (except above) */
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memcpy(i, m, sizeof(struct mce));
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/* Finally activate it */
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mb();
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i->finished = 1;
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}
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static void raise_poll(struct mce *m)
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{
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unsigned long flags;
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mce_banks_t b;
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memset(&b, 0xff, sizeof(mce_banks_t));
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local_irq_save(flags);
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machine_check_poll(0, &b);
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local_irq_restore(flags);
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m->finished = 0;
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}
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static void raise_exception(struct mce *m, struct pt_regs *pregs)
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{
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struct pt_regs regs;
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unsigned long flags;
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if (!pregs) {
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memset(®s, 0, sizeof(struct pt_regs));
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regs.ip = m->ip;
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regs.cs = m->cs;
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pregs = ®s;
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}
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/* in mcheck exeception handler, irq will be disabled */
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local_irq_save(flags);
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do_machine_check(pregs, 0);
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local_irq_restore(flags);
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m->finished = 0;
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}
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static cpumask_t mce_inject_cpumask;
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static int mce_raise_notify(struct notifier_block *self,
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unsigned long val, void *data)
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{
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struct die_args *args = (struct die_args *)data;
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int cpu = smp_processor_id();
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struct mce *m = &__get_cpu_var(injectm);
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if (val != DIE_NMI_IPI || !cpu_isset(cpu, mce_inject_cpumask))
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return NOTIFY_DONE;
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cpu_clear(cpu, mce_inject_cpumask);
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if (m->inject_flags & MCJ_EXCEPTION)
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raise_exception(m, args->regs);
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else if (m->status)
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raise_poll(m);
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return NOTIFY_STOP;
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}
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static struct notifier_block mce_raise_nb = {
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.notifier_call = mce_raise_notify,
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.priority = 1000,
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};
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/* Inject mce on current CPU */
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static int raise_local(struct mce *m)
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{
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int context = MCJ_CTX(m->inject_flags);
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int ret = 0;
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int cpu = m->extcpu;
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if (m->inject_flags & MCJ_EXCEPTION) {
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printk(KERN_INFO "Triggering MCE exception on CPU %d\n", cpu);
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switch (context) {
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case MCJ_CTX_IRQ:
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/*
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* Could do more to fake interrupts like
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* calling irq_enter, but the necessary
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* machinery isn't exported currently.
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*/
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/*FALL THROUGH*/
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case MCJ_CTX_PROCESS:
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raise_exception(m, NULL);
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break;
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default:
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printk(KERN_INFO "Invalid MCE context\n");
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ret = -EINVAL;
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}
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printk(KERN_INFO "MCE exception done on CPU %d\n", cpu);
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} else if (m->status) {
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printk(KERN_INFO "Starting machine check poll CPU %d\n", cpu);
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raise_poll(m);
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mce_notify_irq();
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printk(KERN_INFO "Machine check poll done on CPU %d\n", cpu);
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} else
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m->finished = 0;
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return ret;
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}
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static void raise_mce(struct mce *m)
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{
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int context = MCJ_CTX(m->inject_flags);
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inject_mce(m);
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if (context == MCJ_CTX_RANDOM)
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return;
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#ifdef CONFIG_X86_LOCAL_APIC
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if (m->inject_flags & MCJ_NMI_BROADCAST) {
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unsigned long start;
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int cpu;
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get_online_cpus();
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mce_inject_cpumask = cpu_online_map;
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cpu_clear(get_cpu(), mce_inject_cpumask);
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for_each_online_cpu(cpu) {
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struct mce *mcpu = &per_cpu(injectm, cpu);
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if (!mcpu->finished ||
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MCJ_CTX(mcpu->inject_flags) != MCJ_CTX_RANDOM)
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cpu_clear(cpu, mce_inject_cpumask);
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}
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if (!cpus_empty(mce_inject_cpumask))
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apic->send_IPI_mask(&mce_inject_cpumask, NMI_VECTOR);
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start = jiffies;
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while (!cpus_empty(mce_inject_cpumask)) {
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if (!time_before(jiffies, start + 2*HZ)) {
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printk(KERN_ERR
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"Timeout waiting for mce inject NMI %lx\n",
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*cpus_addr(mce_inject_cpumask));
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break;
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}
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cpu_relax();
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}
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raise_local(m);
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put_cpu();
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put_online_cpus();
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} else
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#endif
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raise_local(m);
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}
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/* Error injection interface */
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static ssize_t mce_write(struct file *filp, const char __user *ubuf,
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size_t usize, loff_t *off)
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{
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struct mce m;
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if (!capable(CAP_SYS_ADMIN))
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return -EPERM;
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/*
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* There are some cases where real MSR reads could slip
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* through.
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*/
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if (!boot_cpu_has(X86_FEATURE_MCE) || !boot_cpu_has(X86_FEATURE_MCA))
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return -EIO;
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if ((unsigned long)usize > sizeof(struct mce))
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usize = sizeof(struct mce);
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if (copy_from_user(&m, ubuf, usize))
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return -EFAULT;
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if (m.extcpu >= num_possible_cpus() || !cpu_online(m.extcpu))
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return -EINVAL;
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/*
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* Need to give user space some time to set everything up,
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* so do it a jiffie or two later everywhere.
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*/
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schedule_timeout(2);
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raise_mce(&m);
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return usize;
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}
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static int inject_init(void)
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{
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printk(KERN_INFO "Machine check injector initialized\n");
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mce_chrdev_ops.write = mce_write;
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register_die_notifier(&mce_raise_nb);
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return 0;
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}
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module_init(inject_init);
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/*
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* Cannot tolerate unloading currently because we cannot
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* guarantee all openers of mce_chrdev will get a reference to us.
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*/
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MODULE_LICENSE("GPL");
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