Defer the unmasking of the count/compare interrupt (IRQ5) till the clockevent driver initialization: - only enable the cascaded IRQs 0 thru 4 in arch_init_irq(); kill the ALLINTS macro -- this change is blessed by AMD as I saw it in their own patch; :-) - do not force IRQ5 enabled in plat_time_init() if PM is enabled and there's no 32 KHz crystal. Update the copyrights (taking into account my prior changes), also removing Pete Popov's old email... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
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.. | ||
au1xxx_irqmap.c | ||
clocks.c | ||
cputable.c | ||
dbdma.c | ||
dbg_io.c | ||
dma.c | ||
gpio.c | ||
irq.c | ||
Makefile | ||
pci.c | ||
platform.c | ||
power.c | ||
prom.c | ||
puts.c | ||
reset.c | ||
setup.c | ||
sleeper.S | ||
time.c |