LoongArch-based procesors have 4, 8 or 16 cores per package. This patch adds multi-processor (SMP) support for LoongArch. Reviewed-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
27 lines
556 B
C
27 lines
556 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2020-2022 Loongson Technology Corporation Limited
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*/
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#ifndef _ASM_HARDIRQ_H
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#define _ASM_HARDIRQ_H
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#include <linux/cache.h>
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#include <linux/threads.h>
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#include <linux/irq.h>
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extern void ack_bad_irq(unsigned int irq);
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#define ack_bad_irq ack_bad_irq
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#define NR_IPI 2
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typedef struct {
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unsigned int ipi_irqs[NR_IPI];
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unsigned int __softirq_pending;
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} ____cacheline_aligned irq_cpustat_t;
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DECLARE_PER_CPU_ALIGNED(irq_cpustat_t, irq_stat);
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#define __ARCH_IRQ_STAT
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#endif /* _ASM_HARDIRQ_H */
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