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12 Commits

Author SHA1 Message Date
Geert Uytterhoeven
ade1ef9904 pinctrl: renesas: r8a77470: Optimize fixed-width reserved fields 
Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 70 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/c5183fcb3dd417d57ced0f60d091e2c7d37e1c8c.1649865241.git.geert+renesas@glider.be
 2022-05-05 12:02:26 +02:00
Geert Uytterhoeven
287f1ee38a pinctrl: renesas: r8a77470: Use shorthands for reserved fields 
Replace the full descriptions of reserved register fields by shorthands
with a negative field width, and merge adjacent reserved fields.

This reduces kernel size by 114 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/bc8f9647bbf677ac67cbdb34cf0c8fbaf62fb7fc.1649865241.git.geert+renesas@glider.be
 2022-05-05 12:02:25 +02:00
Geert Uytterhoeven
7fefb7c059 pinctrl: renesas: r8a77470: Use fixed-width description for IPSR regs 
All fields in the IPSR registers on RZ/G1C have the same width, but the
driver describes them using the PINMUX_CFG_REG_VAR() macro, which
is intended for fields with different widths.  Convert the description
to use the PINMUX_CFG_REG() macro for fixed-width fields instead.

This reduces kernel size by 162 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/f6f26a0dfd16050ead83daf2b9fabeb8b26821a6.1649865241.git.geert+renesas@glider.be
 2022-05-05 12:02:25 +02:00
Geert Uytterhoeven
b67fc1c667 pinctrl: renesas: Remove unused pfc parameter from .pin_to_pocctrl() 
The pfc parameter of the .pin_to_pocctrl() method was never used.
It is a relic of the old I/O voltage handling before commit
8775306dcf ("pinctrl: sh-pfc: refactor voltage setting").

Remove the parameter, as it prevents the checker from calling this
function for validating consistency of the pin control tables.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/822133086f32618c7fc920123c6a96f5d4ea7ad6.1640270559.git.geert+renesas@glider.be
 2022-02-22 09:57:18 +01:00
Geert Uytterhoeven
7b6e4e1f01 pinctrl: renesas: r8a77470: Share SDHI pin group data 
Pin groups sdhi[02]_data1 are subsets of sdhi[02]_data4.

This reduces kernel size by 16 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/9888bbd36ec207d6e5ece6c661e2fb8bc05a7dd6.1640269757.git.geert+renesas@glider.be
 2022-02-22 09:57:17 +01:00
Geert Uytterhoeven
d84e3d4a04 pinctrl: renesas: r8a77470: Share QSPI pin group data 
Pin groups qspi[01]_data2 are subsets of qspi[01]_data4.

This reduces kernel size by 32 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/2d877878bda39109a1a5caf5c01c798c771d3fda.1640269757.git.geert+renesas@glider.be
 2022-02-22 09:57:16 +01:00
Geert Uytterhoeven
b24cf384f9 pinctrl: renesas: r8a77470: Share MMC pin group data 
Pin groups mmc_data[14] and sdhi1_data[14] are subsets of mmc_data8.
Pin group sdhi1_ctrl can be an alias for mmc_ctrl.

This reduces kernel size by 96 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/e3d19e19f7666dbcefeec351a5096a86348404ae.1640269757.git.geert+renesas@glider.be
 2022-02-22 09:55:57 +01:00
Geert Uytterhoeven
496da10037 pinctrl: renesas: Add generic support for resizable buses 
The VIN_DATA_PIN_GROUP() macro and vin_data{12,16,} unions are used to
define multiple VIN data groups with different numbers of lanes, while
referring to a single array of data pins, thus saving memory.

However, the same feature would be useful for other resizable buses,
like MMC, SDHI, QSPI, LCD, BSC, ...

Rework the mechanism for generic use:
  - Use the new SH_PFC_PIN_GROUP_SUBSET() helper to remove the need for
    bus-specific unions,
  - Rename VIN_DATA_PIN_GROUP() to BUS_DATA_PIN_GROUP(),
  - Rename the macro parameters to better reflect their purposes,
  - Move the macro up, where it belongs.

Update all individual pin control drivers for the above changes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/cccfcfd01eb8ab7a587b084c4ddbf97293bd7291.1640269757.git.geert+renesas@glider.be
 2022-02-22 09:55:56 +01:00
Geert Uytterhoeven
c614d12c4b pinctrl: renesas: Rename sh_pfc_soc_operations instances 
Some instances of struct sh_pfc_soc_operations are called
"<soc>_pfc_ops", others are called "<soc>_pinmux_ops" or just
"pinmux_ops".  Settle on the first variant, to avoid confusion with
"struct pinmux_ops" in the pinctrl core, and to increase consistency.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/2ab33ad1d6a20a57d16922678b78810fa55b7fc0.1640269757.git.geert+renesas@glider.be
 2022-02-22 09:55:56 +01:00
Geert Uytterhoeven
9e04a0eda8 pinctrl: renesas: r8a77470: Reduce size for narrow VIN1 channel 
The second video-in channel on RZ/G1C has only 12 data lanes, but the
pin control driver uses the vin_data union, which is meant for 24 data
lanes, thus wasting space.

Fix this by using the vin_data12 union instead.

This reduces kernel size by 96 bytes.

Fixes: 50f3f2d73e ("pinctrl: sh-pfc: Reduce kernel size for narrow VIN channels")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/52716fa89139f6f92592633edb52804d4c5e18f0.1640269757.git.geert+renesas@glider.be
 2022-02-22 09:55:56 +01:00
Geert Uytterhoeven
fd6850132f pinctrl: renesas: r8a77470: Add bias pinconf support 
Implement support for pull-up (most pins) and pull-down (ASEBRK#/ACK)
handling for the RZ/G1C SoC, using the common R-Car bias handling.

Note that on RZ/G1C, the "ASEBRK#/ACK" pin is called "ACK", but the code
doesn't handle that naming difference.  Hence users should use the R-Car
naming in DTS files.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/18c8ebf9fa9e239253a723857e9dffeec775db7e.1619785375.git.geert+renesas@glider.be
 2021-05-31 10:50:28 +02:00
Geert Uytterhoeven
077365a941 pinctrl: Rename sh-pfc to renesas 
The drivers/pinctrl/sh-pfc subdirectory was originally created to group
pin control drivers for various Renesas SuperH and SH-Mobile platforms.
However, the name "sh-pfc" no longer reflects its contents, as the
directory now contains pin control drivers for Renesas SuperH, ARM32,
and ARM64 SoCs.

Hence rename the subdirectory from drivers/pinctrl/sh-pfc to
drivers/pinctrl/renesas, and the related Kconfig symbol from
PINCTRL_SH_PFC to PINCTRL_RENESAS.

Rename the git branch in MAINTAINERS, too, for consistency.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200909131534.12897-3-geert+renesas@glider.be
 2020-09-15 10:04:35 +02:00