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85893 Commits

Author SHA1 Message Date
Rob Clark
18514c3848 drm/msm/gpu: Add GEM debug label to devcore 
When trying to understand an iova fault devcore, once you figure out
which buffer we accessed beyond the end of, it is useful to see the
buffer's debug label.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Patchwork: https://patchwork.freedesktop.org/patch/491910/
Link: https://lore.kernel.org/r/20220629211919.563585-3-robdclark@gmail.com
 2022-07-06 18:54:41 -07:00
Rob Clark
cc66a42c94 drm/msm/gpu: Capture all BO addr+size in devcore 
It is useful to know what buffers userspace thinks are associated with
the submit, even if we don't care to capture their content.  This brings
things more inline with $debugfs/rd cmdstream dumping.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Patchwork: https://patchwork.freedesktop.org/patch/491908/
Link: https://lore.kernel.org/r/20220629211919.563585-2-robdclark@gmail.com
 2022-07-06 18:54:41 -07:00
Dmitry Baryshkov
b571cb5273 drm/msm: switch msm_kms_init_aspace() to use device_iommu_mapped() 
Change msm_kms_init_aspace() to use generic function
device_iommu_mapped() instead of the fwnode-specific interface
dev_iommu_fwspec_get(). While we are at it, stop referencing
platform_bus_type directly and use the bus of the IOMMU device.

Suggested-by: Robin Murphy <robin.murphy@arm.com>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/489703/
Link: https://lore.kernel.org/r/20220616081106.350262-6-dmitry.baryshkov@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
 2022-07-06 18:54:41 -07:00
Dmitry Baryshkov
40ae54ed73 drm/msm: move KMS aspace init to the separate helper 
MDP5 and DPU drivers have the same piece of code now to initialize
IOMMU and GEM address space. Move it to the msm_drv.c

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/489701/
Link: https://lore.kernel.org/r/20220616081106.350262-5-dmitry.baryshkov@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
 2022-07-06 18:54:40 -07:00
Dmitry Baryshkov
8cb72adb1c drm/msm: Stop using iommu_present() 
Even if some IOMMU has registered itself on the platform "bus", that
doesn't necessarily mean it provides translation for the device we
care about. Replace iommu_present() with a more appropriate check.

On Qualcomm platforms the IOMMU can be specified either for the MDP/DPU
device or for its parent MDSS device depending on the actual platform.
Check both of them, since that is how both DPU and MDP5 drivers work.

Co-developed-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/489699/
Link: https://lore.kernel.org/r/20220616081106.350262-4-dmitry.baryshkov@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
 2022-07-06 18:54:13 -07:00
Alan Previn
b94a1a207d drm/i915/guc: Asynchronous flush of GuC log regions 
Both error-capture and relay-logging mechanism use the GuC
log infrastructure. That means the KMD must send a log flush
complete notification back to GuC after reading the data out.
This call is currently being sent synchronously.
However, synchronous H2Gs cause problems when the system is
backed up. There is no need for this to be synchronous. The
KMD wasn't even looking at the return status from it. So make
it asynchronous and then there is no issue about time outs.

Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220607002314.1451656-2-alan.previn.teres.alexis@intel.com
 2022-07-06 14:38:56 -07:00
Randy Dunlap
3915f8bdde drm: xlnx: add <linux/io.h> for readl/writel 
Add a header file to prevent build errors:

../drivers/gpu/drm/xlnx/zynqmp_dp.c: In function ‘zynqmp_dp_write’:
../drivers/gpu/drm/xlnx/zynqmp_dp.c:335:9: error: implicit declaration of function ‘writel’ [-Werror=implicit-function-declaration]
  335 |         writel(val, dp->iomem + offset);
../drivers/gpu/drm/xlnx/zynqmp_dp.c: In function ‘zynqmp_dp_read’:
../drivers/gpu/drm/xlnx/zynqmp_dp.c:340:16: error: implicit declaration of function ‘readl’ [-Werror=implicit-function-declaration]
  340 |         return readl(dp->iomem + offset);

Fixes: a204f9743b ("drm: Remove linux/i2c.h from drm_crtc.h")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Hyun Kwon <hyun.kwon@xilinx.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220706184224.29116-1-rdunlap@infradead.org
 2022-07-06 22:54:51 +03:00
Ville Syrjälä
3d9c653cf6 drm/i915: Nuke PCH_JSP 
JSP is based on ICP and we don't really need to differentiate
between the two. So let's just delcare JSP to be ICP.

The only slight change here is for Wa_14011294188 which we
used to apply for JSP but now we'll only apply to MCC. This
should be fine since the issue being dealt with was introduced
in TGP and inherited into MCC. JSP being derived from ICP
should not need this workaround.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220630150600.24611-4-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2022-07-06 20:33:47 +03:00
Ville Syrjälä
f24d1d4508 drm/i915: Nuke PCH_MCC 
MCC is derived from TGP, and we have no real need to
differentiate between the two. Thus remove PCH_MCC and
just declare it to be PCH_TGP compatible.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220630150600.24611-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2022-07-06 20:33:32 +03:00
Ville Syrjälä
ca1dc50fd5 drm/i915: Use short PCH names consistently 
The comments regarding PCH compatibility use long vs.
short names inconsistently. Just use short names always.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220630150600.24611-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2022-07-06 20:33:18 +03:00
Dmitry Baryshkov
8010b14e62 drm/msm/mdp5: move iommu_domain_alloc() call close to its usage 
Move iommu_domain_alloc() in front of adress space/IOMMU initialization.
This allows us to drop final bits of struct mdp5_cfg_platform which
remained from the pre-DT days.

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/489695/
Link: https://lore.kernel.org/r/20220616081106.350262-3-dmitry.baryshkov@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
 2022-07-06 08:52:38 -07:00
Dmitry Baryshkov
a07ea70a57 drm/msm/dpu: check both DPU and MDSS devices for the IOMMU 
Follow the lead of MDP5 driver and check both DPU and MDSS devices for
the IOMMU specifiers.

Historically DPU devices had IOMMU specified in the MDSS device tree
node, but as some of MDP5 devices are being converted to the supported
by the DPU driver, the driver should adapt and check both devices.

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/489696/
Link: https://lore.kernel.org/r/20220616081106.350262-2-dmitry.baryshkov@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
 2022-07-06 08:52:38 -07:00
Rob Clark
ba0386a9c4 drm/msm: Fix %d vs %u 
In debugging fence rollover, I noticed that GPU state capture and
devcore dumps were showing me negative fence numbers.  Let's fix that
and some related signed vs unsigned confusion.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Patchwork: https://patchwork.freedesktop.org/patch/489621/
Link: https://lore.kernel.org/r/20220615163532.3013035-1-robdclark@gmail.com
 2022-07-06 08:49:23 -07:00
Dmitry Baryshkov
4a42c5b5dd drm/msm/dpu: move struct dpu_hw_blk definition to dpu_hw_utils.h 
There is little point in having a separate header just for a single
opaque struct definition. Drop it now and move the struct to the
dpu_hw_util.h header.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/488016/
Link: https://lore.kernel.org/r/20220601161349.1517667-5-dmitry.baryshkov@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
 2022-07-06 08:43:54 -07:00
Dmitry Baryshkov
9403f9a42c drm/msm/dpu: merge base_off with blk_off in struct dpu_hw_blk_reg_map 
There is little point in keeping a separate MDP address and block offset
in this struct. Merge them to form a new blk_addr field used for all
register access.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/488017/
Link: https://lore.kernel.org/r/20220601161349.1517667-4-dmitry.baryshkov@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
 2022-07-06 08:43:54 -07:00
Dmitry Baryshkov
1e5df24b99 drm/msm/dpu: drop length from struct dpu_hw_blk_reg_map 
We (nearly) do not use the length field from struct dpu_hw_blk_reg_map,
so we can drop it safely.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/488013/
Link: https://lore.kernel.org/r/20220601161349.1517667-3-dmitry.baryshkov@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
 2022-07-06 08:43:54 -07:00
Dmitry Baryshkov
d352d6d524 drm/msm/dpu: drop xin_id from struct dpu_hw_blk_reg_map 
Drop the unused field xin_id.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/488011/
Link: https://lore.kernel.org/r/20220601161349.1517667-2-dmitry.baryshkov@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
 2022-07-06 08:43:53 -07:00
Rob Clark
36bbfdb8bc drm/msm/adreno: Allow larger address space size 
The restriction to 4G was strictly to work around 64b math bug in some
versions of SQE firmware.  This appears to be fixed in a650+ SQE fw, so
allow a larger address space size on these devices.

Also, add a modparam override for debugging and igt.

v2: Send the right version of the patch (ie. the one that actually
    compiles)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Patchwork: https://patchwork.freedesktop.org/patch/487601/
Link: https://lore.kernel.org/r/20220529180428.2577832-1-robdclark@gmail.com
 2022-07-06 08:42:57 -07:00
Konrad Dybcio
9bec4399af drm/msm/adreno: Fix up formatting 
Leading spaces are not something checkpatch likes, and it says so when
they are present. Use tabs consistently to indent function body and
unwrap a 83-char-long line, as 100 is cool nowadays.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/487592/
Link: https://lore.kernel.org/r/20220528160353.157870-4-konrad.dybcio@somainline.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
 2022-07-06 08:41:57 -07:00
Konrad Dybcio
fba6767c2d drm/msm/a6xx: Add speedbin support for A619 GPU 
There are various SKUs of A619, ranging from 565 MHz to 850 MHz, depending
on the bin. Add support for distinguishing them, so that proper frequency
ranges can be applied, depending on the HW.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/487590/
Link: https://lore.kernel.org/r/20220528160353.157870-3-konrad.dybcio@somainline.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
 2022-07-06 08:41:57 -07:00
Konrad Dybcio
b7616b5c69 drm/msm/adreno: Add A619 support 
Add support for the Adreno 619 GPU, as found in Snapdragon 690 (SM6350),
480 (SM4350) and 750G (SM7225).

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/487588/
Link: https://lore.kernel.org/r/20220528160353.157870-2-konrad.dybcio@somainline.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
 2022-07-06 08:41:19 -07:00
Konrad Dybcio
0165e9c119 drm/msm/adreno: Remove dead code 
This BUG_ON will never be reached, and there is a comment 20 above
explaining why.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/487586/
Link: https://lore.kernel.org/r/20220528160353.157870-1-konrad.dybcio@somainline.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
 2022-07-06 08:41:02 -07:00
Douglas Anderson
6694482a70 drm/msm: Avoid unclocked GMU register access in 6xx gpu_busy 
From testing on sc7180-trogdor devices, reading the GMU registers
needs the GMU clocks to be enabled. Those clocks get turned on in
a6xx_gmu_resume(). Confusingly enough, that function is called as a
result of the runtime_pm of the GPU "struct device", not the GMU
"struct device". Unfortunately the current a6xx_gpu_busy() grabs a
reference to the GMU's "struct device".

The fact that we were grabbing the wrong reference was easily seen to
cause crashes that happen if we change the GPU's pm_runtime usage to
not use autosuspend. It's also believed to cause some long tail GPU
crashes even with autosuspend.

We could look at changing it so that we do pm_runtime_get_if_in_use()
on the GPU's "struct device", but then we run into a different
problem. pm_runtime_get_if_in_use() will return 0 for the GPU's
"struct device" the whole time when we're in the "autosuspend
delay". That is, when we drop the last reference to the GPU but we're
waiting a period before actually suspending then we'll think the GPU
is off. One reason that's bad is that if the GPU didn't actually turn
off then the cycle counter doesn't lose state and that throws off all
of our calculations.

Let's change the code to keep track of the suspend state of
devfreq. msm_devfreq_suspend() is always called before we actually
suspend the GPU and msm_devfreq_resume() after we resume it. This
means we can use the suspended state to know if we're powered or not.

NOTE: one might wonder when exactly our status function is called when
devfreq is supposed to be disabled. The stack crawl I captured was:
  msm_devfreq_get_dev_status
  devfreq_simple_ondemand_func
  devfreq_update_target
  qos_notifier_call
  qos_max_notifier_call
  blocking_notifier_call_chain
  pm_qos_update_target
  freq_qos_apply
  apply_constraint
  __dev_pm_qos_update_request
  dev_pm_qos_update_request
  msm_devfreq_idle_work

Fixes: eadf79286a ("drm/msm: Check for powered down HW in the devfreq callbacks")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Patchwork: https://patchwork.freedesktop.org/patch/489124/
Link: https://lore.kernel.org/r/20220610124639.v4.1.Ie846c5352bc307ee4248d7cab998ab3016b85d06@changeid
Signed-off-by: Rob Clark <robdclark@chromium.org>
 2022-07-06 08:38:06 -07:00
Sam Ravnborg
d8b599bf62 drm/bridge: ti-sn65dsi86: Use atomic variants of drm_bridge_funcs 
Move away from the deprecated enable/disable operations in
drm_bridge_funcs and enable atomic use.

v3:
 - Drop use of DRM_BRIDGE_STATE_OPS

v2:
 - fix build (kernel test robot <lkp@intel.com>)

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Kieran Bingham <kieran.bingham@ideasonboard.com>
Cc: Douglas Anderson <dianders@chromium.org>
Cc: Andrzej Hajda <a.hajda@samsung.com>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Robert Foss <robert.foss@linaro.org>
Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
Cc: Jonas Karlman <jonas@kwiboo.se>
Cc: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220703202724.9553-2-sam@ravnborg.org
 2022-07-06 17:08:03 +02:00
Guillaume Ranquet
d86c156891 drm/mediatek: dpi: Add dp_intf support 
Dpintf is the displayport interface hardware unit. This unit is similar
to dpi and can reuse most of the code.

This patch adds support for mt8195-dpintf to this dpi driver. Main
differences are:
 - 4 pixels for one iteration for dp_intf while dpi is 1 pixel for one
   iteration.
 - Input of dp_intf is two pixels per iteration.
 - Some register contents differ slightly between the two components.

Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20220705102530.1344-6-rex-bc.chen@mediatek.com/
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
 2022-07-06 22:51:44 +08:00
Bo-Chen Chen
49ecbb78dd drm/mediatek: dpi: Add pixels_per_iter config support 
The quantity of output for one iteration could be different for dpi and
dp_intf. For dp_intf, it's 4 pixels for one iteration it's 1 pixel for one
iteration for dpi. Therefore, we add a new config "pixels_per_iter" to
control quantity of transferred pixels per iteration.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20220705102530.1344-5-rex-bc.chen@mediatek.com/
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
 2022-07-06 22:32:07 +08:00
Bo-Chen Chen
2587d8951b drm/mediatek: dpi: Add input_2pixel config support 
The input pixel per iteration could be different, so we add a new config
"input_2pixel" to control this.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20220705102530.1344-4-rex-bc.chen@mediatek.com/
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
 2022-07-06 22:29:46 +08:00
Bo-Chen Chen
c83da6233d drm/mediatek: dpi: Add config to support direct connection to dpi panels 
MediaTek dpi supports direct connection to dpi panels while dp_intf does
not support. Therefore, add a config "support_direct_pin" to control this.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20220705102530.1344-3-rex-bc.chen@mediatek.com/
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
 2022-07-06 22:25:47 +08:00
Bo-Chen Chen
b992131aac drm/mediatek: dpi: Add YUV422 output support 
Dp_intf supports YUV422 as output format. In MT8195 Chrome project,
YUV422 output format is used for 4K resolution.

To support this, it is also needed to support color format transfer.
Color format transfer is a new feature for both dpi and dpintf of MT8195.

The input format could be RGB888 and output format for dp_intf should be
YUV422. Therefore, we add a mtk_dpi_matrix_sel() helper to update the
DPI_MATRIX_SET register depending on the color format.

Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20220705102530.1344-2-rex-bc.chen@mediatek.com/
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
 2022-07-06 22:22:10 +08:00
Liu Ying
819da60d77 drm/bridge: fsl-ldb: Enable split mode for LVDS dual link 
When LVDS dual link is used, we have to enable the LDB_CTRL_SPLIT_MODE bit.

Fixes: 463db5c2ed ("drm: bridge: ldb: Implement simple Freescale i.MX8MP LDB bridge")
Cc: Andrzej Hajda <andrzej.hajda@intel.com>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Robert Foss <robert.foss@linaro.org>
Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
Cc: Jonas Karlman <jonas@kwiboo.se>
Cc: Jernej Skrabec <jernej.skrabec@gmail.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220701065634.4027537-3-victor.liu@nxp.com
Link: https://patchwork.freedesktop.org/patch/msgid/20220701065634.4027537-4-victor.liu@nxp.com
 2022-07-06 15:33:14 +02:00
Liu Ying
90f5514bcc drm/bridge: fsl-ldb: Fix mode clock rate validation 
With LVDS dual link, up to 160MHz mode clock rate is supported.
With LVDS single link, up to 80MHz mode clock rate is supported.
Fix mode clock rate validation by swapping the maximum mode clock
rates of the two link modes.

Fixes: 463db5c2ed ("drm: bridge: ldb: Implement simple Freescale i.MX8MP LDB bridge")
Cc: Andrzej Hajda <andrzej.hajda@intel.com>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Robert Foss <robert.foss@linaro.org>
Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
Cc: Jonas Karlman <jonas@kwiboo.se>
Cc: Jernej Skrabec <jernej.skrabec@gmail.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220701065634.4027537-2-victor.liu@nxp.com
 2022-07-06 15:33:08 +02:00
Marek Vasut
47a4fb4679 drm: bridge: ldb: Drop DE flip from Freescale i.MX8MP LDB bridge 
The DE inversion is implemented in LCDIFv3 driver and is no longer
needed in the LDB bridge which does not invert the DE signal. Drop
the inversion.

Fixes: 463db5c2ed ("drm: bridge: ldb: Implement simple Freescale i.MX8MP LDB bridge")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Maxime Ripard <maxime@cerno.tech>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Robby Cai <robby.cai@nxp.com>
Cc: Robert Foss <robert.foss@linaro.org>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: Thomas Zimmermann <tzimmermann@suse.de>
To: dri-devel@lists.freedesktop.org
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220630174031.92354-1-marex@denx.de
 2022-07-06 15:31:13 +02:00
Hsin-Yi Wang
a57e7345ca drm/bridge: anx7625: Add wait_hpd_asserted() callback 
Move hpd polling check into wait_hpd_asserted() callback. For the cases
that aux transfer function wasn't used, do hpd polling check after pm
runtime resume, which will power on the bridge.

Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Xin Ji <xji@analogixsemi.com>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220706125254.2474095-5-hsinyi@chromium.org
 2022-07-06 15:19:55 +02:00
Hsin-Yi Wang
dfb02eb6bd drm/bridge: anx7625: Fix NULL pointer crash when using edp-panel 
Move devm_of_dp_aux_populate_ep_devices() after pm runtime and i2c setup
to avoid NULL pointer crash.

edp-panel probe (generic_edp_panel_probe) calls pm_runtime_get_sync() to
read EDID. At this time, bridge should have pm runtime enabled and i2c
clients ready.

Fixes: adca62ec37 ("drm/bridge: anx7625: Support reading edid through aux channel")
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Xin Ji <xji@analogixsemi.com>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220706125254.2474095-4-hsinyi@chromium.org
 2022-07-06 15:19:53 +02:00
Hsin-Yi Wang
aa1965973c drm/bridge: anx7625: use pm_runtime_force_suspend(resume) 
There's no need to check for IRQ or disable it in suspend.

Use pm_runtime_force_suspend(resume) to make sure anx7625 is powered off
correctly. Make the system suspend/resume and pm runtime suspend/resume
more consistent.

Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Xin Ji <xji@analogixsemi.com>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220706125254.2474095-3-hsinyi@chromium.org
 2022-07-06 15:19:50 +02:00
Hsin-Yi Wang
e660916b7f drm/bridge: anx7625: Convert to devm_i2c_new_dummy_device() 
Simplify the resource management.

Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Xin Ji <xji@analogixsemi.com>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220706125254.2474095-2-hsinyi@chromium.org
 2022-07-06 15:19:48 +02:00
Alex Deucher
fc25fd602b drm/amdgpu/display: disable prefer_shadow for generic fb helpers 
Seems to break hibernation.  Disable for now until we can root
cause it.

Fixes: 087451f372 ("drm/amdgpu: use generic fb helpers instead of setting up AMD own's.")
Bug: https://bugzilla.kernel.org/show_bug.cgi?id=216119
Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-07-05 16:19:30 -04:00
Alex Deucher
89e2b4373a drm/amdgpu: keep fbdev buffers pinned during suspend 
Was dropped when we converted to the generic helpers.

Fixes: 087451f372 ("drm/amdgpu: use generic fb helpers instead of setting up AMD own's.")
Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-07-05 16:18:36 -04:00
Maíra Canal
2e02ceb73f drm/amd/display: Remove unused variables from vba_vars_st 
Some variables from the struct vba_vars_st are not referenced in any
other place on the codebase. As they are not used, this commit removes
those variables.

Signed-off-by: Maíra Canal <mairacanal@riseup.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-07-05 16:18:31 -04:00
Maíra Canal
fd3bc691fc drm/amd/display: Remove duplicate code across dcn30 and dcn31 
The function CalculateBytePerPixelAnd256BBlockSizes was defined four
times: on display_mode_vba_30.c, display_rq_dlg_calc_30.c,
display_mode_vba_31.c and display_rq_dlg_calc_31.c. In order to avoid
code duplication, the CalculateBytePerPixelAnd256BBlockSizes is defined
on display_mode_vba_30.h and used across dcn30 and dcn31.

Signed-off-by: Maíra Canal <mairacanal@riseup.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-07-05 16:18:27 -04:00
Yang Li
61e419f651 drm/amd/display: clean up some inconsistent indenting 
Eliminate the follow smatch warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:3151 commit_planes_for_stream() warn: inconsistent indenting

Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-07-05 16:18:23 -04:00
Maíra Canal
eb08accdd8 drm/amd/display: Remove return value of Calculate256BBlockSizes 
The function Calculate256BBlockSizes always returns true, regardless of
the parameters. As any file checks the return of the function, this
commit changes the return value to void.

Signed-off-by: Maíra Canal <mairacanal@riseup.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-07-05 16:18:19 -04:00
André Almeida
edadd6fc28 drm/amdpgu/debugfs: Simplify some exit paths 
To avoid code repetition, unify the function exit path when possible. No
functional changes.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: André Almeida <andrealmeid@igalia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-07-05 16:18:14 -04:00
Jianglei Nie
c3c483391b drm/amdgpu/mes: Fix an error handling path in amdgpu_mes_self_test() 
if amdgpu_mes_ctx_alloc_meta_data() fails, we should call amdgpu_vm_fini()
to handle amdgpu_vm_init().

Add a new lable before amdgpu_vm_init() and goto this lable when
amdgpu_mes_ctx_alloc_meta_data() fails.

Signed-off-by: Jianglei Nie <niejianglei2021@163.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-07-05 16:18:07 -04:00
Alvin Lee
3e211f23aa drm/amd/display: Maintain old audio programming sequence 
[Description]
Program audio DTO before wall dto for audio

Reviewed-by: Martin Leung <Martin.Leung@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-07-05 16:17:54 -04:00
Aric Cyr
a00a3cef25 drm/amd/display: 3.2.192 
This DC patchset brings improvements in multiple areas. In summary, we
highlight:

- Program ACP-related registers
- Fixes for DMUB, DPIA, PSR, and others
- Improvements in the pipe split
- Add SubVP code
- Add basic setup for FAMS support
- Improve BB capabilities

Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-07-05 16:17:46 -04:00
Hamza Mahfooz
068ab0cdc1 drm/amd/display: rename hdmi_frl_pcon_support 
hdmi_frl_pcon_support has been the source of confusion. So, rename it to
dp_hdmi21_pcon_support.

Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-07-05 16:17:39 -04:00
Hamza Mahfooz
81990c3c07 drm/amd/display: enable PCON SST support for newer ASICs 
Generic PCON SST support already exists and works for newer ASICs. So,
enable it by default.

Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-07-05 16:17:30 -04:00
Chris Park
427a60c1c3 drm/amd/display: OVT Update on InfoFrame and Mode Management 
[Why]
Integrate OVT timing from DM to DC logic to update info frame
and mode management to report the resolution to the OS.

[How]
Reflect RID and Frame Rate to AVI InfoFrame Version 5.
Define new Timing Standard for OVT timing.

Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Chris Park <Chris.Park@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-07-05 16:17:20 -04:00
Jack Xiao
7acd7ab029 drm/amdgpu/mes11: fix to unmap legacy queue 
MES fw updated to support unmapping legacy gfx/compute queue.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-07-05 16:17:13 -04:00