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11 Commits

Author SHA1 Message Date
Hawking Zhang
55437d3bf4 drm/amdgpu: add smuio v13_0_6 ip headers v4 
Add smuio v13_0_6 register offset and shift masks
header files (Hawking)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-04 09:54:35 -04:00
Hawking Zhang
be547828c0 drm/amdgpu: add smuio v13_0_2 ip headers (v3) 
v1: Add smuio v13_0_2 register offset and
shift masks in header files (Hawking)
v2: Clean up smuio v13_0_2 registers (Alex)
v3: update registers (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-03-10 00:01:06 -05:00
Likun Gao
2a53291ef2 drm/amdgpu: add SMUIO 11.0.6 register headers 
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-02-09 15:28:11 -05:00
Tom St Denis
ba56657d18 drm/amd/amdgpu: Fix SMUIO/PWR Confusion (v2) 
The PWR block was merged into the SMUIO block by revision 12 so we add
that to the smuio_12_0_0 headers.

(v2): Drop nonsensical smuio_10_0_0 header

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-04-01 14:44:43 -04:00
Tom St Denis
2e40d9b915 drm/amd/amdgpu: Add missing SMUIO v12 register to headers 
This register is needed by umr.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-04-01 14:44:43 -04:00
Kent Russell
3f94281751 drm/amdgpu: Add SMUIO values for other I2C controller v2 
These are the offsets for CKSVII2C1, and match up with the values
already added for CKSVII2C

v2: Don't remove some of the CSKVII2C values

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-10-03 09:11:03 -05:00
Andrey Grodzovsky
6a3068065f drm/amd: Import smuio_11_0 headers for EEPROM access on Vega20 
v3: Merge CKSVII2C_IC regs into exsisting headers.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-27 08:17:27 -05:00
Hawking Zhang
d2996831b2 drm/amdgpu: add SMUIO 11.0 register headers 
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-06-20 15:54:44 -05:00
Evan Quan
42fae99520 drm/amd/powerplay/vega20: tell the correct gfx voltage V2 
Export the correct gfx voltage by hwmon interface.

V2: update the register naming for consistency

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-10-09 16:45:58 -05:00
Rex Zhu
680731ade5 drm/amd/pp: Export registers for read vddc on VI/Vega10 
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:17:49 -05:00
Feifei Xu
424d9bb4d5 drm/amd/include:cleanup vega10 smuio header files. 
Cleanup asic_reg/vega10/SMUIO folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:48:21 -05:00