2 Commits

Author	SHA1	Message	Date
Samson Tam	327f79d7a1	drm/amd/display: Updates for OTG and DCCG clocks ... Use DTBCLK for valid pixel clock generation Signed-off-by: Samson Tam <Samson.Tam@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>	2022-06-03 16:45:01 -04:00
Aurabindo Pillai	235c676342	drm/amd/display: add DCN32/321 specific files for Display Core ... Add core DC support for DCN 3.2.x. v2: squash in fixup (Alex) Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>	2022-06-03 16:43:37 -04:00