Commit Graph

66225 Commits

Author SHA1 Message Date
Ard Biesheuvel
d6800ca73a Revert "ARM: 9144/1: forbid ftrace with clang and thumb2_kernel"
This reverts commit ecb108e3e3.

Clang + Thumb2 with ftrace is now supported.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Steven Rostedt (Google) <rostedt@goodmis.org>
2022-02-10 09:55:05 +01:00
Ard Biesheuvel
64dff07b1c ARM: mach-bcm: disable ftrace in SMC invocation routines
The SMC calling convention uses R7 as an argument register, which
conflicts with its use as a frame pointer when building in Thumb2 mode.
Given that Clang with ftrace does not permit frame pointers to be
disabled, let's omit this compilation unit from ftrace instrumentation.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Nick Desaulniers <ndesaulniers@google.com>
2022-02-10 09:54:54 +01:00
Dinh Nguyen
0f7b715101 ARM: dts: socfpga: cyclone5: align regulator node with dtschema
Fixes dtbs_check warnings like:

'3-3-v-regulator' does not match any of the regexes: '.*-names$'

Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>:wq
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09 20:58:10 -06:00
Dinh Nguyen
bd702d3a85 ARM: dts: socfpga: arria10: align regulator node with dtschema
Fixes dtbs_check warnings like:

'3-3-v-regulator' does not match any of the regexes: '.*-names$'

Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v2: fix compile error
2022-02-09 20:58:10 -06:00
Krzysztof Kozlowski
40b01ca3c7 ARM: dts: arria10: add board compatible for SoCFPGA DK
The Altera SoCFPGA Arria 10 SoC Development Kit is a board with Arria 10,
so it needs its own compatible.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09 10:43:03 -06:00
Krzysztof Kozlowski
b6662bf5a3 ARM: dts: arria10: add board compatible for Mercury AA1
The Enclustra Mercury AA1 is a module with Arria 10, so it needs its own
compatible.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09 10:43:03 -06:00
Krzysztof Kozlowski
0d108c3970 ARM: dts: arria5: add board compatible for SoCFPGA DK
The Altera SoCFPGA Arria V SoC Development Kit is a board with Arria 5,
so it needs its own compatible.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09 10:43:02 -06:00
Mark Brown
2cbfa21286 spi: make remove callback a void function
Merge series from Uwe Kleine-König <u.kleine-koenig@pengutronix.de>:

this series goal is to change the spi remove callback's return value to void.
After numerous patches nearly all drivers already return 0 unconditionally.
The four first patches in this series convert the remaining three drivers to
return 0, the final patch changes the remove prototype and converts all
implementers.

base-commit: 26291c54e1
2022-02-09 14:32:59 +00:00
Ard Biesheuvel
1f640552d9 ARM: cacheflush: avoid clobbering the frame pointer
Thumb2 uses R7 rather than R11 as the frame pointer, and even if we
rarely use a frame pointer to begin with when building in Thumb2 mode,
there are cases where it is required by the compiler (Clang when
inserting profiling hooks via -pg)

However, preserving and restoring the frame pointer is risky, as any
unhandled exceptions raised in the mean time will produce a bogus
backtrace, and it would be better not to touch the frame pointer at all.
This is the case even when CONFIG_FRAME_POINTER is not set, as the
unwind directive used by the unwinder may also use R7 or R11 as the
unwind anchor, even if the frame pointer is not managed strictly
according to the frame pointer ABI.

So let's tweak the cacheflush asm code not to clobber R7 or R11 at all,
so that we can drop R7 from the clobber lists of the inline asm blocks
that call these routines, and remove the code that preserves/restores
R11.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
2022-02-09 10:13:10 +01:00
Ard Biesheuvel
dd12e97f3c ARM: kprobes: treat R7 as the frame pointer register in Thumb2 builds
Thumb2 code uses R7 as the frame pointer rather than R11, because the
opcodes to access it are generally shorter.

This means that there are cases where we cannot simply add it to the
clobber list of an asm() block, but need to preserve/restore it
explicitly, or the compiler may complain in some cases (e.g., Clang
builds with ftrace enabled).

Since R11 is not special in that case, clobber it instead, and use it to
preserve/restore the value of R7.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Masami Hiramatsu <mhiramat@kernel.org>
2022-02-09 09:13:59 +01:00
Ard Biesheuvel
41918ec82e ARM: ftrace: enable the graph tracer with the EABI unwinder
Enable the function graph tracer in combination with the EABI unwinder,
so that Thumb2 builds or Clang ARM builds can make use of it.

This involves using the unwinder to locate the return address of an
instrumented function on the stack, so that it can be overridden and
made to refer to the ftrace handling routines that need to be called at
function return.

Given that for these builds, it is not guaranteed that the value of the
link register is stored on the stack, fall back to the stack slot that
will be used by the ftrace exit code to restore LR in the instrumented
function's execution context.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Steven Rostedt (Google) <rostedt@goodmis.org>
2022-02-09 09:13:59 +01:00
Ard Biesheuvel
538b9265c0 ARM: unwind: track location of LR value in stack frame
The ftrace graph tracer needs to override the return address of an
instrumented function, in order to install a hook that gets invoked when
the function returns again.

Currently, we only support this when building for ARM using GCC with
frame pointers, as in this case, it is guaranteed that the function will
reload LR from [FP, #-4] in all cases, and we can simply pass that
address to the ftrace code.

In order to support this for configurations that rely on the EABI
unwinder, such as Thumb2 builds, make the unwinder keep track of the
address from which LR was unwound, permitting ftrace to make use of this
in a subsequent patch.

Drop the call to is_kernel_text_address(), which is problematic in terms
of ftrace recursion, given that it may be instrumented itself. The call
is redundant anyway, as no unwind directives will be found unless the PC
points to memory that is known to contain executable code.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
2022-02-09 09:13:43 +01:00
Ard Biesheuvel
953f534a7e ARM: ftrace: enable HAVE_FUNCTION_GRAPH_FP_TEST
Fix the frame pointer handling in the function graph tracer entry and
exit code so we can enable HAVE_FUNCTION_GRAPH_FP_TEST. Instead of using
FP directly (which will have different values between the entry and exit
pieces of the function graph tracer), use the value of SP at entry and
exit, as we can derive the former value from the frame pointer.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Steven Rostedt (Google) <rostedt@goodmis.org>
2022-02-09 09:12:33 +01:00
Ard Biesheuvel
65aa7e342a ARM: ftrace: avoid unnecessary literal loads
Avoid explicit literal loads and instead, use accessor macros that
generate the optimal sequence depending on the architecture revision
being targeted.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Steven Rostedt (Google) <rostedt@goodmis.org>
2022-02-09 09:12:33 +01:00
Ard Biesheuvel
d119678708 ARM: ftrace: avoid redundant loads or clobbering IP
Tweak the ftrace return paths to avoid redundant loads of SP, as well as
unnecessary clobbering of IP.

This also fixes the inconsistency of using MOV to perform a function
return, which is sub-optimal on recent micro-architectures but more
importantly, does not perform an interworking return, unlike compiler
generated function returns in Thumb2 builds.

Let's fix this by popping PC from the stack like most ordinary code
does.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Steven Rostedt (Google) <rostedt@goodmis.org>
2022-02-09 09:12:32 +01:00
Ard Biesheuvel
dc438db582 ARM: ftrace: use trampolines to keep .init.text in branching range
Kernel images that are large in comparison to the range of a direct
branch may fail to work as expected with ftrace, as patching a direct
branch to one of the core ftrace routines may not be possible from the
.init.text section, if it is emitted too far away from the normal .text
section.

This is more likely to affect Thumb2 builds, given that its range is
only -/+ 16 MiB (as opposed to ARM which has -/+ 32 MiB), but may occur
in either ISA.

To work around this, add a couple of trampolines to .init.text and
swap these in when the ftrace patching code is operating on callers in
.init.text.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Steven Rostedt (Google) <rostedt@goodmis.org>
2022-02-09 09:12:32 +01:00
Ard Biesheuvel
ad1c2f39fd ARM: ftrace: use ADD not POP to counter PUSH at entry
The compiler emitted hook used for ftrace consists of a PUSH {LR} to
preserve the link register, followed by a branch-and-link (BL) to
__gnu_mount_nc. Dynamic ftrace patches away the latter to turn the
combined sequence into a NOP, using a POP {LR} instruction.

This is not necessary, since the link register does not get clobbered in
this case, and simply adding #4 to the stack pointer is sufficient, and
avoids a memory access that may take a few cycles to resolve depending
on the micro-architecture.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Steven Rostedt (Google) <rostedt@goodmis.org>
2022-02-09 09:12:32 +01:00
Ard Biesheuvel
dd88b03ff0 ARM: ftrace: ensure that ADR takes the Thumb bit into account
Using ADR to take the address of 'ftrace_stub' via a local label
produces an address that has the Thumb bit cleared, which means the
subsequent comparison is guaranteed to fail. Instead, use the badr
macro, which forces the Thumb bit to be set.

Fixes: a3ba87a614 ("ARM: 6316/1: ftrace: add Thumb-2 support")
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Steven Rostedt (Google) <rostedt@goodmis.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2022-02-09 09:12:32 +01:00
Denys Drozdov
4ce9f72e00 ARM: dts: imx7s: Define operating points table for cpufreq
Processor operating points for imx7s.dtsi should be properly defined to
perform correct imx-cpufreq-dt probe and registration and provide an
access to the temperature sensors using the i.MX thermal driver.

Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2022-02-09 13:20:03 +05:30
Iwona Winiarska
ac2743a7f6 ARM: dts: aspeed: Add PECI controller nodes
Add PECI controller nodes with all required information.

Co-developed-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
Link: https://lore.kernel.org/r/20220208153639.255278-4-iwona.winiarska@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-09 08:04:43 +01:00
Arnd Bergmann
7896020612 Merge tag 'amlogic-fixes-v5.17-rc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/fixes
Amlogic fixes for v5.17-rc
- meson6/meson8/meson8b UART compatible fixup to notably fix earlycon

* tag 'amlogic-fixes-v5.17-rc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  ARM: dts: meson8b: Fix the UART device-tree schema validation
  ARM: dts: meson8: Fix the UART device-tree schema validation
  ARM: dts: meson: Fix the UART compatible strings

Link: https://lore.kernel.org/r/746a7f25-1c96-9d27-3a08-e86b2af608ef@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-08 10:51:05 +01:00
Arnd Bergmann
6efb9f739d Merge tag 'socfpga_fix_for_v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/fixes
SoCFPGA fix for v5.17, part 1
- Fix a build error for socfpga_defconfig

* tag 'socfpga_fix_for_v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  ARM: socfpga: fix missing RESET_CONTROLLER

Link: https://lore.kernel.org/r/20220207101002.7566-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-08 09:57:07 +01:00
Linus Walleij
d9058d6a0e ARM: dts: Fix boot regression on Skomer
The signal routing on the Skomer board was incorrect making
it impossible to mount root from the SD card. Fix this up.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Cc: stable@vger.kernel.org
Cc: Stefan Hansson <newbyte@disroot.org>
Link: https://lore.kernel.org/r/20220205235312.446730-1-linus.walleij@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-08 09:56:36 +01:00
Rob Herring
724004a11a ARM: dts: spear320: Drop unused and undocumented 'irq-over-gpio' property
The property 'irq-over-gpio' is both unused and undocumented. It also
happens to collide with standard *-gpio properties. As it is not needed,
drop it.

Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220204004117.1232902-1-robh@kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-08 09:55:02 +01:00
Arnd Bergmann
f8d1fc05e2 Merge tag 'imx-fixes-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.17:

- Fix sound card model for MBa8Mx board.
- Drop i.MX8MQ LCDIF port node unit-address to fix DTC warning.
- Add missing SD card detect line for imx6qdl-udoo board.
- Remove MX23_PAD_SSP1_DETECT from imx23-evk hog group. It fixes the
  broken SD ard support on the board.
- A couple of fixes from Martin Kepplinger to fix the MIPI_CSI port
  number on i.MX8MQ.
- Re-enable ftm_alarm0 device on ls1028a-kontron-sl28 board which was
  disabled accidentally.
- Fix 'assigned-clocks-parents' typo in i.MX7ULP watchdog device node.
- Disable GPU device on imx8mn-venice-gw7902 board, as it uses
  MIMX8MN5CVTI SoC which does not integrate a GPU.

* tag 'imx-fixes-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: imx8mq: fix lcdif port node
  arm64: dts: imx8mq-librem5: fix mipi_csi1 port number to sensor
  arm64: dts: imx8mq: fix mipi_csi bidirectional port numbers
  ARM: dts: imx7ulp: Fix 'assigned-clocks-parents' typo
  arm64: dts: ls1028a: sl28: re-enable ftm_alarm0
  arm64: dts: freescale: Fix sound card model for MBa8Mx
  ARM: dts: imx23-evk: Remove MX23_PAD_SSP1_DETECT from hog group
  ARM: dts: imx6qdl-udoo: Properly describe the SD card detect
  arm64: dts: imx8mn-venice-gw7902: disable gpu

Link: https://lore.kernel.org/r/20220129073150.GZ4686@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-08 09:51:30 +01:00
Arnd Bergmann
486343d372 Merge tag 'omap-for-v5.17/fixes-for-merge-window-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes
Fixes for omaps

A series of fixes for omap variants for minor issues, and a fix for a timer
regression for some omap3 beagleboard versions.

The timer fix needs to patch both the dts and the timer code because
otherwise the timer quirk handling for old dtbs will prevent the dts fix
from working.

The other changes are for issues found by automated analysis, a macasp
typo fix, and two cosmetic fixes for clocks.

* tag 'omap-for-v5.17/fixes-for-merge-window-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: Don't use legacy clock defines for dra7 clkctrl
  clk: ti: Move dra7 clock devices out of the legacy section
  ARM: dts: Fix timer regression for beagleboard revision c
  ARM: dts: am335x-wega: Fix typo in mcasp property rx-num-evt
  ARM: OMAP2+: adjust the location of put_device() call in omapdss_init_of
  ARM: OMAP2+: hwmod: Add of_node_put() before break

Link: https://lore.kernel.org/r/pull-1641801310-149268@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-07 17:42:44 +01:00
Olivier Moysan
ee2aacb6f3 ARM: dts: stm32: fix AV96 board SAI2 pin muxing on stm32mp15
Replace sai2a-2 node name by sai2a-sleep-2, to avoid name
duplication.

Fixes: 1a9a9d226f ("ARM: dts: stm32: fix AV96 board SAI2 pin muxing on stm32mp15")

Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07 11:52:33 +01:00
Dillon Min
6ced294e9f ARM: dts: stm32: Enable DMA2D on STM32F469-DISCO board
Enable DMA2D on STM32F469-DISCO board.

Signed-off-by: Dillon Min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07 11:46:13 +01:00
Dillon Min
b8b34b31fb ARM: dts: stm32: Add DMA2D support for STM32F429 series soc
Add DMA2D for STM32F429 series soc.

Signed-off-by: Dillon Min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07 11:45:59 +01:00
Yann Gautier
2f715efc19 ARM: dts: stm32: add sdmmc2 pins for STM32MP13
Those pins are used for SDIO on STM32MP135F-DK board.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07 11:16:27 +01:00
Yann Gautier
a7f6433fed ARM: dts: stm32: add SDMMC2 in STM32MP13 DT
STM32MP13 embeds 2 instances of SDMMC peripheral.
Add the required information in SoC device tree file.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07 11:16:27 +01:00
Yann Gautier
efdf018e31 ARM: dts: stm32: update SDMMC version for STM32MP13
On STM32MP13, the embedded SDMMC peripheral version is v2.2.
Update arm,primecell-periphid for SDMMC in the SoC DT file.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07 11:16:27 +01:00
Yann Gautier
a6d3260019 ARM: dts: stm32: add sdmmc sleep config for STM32MP135F-DK
Add sleep properties in pinctrl config for SDMMC1.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07 11:16:27 +01:00
Yann Gautier
ddc688c7b9 ARM: dts: stm32: add sdmmc sleep pins for STM32MP13
The node sdmmc1_b4_sleep_pins_a is added in stm32mp13-pinctrl.dtsi file.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07 11:16:27 +01:00
Yann Gautier
0dbdb4862c ARM: dts: stm32: update SDMMC clock slew-rate on STM32MP135F-DK board
Add sdmmc1_clk_pins_a in sdmmc1 pinctrl nodes, to properly manage
clock slew-rate.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07 11:16:27 +01:00
Gerald Baeza
864fdbe756 ARM: dts: stm32: update sdmmc slew-rate in stm32mp13 pinctrl
SDMMC1/2 CK <= 50 MHz so slew-rate = <1>
A new node sdmmc1-clk-0 is added to manage the new clock pin slew-rate.

Signed-off-by: Gerald Baeza <gerald.baeza@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07 11:16:27 +01:00
Yann Gautier
2434845bae ARM: dts: stm32: increase SDMMC max-frequency for STM32MP13
The max-frequency limitation is due to IOs.
On STM32MP13, it is 130MHz. Update the corresponding property.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07 11:16:27 +01:00
Yann Gautier
3314f45c83 ARM: dts: stm32: add st,stm32-sdmmc2 compatible on stm32mp131
To align with bootloaders device tree files, and thanks to what was
added in yaml file [1], the compatible property for sdmmc1 node is
updated with "st,stm32-sdmmc2" string.

[1] commit 552bc46484 ("dt-bindings: mmc: mmci: Add st,stm32-sdmmc2
    compatible")

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07 11:16:27 +01:00
Yann Gautier
0bb6b0f2e0 ARM: dts: stm32: add st,stm32-sdmmc2 compatible on stm32mp151
To align with bootloaders device tree files, and thanks to what was
added in yaml file [1], the compatible property for sdmmc nodes is
updated with "st,stm32-sdmmc2" string.

[1] commit 552bc46484 ("dt-bindings: mmc: mmci: Add st,stm32-sdmmc2
    compatible")

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07 11:16:27 +01:00
Krzysztof Kozlowski
3037b174b1 ARM: socfpga: fix missing RESET_CONTROLLER
The SocFPGA machine since commit b3ca9888f3 ("reset: socfpga: add an
early reset driver for SoCFPGA") uses reset controller, so it should
select RESET_CONTROLLER explicitly.  Selecting ARCH_HAS_RESET_CONTROLLER
is not enough because it affects only default choice still allowing a
non-buildable configuration:

  /usr/bin/arm-linux-gnueabi-ld: arch/arm/mach-socfpga/socfpga.o: in function `socfpga_init_irq':
  arch/arm/mach-socfpga/socfpga.c:56: undefined reference to `socfpga_reset_init'

Reported-by: kernel test robot <lkp@intel.com>
Cc: <stable@vger.kernel.org>
Fixes: b3ca9888f3 ("reset: socfpga: add an early reset driver for SoCFPGA")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-07 03:54:42 -06:00
Marek Vasut
2a8e68ad06 ARM: dts: stm32: Drop duplicate status okay from DHCOM gpioc node
The stm32mp15xxaa-pinctrl.dtsi included in stm32mp15xx-dhcom-som.dtsi
already sets status = "okay" in gpioc: gpio@50004000 node, drop the
duplicate from stm32mp15xx-dhcom-som.dtsi . No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: kernel@dh-electronics.com
Cc: linux-stm32@st-md-mailman.stormreply.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07 10:48:44 +01:00
Reinhold Mueller
16e3e44c5b ARM: dts: stm32: Add support for the emtrion emSBC-Argon
This patch presents the DT patches for the emtrion GmbH
Argon board series. They are available with STM32MP157
from STMicroelectronics with 512 MByte Memory.

The devicetree stm32mp157c-emstamp-argon.dtsi is the common part
providing the module components and the basic support for the SoC.
The support for the emSBC-Argon baseboard in the developer-kit
configuration is provided by the stm32mp157c-emsbc-argon.dts file.

Signed-off-by: Reinhold Mueller <reinhold.mueller@emtrion.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07 10:31:19 +01:00
Rob Herring
d65e4afcc8 ARM: dts: sun8i-h3: Drop args in 'thermal-sensors'
The "allwinner,sun8i-h3-ths" thermal sensor has 0 argument cells, but
the consumer has an argument cell. It is ignored by the code, but the
error was found with some upcoming schema validation changes. The schema
and code both agree that 0 cells is correct.

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20220204002802.1214602-1-robh@kernel.org
2022-02-07 10:16:10 +01:00
Paul Kocialkowski
c4af51698c ARM: dts: sun8i: v3s: Move the csi1 block to follow address order
The csi1 block node was mistakenly added before the gic node, although
its address comes after the gic's. Move the node to its correct
position.

Fixes: 90e048101f ("ARM: dts: sun8i: V3/V3s/S3/S3L: add CSI1 device node")
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20220205185429.2278860-2-paul.kocialkowski@bootlin.com
2022-02-07 10:02:26 +01:00
Fabrice Gasnier
b380a2d189 ARM: dts: stm32: remove timer5 duplicate unit-address on stm32f4 series
Remove the following warnings seen when building with W=1.
Warning (unique_unit_address): /soc/timer@40000c00: duplicate unit-address
(also used in node /soc/timers@40000c00)
This approach is based on some discussions[1], to restructure the dtsi
and dts files.

Timer5 is enabled by default on stm32f4 series, to act as clockevent. In
order to get rid of the W=1 warning, and be compliant with dt-schemas
(e.g. dtbs_check):
- In stm32f429.dtsi:
  . Keep the more complete timers5 description
  . Remove the most simple timer5 node that is duplicate
- In each board:
  . adopt "st,stm32-timer" compatible for timers5, also add the interrupt
  . use /delete-property/ and /delete-node/ so the it matches the
    clockevent bindings

Note: all this is done in one shot (e.g. not split) to keep clockevent
functionality.

[1] https://lore.kernel.org/linux-arm-kernel/Yaf4jiZIp8+ndaXs@robh.at.kernel.org/

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07 09:52:57 +01:00
Fabrice Gasnier
85045dd453 ARM: dts: stm32: remove some timer duplicate unit-address on stm32f4 series
Several unused "timer" are duplicate nodes of "timers" nodes.
There are two dt-schemas:
- timer/st,stm32-timer.yaml: A timer is needed on STM32F4 series, on all
  boards, to act as clockevent.
- mfd/st,stm32-timers.yaml: Timers can be used for other purpose.

By default, timer5 is left enabled to be used as clockevent. Remove all
other timer clockevent nodes that are currently unused and duplicated.

This removes several messages: Warning (unique_unit_address): /soc/timer@..
duplicate unit-address (also used in node /soc/timers@...)

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07 09:52:57 +01:00
Krzysztof Kozlowski
f5b721d2c9 ARM: dts: exynos: use generic node name for LPDDR3 timings in Odroid
The node names should have generic name, so use "timings" for LPDDR3
timings.  This will also be required by dtschema.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220201114749.88500-1-krzysztof.kozlowski@canonical.com
2022-02-05 13:04:43 +01:00
Ard Biesheuvel
c8bf850e99 crypto: arm/aes-neonbs-ctr - deal with non-multiples of AES block size
Instead of falling back to C code to deal with the final bit of input
that is not a round multiple of the block size, handle this in the asm
code, permitting us to use overlapping loads and stores for performance,
and implement the 16-byte wide XOR using a single NEON instruction.

Since NEON loads and stores have a natural width of 16 bytes, we need to
handle inputs of less than 16 bytes in a special way, but this rarely
occurs in practice so it does not impact performance. All other input
sizes can be consumed directly by the NEON asm code, although it should
be noted that the core AES transform can still only process 128 bytes (8
AES blocks) at a time.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2022-02-05 15:10:51 +11:00
Linus Walleij
fb7f1727fd ARM: dts: ux500: Add battery thermal zones and NTCs
Add the thermal zones and thermistors used by the battery
charging code to the device tree so the charger code can look
up and poll the thermal zone for battery temperature.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-02-05 01:25:30 +01:00
Jason A. Donenfeld
d2a02e3c8b lib/crypto: blake2s: avoid indirect calls to compression function for Clang CFI
blake2s_compress_generic is weakly aliased by blake2s_compress. The
current harness for function selection uses a function pointer, which is
ordinarily inlined and resolved at compile time. But when Clang's CFI is
enabled, CFI still triggers when making an indirect call via a weak
symbol. This seems like a bug in Clang's CFI, as though it's bucketing
weak symbols and strong symbols differently. It also only seems to
trigger when "full LTO" mode is used, rather than "thin LTO".

[    0.000000][    T0] Kernel panic - not syncing: CFI failure (target: blake2s_compress_generic+0x0/0x1444)
[    0.000000][    T0] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.16.0-mainline-06981-g076c855b846e #1
[    0.000000][    T0] Hardware name: MT6873 (DT)
[    0.000000][    T0] Call trace:
[    0.000000][    T0]  dump_backtrace+0xfc/0x1dc
[    0.000000][    T0]  dump_stack_lvl+0xa8/0x11c
[    0.000000][    T0]  panic+0x194/0x464
[    0.000000][    T0]  __cfi_check_fail+0x54/0x58
[    0.000000][    T0]  __cfi_slowpath_diag+0x354/0x4b0
[    0.000000][    T0]  blake2s_update+0x14c/0x178
[    0.000000][    T0]  _extract_entropy+0xf4/0x29c
[    0.000000][    T0]  crng_initialize_primary+0x24/0x94
[    0.000000][    T0]  rand_initialize+0x2c/0x6c
[    0.000000][    T0]  start_kernel+0x2f8/0x65c
[    0.000000][    T0]  __primary_switched+0xc4/0x7be4
[    0.000000][    T0] Rebooting in 5 seconds..

Nonetheless, the function pointer method isn't so terrific anyway, so
this patch replaces it with a simple boolean, which also gets inlined
away. This successfully works around the Clang bug.

In general, I'm not too keen on all of the indirection involved here; it
clearly does more harm than good. Hopefully the whole thing can get
cleaned up down the road when lib/crypto is overhauled more
comprehensively. But for now, we go with a simple bandaid.

Fixes: 6048fdcc5f ("lib/crypto: blake2s: include as built-in")
Link: https://github.com/ClangBuiltLinux/linux/issues/1567
Reported-by: Miles Chen <miles.chen@mediatek.com>
Tested-by: Miles Chen <miles.chen@mediatek.com>
Tested-by: Nathan Chancellor <nathan@kernel.org>
Tested-by: John Stultz <john.stultz@linaro.org>
Acked-by: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
2022-02-04 19:22:32 +01:00