Commit Graph

66225 Commits

Author SHA1 Message Date
Jae Hyun Yoo
890362d41b ARM: dts: aspeed-g6: fix SPI1/SPI2 quad pin group
Fix incorrect function mappings in pinctrl_qspi1_default and
pinctrl_qspi2_default since their function should be SPI1 and
SPI2 respectively.

Fixes: f510f04c8c ("ARM: dts: aspeed: Add AST2600 pinmux nodes")
Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20220329173932.2588289-8-quic_jaehyoo@quicinc.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-04-13 11:53:52 +09:30
Johnny Huang
e194aff006 ARM: dts: aspeed-g6: add FWQSPI group in pinctrl dtsi
Add FWSPIDQ2 and FWSPIDQ3 group to support AST2600 FW SPI quad mode.
These pins can be used with dedicated FW SPI pins - FWSPICS0#,
FWSPICK, FWSPIMOSI and FWSPIMISO.

Signed-off-by: Johnny Huang <johnny_huang@aspeedtech.com>
Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20220329173932.2588289-7-quic_jaehyoo@quicinc.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-04-13 11:53:52 +09:30
Jae Hyun Yoo
efddaa397c ARM: dts: aspeed-g6: remove FWQSPID group in pinctrl dtsi
FWSPIDQ2 and FWSPIDQ3 are not part of FWSPI18 interface so remove
FWQSPID group in pinctrl dtsi. These pins must be used with the
FWSPI pins that are dedicated for boot SPI interface which provides
same 3.3v logic level.

Fixes: 2f6edb6bcb ("ARM: dts: aspeed: Fix AST2600 quad spi group")
Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20220329173932.2588289-2-quic_jaehyoo@quicinc.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-04-13 11:53:52 +09:30
Rohit Agarwal
ce91bc005e ARM: dts: qcom: sdx65: Add support for APCS block
The APCS block on SDX65 acts as a mailbox controller and also provides
clock output for the Cortex A7 CPU.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1645505785-2271-5-git-send-email-quic_rohiagar@quicinc.com
2022-04-12 21:22:34 -05:00
Rohit Agarwal
02c5553523 ARM: dts: qcom: sdx65: Add support for A7 PLL clock
On SDX65 there is a separate A7 PLL which is used to provide high
frequency clock to the Cortex A7 CPU via a MUX.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1645505785-2271-4-git-send-email-quic_rohiagar@quicinc.com
2022-04-12 21:22:26 -05:00
Rayyan Ansari
c20aa951ee ARM: dts: qcom: pm8226: Add VADC node
Add a node for the voltage ADC (VADC) found in PM8226.

Signed-off-by: Rayyan Ansari <rayyan@ansari.sh>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220209163841.7360-1-rayyan@ansari.sh
2022-04-12 21:20:06 -05:00
Kuldeep Singh
7224013d4b ARM: dts: qcom: ipq8064: User generic node name for DMA
Qcom BAM DT spec expects generic DMA controller node name as
"dma-controller" to enable validations.

Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220410175056.79330-6-singh.kuldeep87k@gmail.com
2022-04-12 19:36:17 -05:00
Kuldeep Singh
a86efc02b3 ARM: dts: qcom: ipq4019: User generic node name for DMA
Qcom BAM DT spec expects generic DMA controller node name as
"dma-controller" to enable validations.

Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220410175056.79330-5-singh.kuldeep87k@gmail.com
2022-04-12 19:36:17 -05:00
Kuldeep Singh
fb1bdb7e78 ARM: dts: qcom: apq8064: User generic node name for DMA
Qcom BAM DT spec expects generic DMA controller node name as
"dma-controller" to enable validations.

Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220410175056.79330-2-singh.kuldeep87k@gmail.com
2022-04-12 14:24:40 -05:00
Kuldeep Singh
fbf64afd16 ARM: dts: qcom: mdm9615: User generic node name for DMA
Qcom BAM DT spec expects generic DMA controller node name as
"dma-controller" to enable validations.

Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220410175056.79330-3-singh.kuldeep87k@gmail.com
2022-04-12 14:24:26 -05:00
Tony Lindgren
8d2453d9a3 ARM: dts: dra7: Fix suspend warning for vpe powerdomain
We currently are getting the following warning after a system suspend:

Powerdomain (vpe_pwrdm) didn't enter target state 0

Looks like this is because the STANDBYMODE bit for SMART_IDLE should
not be used. The TRM "Table 12-348. VPE_SYSCONFIG" says that the value
for SMART_IDLE is "0x2: Same behavior as bit-field value of 0x1". But
if the SMART_IDLE value is used, PM_VPE_PWRSTST LASTPOWERSTATEENTERED
bits always show value of 3.

Let's fix the issue by dropping SMART_IDLE for vpe. And let's also add
the missing the powerdomain for vpe.

Fixes: 1a20951605 ("ARM: dts: dra7: Add ti-sysc node for VPE")
Cc: Benoit Parrot <bparrot@ti.com>
Reported-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2022-04-12 12:55:47 +03:00
Miaoqian Lin
0f83e6b416 ARM: OMAP2+: Fix refcount leak in omap_gic_of_init
The of_find_compatible_node() function returns a node pointer with
refcount incremented, We should use of_node_put() on it when done
Add the missing of_node_put() to release the refcount.

Fixes: fd1c078614 ("ARM: OMAP4: Fix the init code to have OMAP4460 errata available in DT build")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Message-Id: <20220309104302.18398-1-linmq006@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2022-04-12 12:55:46 +03:00
Jack Matthews
09e3dac420 ARM: dts: qcom: pm8226: add node for RTC
Add a node for PM8226's real time clock.

Signed-off-by: Jack Matthews <jm5112356@gmail.com>
Reviewed-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220209165742.652890-1-jm5112356@gmail.com
2022-04-11 21:42:31 -05:00
Krzysztof Kozlowski
e4cbe44ec6 ARM: dts: qcom: msm8660: disable GSBI8
The GSBI8 child node (I2C controller) is disabled, so as parent GSBI
node should be the same.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220405063451.12011-6-krzysztof.kozlowski@linaro.org
2022-04-11 21:38:03 -05:00
Krzysztof Kozlowski
bec8191807 ARM: dts: qcom: ipq4019: align clocks in I2C with DT schema
The DT schema expects clocks core-iface order.  No functional change.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220405063451.12011-5-krzysztof.kozlowski@linaro.org
2022-04-11 21:37:53 -05:00
Krzysztof Kozlowski
17c15a4ccf ARM: dts: qcom: ipq4019: align dmas in SPI/UART with DT schema
The DT schema expects dma channels in tx-rx order.  No functional
change.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220405063451.12011-4-krzysztof.kozlowski@linaro.org
2022-04-11 21:37:45 -05:00
Krzysztof Kozlowski
0f375d3aa6 ARM: dts: qcom: rename WCNSS child name to bluetooth
The "bluetooth" is more popular and more descriptive than "bt", for a
Bluetooth device.  The WCNSS DT schema will expect such naming.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220405065752.27389-1-krzysztof.kozlowski@linaro.org
2022-04-11 21:35:57 -05:00
Krzysztof Kozlowski
50769f32af ARM: dts: qcom: align SPI NOR node name with dtschema
The node names should be generic and SPI NOR dtschema expects "flash".

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220407143112.294930-1-krzysztof.kozlowski@linaro.org
2022-04-11 21:28:24 -05:00
Tony Lindgren
c7d7d0ce29 ARM: dts: Drop custom clkctrl compatible and update omap5 l4per
We can now use the clock-output-names and don't need custom compatible
values for each clkctrl instance. And we can use a generic name also for
the clock manager instance.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Tero Kristo <kristo@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Message-Id: <20220204084339.12341-5-tony@atomide.com>
2022-04-11 16:03:35 +03:00
Tony Lindgren
7359c0aee7 ARM: dts: Add clock-output-names for omap5
To stop using the non-standard node name based clock naming, let's
first add the clock-output-names property. This allows us to stop using
the internal legacy clock naming and unify the naming for the TI SoCs in
the following patches.

Note that we must wait on fixing the node naming issues until after the
internal clock names have been updated to avoid adding name translation
unnecessarily.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Tero Kristo <kristo@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Message-Id: <20220204084339.12341-4-tony@atomide.com>
2022-04-11 16:03:34 +03:00
Tony Lindgren
0752506039 ARM: dts: Drop custom clkctrl compatible and update omap4 l4per
We can now use the clock-output-names and don't need custom compatible
values for each clkctrl instance. And we can use a generic name also for
the clock manager instance.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Tero Kristo <kristo@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Message-Id: <20220204084339.12341-3-tony@atomide.com>
2022-04-11 16:03:34 +03:00
Tony Lindgren
da541a6c19 ARM: dts: Add clock-output-names for omap4
To stop using the non-standard node name based clock naming, let's
first add the clock-output-names property. This allows us to stop using
the internal legacy clock naming and unify the naming for the TI SoCs in
the following patches.

Note that we must wait on fixing the node naming issues until after the
internal clock names have been updated to avoid adding name translation
unnecessarily.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Tero Kristo <kristo@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Message-Id: <20220204084339.12341-2-tony@atomide.com>
2022-04-11 16:03:34 +03:00
Tony Lindgren
f8ca5f5ae5 ARM: dts: Use clock-output-names for am4
With the TI clocks supporting the use of clock-output-names devicetree
property, we no longer need to use non-standard node names for clocks.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Tero Kristo <kristo@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Message-Id: <20220204081529.57694-1-tony@atomide.com>
2022-04-11 16:03:33 +03:00
Tony Lindgren
e4920169e7 ARM: dts: Use clock-output-names for dra7
With the TI clocks supporting the use of clock-output-names devicetree
property, we no longer need to use non-standard node names for clocks.

Depends-on: 31aa7056bb ("ARM: dts: Don't use legacy clock defines for dra7 clkctrl")
Depends-on: 9206a3af4f ("clk: ti: Move dra7 clock devices out of the legacy section")
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Tero Kristo <kristo@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Message-Id: <20220204080842.40673-1-tony@atomide.com>
2022-04-11 16:03:33 +03:00
Tony Lindgren
ec7aa25fa4 ARM: dts: Use clock-output-names for am3
With the TI clocks supporting the use of clock-output-names devicetree
property, we no longer need to use non-standard node names for clocks.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Tero Kristo <kristo@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Message-Id: <20220204073333.18175-5-tony@atomide.com>
2022-04-11 16:03:33 +03:00
Tony Lindgren
9bc059f71c ARM: dts: Add clksel node for am3 clkout
Let's add a clksel node for the component clocks to avoid devicetree
unique_unit_address warnings. The component clocks can now get IO address
from the parent clksel node.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Tero Kristo <kristo@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Message-Id: <20220204073333.18175-4-tony@atomide.com>
2022-04-11 16:03:32 +03:00
Tony Lindgren
00950028d0 ARM: dts: Add clksel node for am3 gfx
Let's add a clksel node for the component clocks to avoid devicetree
unique_unit_address warnings. The component clocks can now get IO address
from the parent clksel node.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Tero Kristo <kristo@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Message-Id: <20220204073333.18175-3-tony@atomide.com>
2022-04-11 16:03:32 +03:00
Tony Lindgren
c2f2646057 ARM: dts: Add clksel node for am3 ehrpwm
Let's add a clksel node for the component clocks to avoid devicetree
unique_unit_address warnings. The component clocks can now get IO address
from the parent clksel node.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Tero Kristo <kristo@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Message-Id: <20220204073333.18175-2-tony@atomide.com>
2022-04-11 16:03:32 +03:00
Krzysztof Kozlowski
ba9fe460dc ARM: dts: imx: align SPI NOR node name with dtschema
The node names should be generic and SPI NOR dtschema expects "flash".

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 14:07:47 +08:00
Thorsten Scherer
3d397a1277 ARM: dts: ci4x10: Adapt to changes in imx6qdl.dtsi regarding fec clocks
Commit f3e7dae323 ("ARM: dts: imx6qdl: add enet_out clk
support") added another item to the list of clocks for the fec
device. As imx6dl-eckelmann-ci4x10.dts only overwrites clocks,
but not clock-names this resulted in an inconsistency with
clocks having one item more than clock-names.

Also overwrite clock-names with the same value as in
imx6qdl.dtsi. This is a no-op today, but prevents similar
inconsistencies if the soc file will be changed in a similar way
in the future.

Signed-off-by: Thorsten Scherer <t.scherer@eckelmann.de>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Fixes: f3e7dae323 ("ARM: dts: imx6qdl: add enet_out clk support")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 14:07:32 +08:00
Uwe Kleine-König
94382f0870 ARM: dts: imx6qdl-tx6: Drop some duplicated properties
clocks and clock-names are already present in imx6qdl.dtsi since commit
f3e7dae323 ("ARM: dts: imx6qdl: add enet_out clk support"). The change
to imx6qdl.dtsi was explicitly done to avoid this construct in this
file, so benefit from the change and drop these properties.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 09:38:37 +08:00
Rob Herring
7af1caf878 ARM: dts: imx: Fix boolean properties with values
Boolean properties in DT are present or not present and don't take a value.
A property such as 'foo = <0>;' evaluated to true. IOW, the value doesn't
matter.

It may have been intended that 0 values are false, but there is no change
in behavior with this patch.

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 09:37:40 +08:00
Johan Jonker
53070cfa82 ARM: dts: rockchip: rename pcfg_pull_default node name on rk3036
Rename pcfg_pull_default node name so that it fits the regex.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20220330133952.1949-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-04-11 02:16:33 +02:00
Fabio Estevam
fa51e1dc4b ARM: dts: imx6qdl-apalis: Fix sgtl5000 detection issue
On a custom carrier board with a i.MX6Q Apalis SoM, the sgtl5000 codec
on the SoM is often not detected and the following error message is
seen when the sgtl5000 driver tries to read the ID register:

sgtl5000 1-000a: Error reading chip id -6

The reason for the error is that the MCLK clock is not provided
early enough.

Fix the problem by describing the MCLK pinctrl inside the codec
node instead of placing it inside the audmux pinctrl group.

With this change applied the sgtl5000 is always detected on every boot.

Fixes: 693e3ffaae ("ARM: dts: imx6: Add support for Toradex Apalis iMX6Q/D SoM")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-10 16:02:28 +08:00
Krzysztof Kozlowski
9e916fb9bc ARM: dts: s5pv210: align DMA channels with dtschema
dtschema expects DMA channels in specific order (tx, rx and tx-sec).
The order actually should not matter because dma-names is used however
let's make it aligned with dtschema to suppress warnings like:

  i2s@eee30000: dma-names: ['rx', 'tx', 'tx-sec'] is not valid under any of the given schemas

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Co-developed-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Link: https://lore.kernel.org/r/CY4PR04MB056779A9C50DC95987C5272ACB1C9@CY4PR04MB0567.namprd04.prod.outlook.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-04-09 18:50:05 +02:00
Jonathan Bakker
21e4b7d151 ARM: dts: s5pv210: Adjust DMA node names to match spec
DMA node names should be dma-controller according to the DT spec,
so rename them from pdma/mdma.  Prevents warnings when running
make dtbs_check

Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Link: https://lore.kernel.org/r/CY4PR04MB0567F52ABAE0A3CCD3C7CE59CB1C9@CY4PR04MB0567.namprd04.prod.outlook.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-04-09 18:50:05 +02:00
Jonathan Bakker
9576ec1226 ARM: dts: s5pv210: Adjust memory reg entries to match spec
The reg property of memory nodes should have pairs of offset, size;
not all memory banks lumped in as one.

Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Link: https://lore.kernel.org/r/CY4PR04MB05677849A13F41BF603906DFCB1C9@CY4PR04MB0567.namprd04.prod.outlook.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-04-09 18:50:05 +02:00
Jonathan Bakker
3f5e3d3a8b ARM: dts: s5pv210: Correct interrupt name for bluetooth in Aries
Correct the name of the bluetooth interrupt from host-wake to
host-wakeup.

Fixes: 1c65b61844 ("ARM: dts: s5pv210: Correct BCM4329 bluetooth node")
Cc: <stable@vger.kernel.org>
Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Link: https://lore.kernel.org/r/CY4PR04MB0567495CFCBDC8D408D44199CB1C9@CY4PR04MB0567.namprd04.prod.outlook.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-04-09 18:49:51 +02:00
Jonathan Bakker
096f585073 ARM: dts: s5pv210: Remove spi-cs-high on panel in Aries
Since commit 766c6b63aa ("spi: fix client driver breakages when using
GPIO descriptors"), the panel has been blank due to an inverted CS GPIO.
In order to correct this, drop the spi-cs-high from the panel SPI device.

Fixes: 766c6b63aa ("spi: fix client driver breakages when using GPIO descriptors")
Cc: <stable@vger.kernel.org>
Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Link: https://lore.kernel.org/r/CY4PR04MB05670C771062570E911AF3B4CB1C9@CY4PR04MB0567.namprd04.prod.outlook.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-04-09 18:49:47 +02:00
Alexander Stein
90f38145e6 ARM: dts: imx7s: fix iomuxc_lpsr node name
Schema requires the node being named 'pinctrl'.

Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-09 10:52:34 +08:00
Arnd Bergmann
3d427228f7 ARM: ixp4xx: enable multiplatform support
After all the work that Linus Walleij did on this platform, it can be
part of a generic kernel build as well.

Note that there are known bugs in little-endian mode on ixp4xx, and
no other ARMv5 platform at this point supports big-endian mode, or is
likely to in the future, so there is limited practical value in this,
but it helps with build testing and ixp4xx little-endian support may
get fixed in the future.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-08 17:20:55 +02:00
Arnd Bergmann
5d6f52671e ARM: rework endianess selection
Choosing big-endian vs little-endian kernels in Kconfig has not worked
correctly since the introduction of CONFIG_ARCH_MULTIPLATFORM a long
time ago.

The problems is that CONFIG_BIG_ENDIAN depends on
ARCH_SUPPORTS_BIG_ENDIAN, which can set by any one platform
in the config, but would actually have to be supported by all
of them.

This was mostly ok for ARMv6/ARMv7 builds, since these are BE8 and
tend to just work aside from problems in nonportable device drivers.
For ARMv4/v5 machines, CONFIG_BIG_ENDIAN and CONFIG_ARCH_MULTIPLATFORM
were never set together, so this was disabled on all those machines
except for IXP4xx.

As IXP4xx can now become part of ARCH_MULTIPLATFORM, it seems better to
formalize this logic: all ARMv4/v5 platforms get an explicit dependency
on being either big-endian (ixp4xx) or little-endian (the rest). We may
want to fix ixp4xx in the future to support both, but it does not work
in LE mode at the moment.

For the ARMv6/v7 platforms, there are two ways this could be handled

 a) allow both modes only for platforms selecting
    'ARCH_SUPPORTS_BIG_ENDIAN' today, but only LE mode for the
    others, given that these were added intentionally at some
    point.

 b) allow both modes everwhere, given that it was already possible
    to build that way by e.g. selecting ARCH_VIRT, and that the
    list is not an accurate reflection of which platforms may or
    may not work.

Out of these, I picked b) because it seemed slighly more logical
to me.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-08 17:20:54 +02:00
Arnd Bergmann
a3102fafdc ARM: iop32x: enable multiplatform support
After iop32x was converted to the generic multi-irq entry
code, nothing really stops us from building it into a
generic kernel.

The two last headers can simply be removed, the mach/irqs.h
gets replaced with the sparse-irq intiialization from the
board specific .nr_irqs value, and the decompressor debug
output can use the debug_ll hack that all other platforms
use.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-08 17:20:49 +02:00
Arnd Bergmann
8c1fb11b8a ARM: s3c: enable s3c24xx multiplatform support
With the custom ISA I/O and the missing sparse-irq support
out of the way, s3c24xx can now be built into the same
kernel as all other ARM9 based platforms.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-08 17:19:18 +02:00
Krzysztof Kozlowski
e8662d0832 ARM: dts: meson: align SPI NOR node name with dtschema
The node names should be generic and SPI NOR dtschema expects "flash".

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220407142159.293836-1-krzysztof.kozlowski@linaro.org
2022-04-08 09:40:37 +02:00
Brian Masney
889b94dbc5 ARM: qcom_defconfig: enable debug fs support
Enable CONFIG_DEBUG_FS since this is useful to have around.

Signed-off-by: Brian Masney <bmasney@redhat.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220311154919.1797920-3-bmasney@redhat.com
2022-04-07 22:25:22 -05:00
Brian Masney
7fb940d9f6 ARM: qcom_defconfig: enable options for Qualcomm random number generator
Enable the driver for the Qualcomm random number generator and the
userspace crypto API.

This was a tested on a Nexus 5 phone (msm8974 SoC).

Signed-off-by: Brian Masney <bmasney@redhat.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220311154919.1797920-2-bmasney@redhat.com
2022-04-07 22:25:22 -05:00
Krzysztof Kozlowski
c9bdd50d20 ARM: dts: socfpga: align interrupt controller node name with dtschema
Fixes dtbs_check warnings like:

  $nodename:0: 'intc@fffed000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lore.kernel.org/r/20220317115705.450427-2-krzysztof.kozlowski@canonical.com
2022-04-07 21:30:22 +02:00
Krzysztof Kozlowski
fbcd5ad7a4 ARM: dts: ox820: align interrupt controller node name with dtschema
Fixes dtbs_check warnings like:

  gic@1000: $nodename:0: 'gic@1000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220317115705.450427-1-krzysztof.kozlowski@canonical.com
2022-04-07 21:29:59 +02:00
Krzysztof Kozlowski
fa04ccac61 ARM: dts: nspire: use lower case hex addresses in node unit addresses
Convert all hex addresses in node unit addresses to lower case to fix
dt_binding_check and dtc W=1 warnings.

Conversion was done using sed:

  $ sed -e 's/@\([a-zA-Z0-9_-]*\) {/@\L\1 {/' -i arch/arm/boot/dts/nspire*
  $ sed -e 's/<0x\([a-zA-Z0-9_-]*\) /<0x\L\1 /g' -i arch/arm/boot/dts/nspire*

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220317115542.450032-2-krzysztof.kozlowski@canonical.com
2022-04-07 21:29:38 +02:00