Phil Edworthy
|
ad1bd2bf65
|
arm64: dts: renesas: Add initial device tree for RZ/V2M EVK
Add basic support for RZ/V2M EVK (based on R9A09G011):
- memory
- External input clock
- UART
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220503115557.53370-13-phil.edworthy@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-05-06 11:09:57 +02:00 |
|
Phil Edworthy
|
fb1929b98f
|
arm64: dts: renesas: Add initial DTSI for RZ/V2M SoC
Details of the SoC can be found here:
https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-cortex-a-mpus/rzv2m-dual-cortex-a53-lpddr4x32bit-ai-accelerator-isp-4k-video-codec-4k-camera-input-fhd-display-output
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220504094456.24386-3-phil.edworthy@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-05-06 11:09:57 +02:00 |
|
Geert Uytterhoeven
|
a1721bbbdb
|
arm64: dts: renesas: r8a779a0: Update to R-Car Gen4 compatible values
Despite the name, R-Car V3U is the first member of the R-Car Gen4
family. Hence update the compatible properties in various device nodes
to include family-specific compatible values for R-Car Gen4 instead of
R-Car Gen3:
- DMAC,
- (H)SCIF,
- I2C,
- IPMMU,
- WDT.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/73cea9d5e1a6639422c67e4df4285042e31c9fd5.1651497071.git.geert+renesas@glider.be
|
2022-05-06 11:09:34 +02:00 |
|
Geert Uytterhoeven
|
6af663af3c
|
arm64: dts: renesas: Add interrupt-names to CANFD nodes
The Renesas R-Car CAN-FD Controller on R-Car Gen3 and RZ/G2 SoCs has two
interrupts. Add interrupt-names properties to all CAN-FD device nodes
to identify the individual interrupts, so we can make this property a
required property in the DT bindings.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/10eef1e20372af4a156b06df8e5124666ec7c6b6.1651512451.git.geert+renesas@glider.be
|
2022-05-06 11:09:34 +02:00 |
|
Biju Das
|
470218e29d
|
arm64: dts: renesas: r9a07g043: Add SPI Multi I/O Bus controller node
Add SPI Multi I/O Bus controller node to R9A07G043 (RZ/G2UL) SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220502190155.84496-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-05-06 11:09:34 +02:00 |
|
Biju Das
|
c2ff5c0282
|
arm64: dts: renesas: r9a07g043: Create thermal zone to support IPA
Setup a thermal zone driven by SoC temperature sensor.
Create passive trip points and bind them to CPUFreq cooling
device that supports power extension.
Based on the work done by Dien Pham <dien.pham.ry@renesas.com>
and others for r8a77990 SoC.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220501112926.47024-6-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-05-06 11:09:34 +02:00 |
|
Biju Das
|
91e548da2c
|
arm64: dts: renesas: r9a07g043: Add TSU node
Add TSU node to RZ/G2UL SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220501112926.47024-5-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-05-06 11:09:34 +02:00 |
|
Biju Das
|
e6a9acc370
|
arm64: dts: renesas: r9a07g043: Add OPP table
Add OPP table for RZ/G2UL SoC.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220501112926.47024-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-05-06 11:09:33 +02:00 |
|
Biju Das
|
22ec868997
|
arm64: dts: renesas: r9a07g043: Add RSPI{0,1,2} nodes
Add RSPI{0,1,2} nodes to R9A07G043 (RZ/G2UL) SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220501112926.47024-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-05-06 11:09:33 +02:00 |
|
Biju Das
|
9752535054
|
arm64: dts: renesas: r9a07g054: Fix external clk node names
Add suffix '-clk' for can and extal clk node names and replace the
clk node names audio_clk{1,2} with audio{1,2}-clk as per the device
tree specification.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220428133156.18080-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-05-06 11:09:33 +02:00 |
|
Biju Das
|
1404ca90f4
|
arm64: dts: renesas: r9a07g044: Fix external clk node names
Add suffix '-clk' for can and extal clk node names and replace the
clk node names audio_clk{1,2} with audio{1,2}-clk as per the device
tree specification.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220428133156.18080-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-05-06 11:09:33 +02:00 |
|
Laurent Pinchart
|
747bbcd3aa
|
arm64: dts: renesas: Remove empty rgb output endpoints
Endpoints node must have a remote-endpoint property, as endpoints only
exist to model a link between ports. Drop the empty rgb output endpoints
from SoC dtsi files, and declare them in the board dts instead.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/20220424161228.8147-2-laurent.pinchart+renesas@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-05-06 11:09:33 +02:00 |
|
Laurent Pinchart
|
b7423e3943
|
arm64: dts: renesas: Remove empty lvds endpoints
Endpoints node must have a remote-endpoint property, as endpoints only
exist to model a link between ports. Drop the empty lvds endpoints from
SoC dtsi files, they should be instead declared in the board dts or in
overlays.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/20220424161228.8147-1-laurent.pinchart+renesas@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-05-06 11:09:33 +02:00 |
|
Biju Das
|
094ff3485a
|
arm64: dts: renesas: rzg2ul-smarc: Enable USB2.0 support
Enable USB2.0 Host/Device support on RZ/G2UL SMARC EVK by
adding usb{0,1} pincontrol entries to the soc-pinctrl dtsi
and deleting the nodes which disabled it.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220429072400.23729-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-05-06 11:09:33 +02:00 |
|
Biju Das
|
1ed914e341
|
arm64: dts: renesas: rzg2ul-smarc: Enable Audio
Enable Audio on RZ/G2UL SMARC EVK by adding ssi1 pincontrol entries
to the soc-pinctrl dtsi and ssi1 and cpu sound_dai nodes to the board
dtsi.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220429072400.23729-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-05-06 11:09:32 +02:00 |
|
Biju Das
|
c62af12c70
|
arm64: dts: renesas: rzg2l-smarc: Move ssi0 and cpu sound_dai nodes from common dtsi
On RZ/G2{L,LC} SoM module, the wm8978 audio codec is connected to ssi0,
whereas on RZ/G2UL it is connected to ssi1. So move ssi0 and cpu
sound_dai nodes from common dtsi to board specific dtsi.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220429072400.23729-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-05-06 11:09:32 +02:00 |
|
Yoshihiro Shimoda
|
e4d755cfec
|
arm64: dts: renesas: Add Renesas White Hawk boards support
Initial support for the Renesas White Hawk CPU and BreakOut boards.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220428135058.597586-4-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-05-06 11:09:10 +02:00 |
|
Yoshihiro Shimoda
|
987da486d8
|
arm64: dts: renesas: Add Renesas R8A779G0 SoC support
Add initial support for the Renesas R8A779G0 (R-Car V4H) SoC.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20220428135058.597586-3-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-05-06 11:09:10 +02:00 |
|
Biju Das
|
3f67af66e6
|
arm64: dts: renesas: rzg2ul-smarc-som: Enable watchdog
Enable watchdog{0,2} interfaces on RZ/G2UL SMARC EVK.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220425170530.200921-14-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-04-29 09:42:17 +02:00 |
|
Biju Das
|
0b3e18dbcd
|
arm64: dts: renesas: rzg2ul-smarc-som: Enable OSTM
Enable OSTM{1, 2} interfaces on RZ/G2UL SMARC EVK.
OSTM0 is reserved for TF-A.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220425170530.200921-13-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-04-29 09:42:17 +02:00 |
|
Biju Das
|
820e976909
|
arm64: dts: renesas: rzg2ul-smarc: Enable CANFD
Enable CANFD on RZ/G2UL SMARC platform.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220425170530.200921-12-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-04-29 09:42:17 +02:00 |
|
Biju Das
|
b0fa698b83
|
arm64: dts: renesas: rzg2ul-smarc: Enable i2c{0,1} and wm8978
Enable i2c{0,1} on RZ/G2UL SMARC EVK by deleting respective
entries from board dts and adding pincontrol entries to the
soc-pinctrl dtsi. Also enable wm8978 audio codec.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220425170530.200921-8-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-04-29 09:41:59 +02:00 |
|
Biju Das
|
a8352a5158
|
arm64: dts: renesas: r9a07g043: Fillup the WDT{0,2} stub nodes
Fillup the WDT{0,2} stub nodes in RZ/G2UL (R9A07G043) SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220425170530.200921-7-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-04-28 16:51:33 +02:00 |
|
Biju Das
|
e42faad1ef
|
arm64: dts: renesas: r9a07g043: Fillup the OSTM{0,1,2} stub nodes
Fillup the OSTM{0,1,2} stub nodes in RZ/G2UL (R9A07G043) SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220425170530.200921-6-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-04-28 16:51:33 +02:00 |
|
Biju Das
|
1de1b44833
|
arm64: dts: renesas: r9a07g043: Fillup the CANFD stub node
Fillup the CANFD stub node in RZ/G2UL (R9A07G043) SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220425170530.200921-5-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-04-28 16:51:33 +02:00 |
|
Biju Das
|
f52e14095e
|
arm64: dts: renesas: r9a07g043: Add USB2.0 support
Add USB2.0 host and device support by filling usb phy control,
phy, device and host stub nodes in RZ/G2UL SoC dtsi.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220425170530.200921-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-04-28 16:51:32 +02:00 |
|
Biju Das
|
559f2b0708
|
arm64: dts: renesas: r9a07g043: Add SSI{1,2,3} nodes and fillup the SSI0 stub node
Add SSI{1,2,3} nodes and fillup the SSI0 stub node in RZ/G2UL
(R9A07G043) SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220425170530.200921-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-04-28 16:51:32 +02:00 |
|
Biju Das
|
bc9e1dbb17
|
arm64: dts: renesas: r9a07g043: Add I2C2 node and fillup the I2C{0,1,3} stub nodes
Add I2C2 node and fillup the I2C{0,1,3} stub nodes in RZ/G2UL
(R9A07G043) SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220425170530.200921-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-04-28 16:51:32 +02:00 |
|
Geert Uytterhoeven
|
8ba8560d4f
|
arm64: dts: renesas: r8a779f0: Add GPIO nodes
Add device nodes for the General Purpose Input/Output (GPIO) blocks on
the Renesas R-Car S4-8 (R8A779F0) SoC.
Note that GPIO blocks 4-7 are not added, as they can only be accessed
from the Control Domain.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/7fb68561026fa8bb5d9baf0596560c5c719a38cc.1649086225.git.geert+renesas@glider.be
|
2022-04-19 10:27:36 +02:00 |
|
Biju Das
|
6494e4f905
|
arm64: dts: renesas: rzg2ul-smarc-som: Enable Ethernet on SMARC platform
Enable Ethernet{0,1} interfaces on RZ/G2UL SMARC EVK.
Ethernet0 pins are muxed with CAN0, CAN1, SSI1 and RSPI1 pins and Ethernet0
device selection is based on the SW1[3] switch position.
Set SW1[3] to position OFF for selecting CAN0, CAN1, SSI1 and RSPI1.
Set SW1[3] to position ON for selecting Ethernet0.
This patch disables Ethernet0 on RZ/G2UL SMARC platform by default.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402081328.26292-8-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-04-13 13:56:09 +02:00 |
|
Biju Das
|
ed8efe50b7
|
arm64: dts: renesas: rzg2ul-smarc-som: Enable eMMC on SMARC platform
RZ/G2UL SoM has both 64GB eMMC and microSD connected to SDHI0.
Both these interfaces are mutually exclusive and the SD0 device
selection is based on SW1[2] on SoM module.
Set SW1[2] to position OFF for selecting eMMC
Set SW1[2] to position ON for selecting microSD
This patch enables eMMC on RZ/G2UL SMARC platform by default.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402081328.26292-7-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-04-13 13:56:09 +02:00 |
|
Biju Das
|
a74a0bf3f3
|
arm64: dts: renesas: rzg2ul-smarc: Enable microSD on SMARC platform
Enable the microSD card slot connected to SDHI1 on the RZ/G2UL SMARC
platform by removing the sdhi1 override which disabled it, and by adding
the necessary pinmux required for SDHI1.
This patch also adds gpios property to vccq_sdhi1 regulator.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402081328.26292-6-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-04-13 13:56:09 +02:00 |
|
Biju Das
|
13ea8b3584
|
arm64: dts: renesas: r9a07g043: Add GbEthernet nodes
Add Gigabit Ethernet{0,1} nodes to SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402081328.26292-5-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-04-13 13:56:09 +02:00 |
|
Biju Das
|
20e63d3948
|
arm64: dts: renesas: r9a07g043: Add SDHI nodes
Add SDHI{0, 1} nodes to RZ/G2UL SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402081328.26292-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-04-13 13:56:09 +02:00 |
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Biju Das
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4e44055440
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arm64: dts: renesas: rzg2ul-smarc: Add scif0 and audio clk pins
Add scif0 and audio clk pins to soc pinctrl dtsi and drop deleting
the pinctrl-0 and pinctrl-names properties for scif0 node so that
we now actually make use of these properties for scif0.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402081328.26292-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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2022-04-13 13:56:09 +02:00 |
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Biju Das
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2d10555298
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arm64: dts: renesas: r9a07g043: Fillup the pinctrl stub node
Fillup the pinctrl(GPIO) stub node in RZ/G2UL SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402081328.26292-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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2022-04-13 13:56:09 +02:00 |
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Biju Das
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895199bc4e
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arm64: dts: renesas: Add initial device tree for RZ/G2UL Type-1 SMARC EVK
Add basic support for RZ/G2UL SMARC EVK (based on R9A07G043U11):
- memory
- External input clock
- CPG
- DMA
- SCIF
It shares the same carrier board with RZ/G2L, but the pin mapping is
different. Disable the device nodes which are not tested and delete the
corresponding pinctrl definitions.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220412161314.13800-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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2022-04-13 13:56:09 +02:00 |
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Biju Das
|
cf40c9689e
|
arm64: dts: renesas: Add initial DTSI for RZ/G2UL SoC
Add initial DTSI for RZ/G2UL SoC.
Both RZ/G2L and RZ/G2UL uses the same SMARC EVK. Therefore they share
the common dtsi (rz-smarc.dtsi) file. Place holders are added in
device nodes to avoid compilation errors for the devices which have
not been enabled yet on RZ/G2UL SoC.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220412161314.13800-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-04-13 13:56:09 +02:00 |
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Biju Das
|
f40846e7c9
|
arm64: dts: renesas: rzg2l-smarc: Move gpios property of vccq_sdhi1 from common dtsi
On RZ/G2{L,LC} SoM module, gpio for power selection is connected to
P39_1 whereas on RZ/G2UL it is connected to P6_1. So move gpios property
of vccq_sdhi1 regulator from common dtsi to soc specific dtsi.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220401175427.19078-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-04-13 13:54:32 +02:00 |
|
Biju Das
|
061ba41c74
|
arm64: dts: renesas: rzg2lc-smarc: Enable RSPI1 on carrier board
RSPI1 (SPI1) interface is available on PMOD0 connector (J1) on the
carrier board. This patch adds pinmux and spi1 nodes to the carrier
board dtsi file and drops deleting pinctl* properties from DTS file.
RSPI1 interface is tested by setting the macro SW_RSPI_CAN to 0.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220401145702.17954-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-04-13 13:53:42 +02:00 |
|
Geert Uytterhoeven
|
79e903fbf4
|
arm64: dts: renesas: ulcb: Add RPC HyperFlash device node
Add the RPC HyperFlash device node along with its partitions to the
common ULCB board DTS file.
Based on a patch in the BSP by Valentine Barshak.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/61a63e819d4296760ca7ae83ef5226a2c4d7bd93.1648548339.git.geert+renesas@glider.be
|
2022-04-13 13:53:42 +02:00 |
|
Geert Uytterhoeven
|
1ee6674bbe
|
arm64: dts: renesas: salvator-common: Add RPC HyperFlash device node
Add the RPC HyperFlash device node along with its partitions to the
common Salvator-X(S) board DTS file.
Based on a patch in the BSP by Valentine Barshak.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/cfc6af8a4c42febcc405b7356c38448eec8e29b0.1648548339.git.geert+renesas@glider.be
|
2022-04-13 13:53:42 +02:00 |
|
Geert Uytterhoeven
|
5f300a7f39
|
arm64: dts: renesas: ebisu: Add RPC HyperFlash device node
Add the RPC HyperFlash device node along with its partitions to the
common Ebisu board DTS file.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/b14c769f62211b67d90dbd2f127357756e6cb4fa.1648548339.git.geert+renesas@glider.be
|
2022-04-13 13:53:42 +02:00 |
|
Geert Uytterhoeven
|
a1de91f0ac
|
arm64: dts: renesas: draak: Add RPC HyperFlash device node
Add the RPC HyperFlash device node along with its partitions to the
common Draak board DTS file.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/0f3d3018ecfcdce1bce67708708a6d3a98368b10.1648548339.git.geert+renesas@glider.be
|
2022-04-13 13:53:42 +02:00 |
|
Geert Uytterhoeven
|
f191fba769
|
arm64: dts: renesas: rcar-gen3: Add RPC device nodes
Add device nodes for the SPI Multi I/O Bus Controllers (RPC-IF) on the
various R-Car Gen3 SoCs that do not have support for them yet in their
device trees (R-Car H3, M3-W, M3-W+, M3-N, E3, and D3).
Based on patches in the BSP by Valentine Barshak.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/3231749c7b63df1a2134daabe66446a3e0e5515b.1648548339.git.geert+renesas@glider.be
|
2022-04-13 13:53:42 +02:00 |
|
Wolfram Sang
|
ccc0dd722e
|
arm64: dts: renesas: rcar-gen4: Add interrupt properties to watchdog nodes
Driver doesn't use it yet, but let's describe the HW properly.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220322095512.4707-6-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-04-13 13:43:04 +02:00 |
|
Wolfram Sang
|
7ac8afba22
|
arm64: dts: renesas: rzg2: Add interrupt properties to watchdog nodes
Driver doesn't use it yet, but let's describe the HW properly.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220322095512.4707-5-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-04-13 13:43:04 +02:00 |
|
Wolfram Sang
|
2bc0aa18ee
|
arm64: dts: renesas: rcar-gen3: Add interrupt properties to watchdog nodes
Driver doesn't use it yet, but let's describe the HW properly.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220322095512.4707-4-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
2022-04-13 13:43:04 +02:00 |
|
Geert Uytterhoeven
|
599fdfddc8
|
arm64: dts: renesas: spider: Add Ethernet sub-board
Add a DTS file for the Spider Ether TSN sub-board (RTP8A779F0ASKB0ST0S),
and include it from the main r8a779f0-spider.dts.
For now its contents are limited to the Board ID EEPROM.
Extracted from a larger patch in the BSP by LUU HOAI.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/5aa58816182b34d9e5795bc1e22784f4e4879d13.1643898884.git.geert+renesas@glider.be
|
2022-04-11 12:00:33 +02:00 |
|
Geert Uytterhoeven
|
b74d5d65af
|
arm64: dts: renesas: spider-cpu: Add I2C4 and EEPROMs
Enable the I2C4 bus on the Falcon CPU board, and describe the I2C EEPROMs
present on the Spider CPU and BreakOut boards.
Extracted from a larger patch in the BSP by LUU HOAI.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/6d8917e49f83b6a932970ca169100eb086d11f16.1643898884.git.geert+renesas@glider.be
|
2022-04-11 12:00:32 +02:00 |
|