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15 Commits

Author SHA1 Message Date
Eugen Hristev
416ce193d7 ARM: dts: at91: sama5d2_icp: fix eeprom compatibles 
The eeprom memories on the board are microchip 24aa025e48, which are 2 Kbits
and are compatible with at24c02 not at24c32.

Fixes: 68a95ef72c ("ARM: dts: at91: sama5d2-icp: add SAMA5D2-ICP")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220607090455.80433-2-eugen.hristev@microchip.com
 2022-06-28 12:55:32 +03:00
Durai Manickam KR
0d83e4c43a ARM: dts: at91-sama5d2_icp.dts: Added I2C bus recovery support 
SDA and SCL is configured as GPIO for I2C bus to recover during
I2C bus malfunction.

Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210921064344.889304-1-durai.manickamkr@microchip.com
 2021-09-21 11:17:49 +02:00
Nicolas Ferre
818c459343 ARM: dts: at91: use the right property for shutdown controller 
The wrong property "atmel,shdwc-debouncer" was used to specify the
debounce delay for the shutdown controler. Replace it with the
documented and implemented property "debounce-delay-us", as mentioned
in v4 driver submission. See:
https://lore.kernel.org/r/1458134390-23847-3-git-send-email-nicolas.ferre@atmel.com/

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Reported-by: Clément Léger <clement.leger@bootlin.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20210730172729.28093-1-nicolas.ferre@microchip.com/
 2021-08-02 12:34:09 +02:00
Codrin Ciubotariu
72d609dad0 ARM: dts: at91: sama5d2_icp: enable digital filter for I2C nodes 
SAMA5D2's I2C controller supports digital filter, so let's enable it.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210727134115.1353494-1-codrin.ciubotariu@microchip.com
 2021-07-27 16:44:15 +02:00
Ludovic Desroches
ca7a049ad1 ARM: dts: at91: change the key code of the gpio key 
Having a button code and not a key code causes issues with libinput.
udev won't set ID_INPUT_KEY. If it is forced, then it causes a bug
within libinput.

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210402130227.21478-1-nicolas.ferre@microchip.com
 2021-04-07 13:32:22 +02:00
Claudiu Beznea
53efdfbb3b ARM: dts: at91: sama5d2: remove atmel,wakeup-type references 
atmel,wakeup-type DT property is not referenced anywhere in the current
and previous version of the code thus remove it.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nferre@kernel.org>
Link: https://lore.kernel.org/r/1609845525-10766-1-git-send-email-claudiu.beznea@microchip.com
 2021-01-22 13:31:51 +01:00
Helmut Grohne
edecfa98f6 net: dsa: microchip: look for phy-mode in port nodes 
Documentation/devicetree/bindings/net/dsa/dsa.txt says that the phy-mode
property should be specified on port nodes. However, the microchip
drivers read it from the switch node.

Let the driver use the per-port property and fall back to the old
location with a warning.

Fix in-tree users.

Signed-off-by: Helmut Grohne <helmut.grohne@intenta.de>
Link: https://lore.kernel.org/netdev/20200617082235.GA1523@laureti-dev/
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
 2020-09-10 12:32:37 -07:00
Tudor Ambarus
466fb89be5 ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and I2C flx0 functions 
Spare boards of duplicating the DMA bindings. Describe the flx0
DMA bindings in the SoC dtsi. Users that don't want to use DMA
for their flexcom functions have to overwrite the flexcom DMA
bindings in their board device tree.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20200514050301.147442-12-tudor.ambarus@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
 2020-05-15 16:50:34 +02:00
Tudor Ambarus
b793f16617 ARM: dts: at91: sama5d2: Add DMA bindings for the flx3 SPI function 
Spare boards of duplicating the DMA bindings. Describe the flx3
DMA bindings in the SoC dtsi. Users that don't want to use DMA
for their flexcom functions have to overwrite the flexcom DMA
bindings in their board device tree.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20200514050301.147442-10-tudor.ambarus@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
 2020-05-15 16:50:33 +02:00
Tudor Ambarus
56cd4b9e8c ARM: dts: at91: sama5d2: Move flx0 definitions in the SoC dtsi 
The Flexcom IP is part of the sama5d2 SoC. Move the flx0 node together
with its function definitions in sama5d2.dtsi. Boards will just fill
the pins and enable the desired functions.

There is a single functional change in this patch. With the move of the
flx0 uart5 definition in the SoC dtsi, the uart5 from
at91-sama5d27_wlsom1_ek.dts inherits the following optional property:
atmel,fifo-size = <32>;
This particular change was tested by Codrin.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tested-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Link: https://lore.kernel.org/r/20200514050301.147442-7-tudor.ambarus@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
 2020-05-15 16:50:33 +02:00
Tudor Ambarus
0afa436526 ARM: dts: at91: sama5d2: Move flx2 definitions in the SoC dtsi 
The Flexcom IP is part of the sama5d2 SoC. Move the flx2 node together
with its function definitions in sama5d2.dtsi. Boards will just fill
the pins and enable the desired functions.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20200514050301.147442-5-tudor.ambarus@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
 2020-05-15 16:50:12 +02:00
Tudor Ambarus
445a9d6e56 ARM: dts: at91: sama5d2: Move flx3 definitions in the SoC dtsi 
The Flexcom IP is part of the sama5d2 SoC. Move the flx3 node together
with its function definitions in sama5d2.dtsi. Boards will just fill
the pins and enable the desired functions.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20200514050301.147442-4-tudor.ambarus@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
 2020-05-15 16:50:05 +02:00
Tudor Ambarus
91fa03c9e3 ARM: dts: at91: sama5d2: Move flx4 definitions in the SoC dtsi 
The Flexcom IP is part of the sama5d2 SoC. Move the flx0 node together
with its function definitions in sama5d2.dtsi. Boards will just fill
the pins and enable the desired functions.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20200514050301.147442-3-tudor.ambarus@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
 2020-05-15 16:49:45 +02:00
Tudor Ambarus
f1f2212ead ARM: dts: at91: sama5d2: Fix the label numbering for flexcom functions 
The sama5d2 SoC has the following IPs: [uart0, uart4], {spi0, spi1}, {i2c0, i2c1}.
Label the flexcom functions in order:
flx0: uart5, spi2, i2c2
flx1: uart6, spi3, i2c3
flx2: uart7, spi4, i2c4
flx3: uart8, spi5, i2c5
flx4: uart9, spi6, i2c6

Some boards respected this scheme, others not. Fix the ones that didn't.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20200514050301.147442-2-tudor.ambarus@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
 2020-05-15 16:49:34 +02:00
Cristian Birsan
68a95ef72c ARM: dts: at91: sama5d2-icp: add SAMA5D2-ICP 
This is the addition of the new SAMA5D2 Industrial Connectivity
Platform(ICP).

Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
Link: https://lore.kernel.org/r/20200410164320.7658-3-cristian.birsan@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
 2020-04-13 15:20:20 +02:00