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25832 Commits

Author SHA1 Message Date
Rohit Agarwal
d405ac52ab dt-bindings: interconnect: Add Qualcomm SDX65 DT bindings 
Add interconnect IDs for Qualcomm SDX65 platform.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/1649854415-11174-2-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
 2022-04-26 14:11:26 +03:00
Fabien Parent
cc9d1e59f4 dt-bindings: arm64: dts: mediatek: Add mt8195-demo board 
Add bindings for the MediaTek mt8195-demo board.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220415150003.1793063-2-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
 2022-04-26 10:58:57 +02:00
Allen-KH Cheng
b59add5e6e dt-bindings: arm: Add compatible for Mediatek MT8192 
This commit adds dt-binding documentation for the Mediatek MT8192
reference board.

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Link: https://lore.kernel.org/r/20220419092030.30519-1-allen-kh.cheng@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
 2022-04-26 10:58:57 +02:00
Sumit Gupta
15a1c2d80a dt-bindings: Document Tegra CCPLEX Cluster 
The Tegra CPU COMPLEX CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
 2022-04-26 12:09:09 +05:30
Chun-Jie Chen
f113a51aa2 dt-bindings: ARM: MediaTek: Add new document bindings of MT8186 clock 
This patch adds the new binding documentation for system clock
and functional clock on MediaTek MT8186.

Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220409132251.31725-2-chun-jie.chen@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2022-04-25 16:59:38 -07:00
Linus Walleij
7335631fcd dt-bindings: clock: u8500: Add clkout clock bindings 
This adds device tree bindings for the externally routed clocks
CLKOUT1 and CLKOUT2 clocks found in the DB8500.

Cc: devicetree@vger.kernel.org
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20220414221751.323525-2-linus.walleij@linaro.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2022-04-25 16:17:24 -07:00
Tony Lindgren
c4f3f823c2 dt-bindings: timer: Add compatible for am6 for TI timer-dm 
Let's add compatible for ti,am654-timer for TI am64, am65 and j72 SoCs.
As the timer hardware is the same between am64, am65 and j72 we use the
compatible name for the earliest SoC with this timer.

The timer interrupts are not routable for the operating system for some
timers on am6. Let's make sure the interrupts are configured for the
timers on all other SoCs.

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220414085807.7389-3-tony@atomide.com
 2022-04-25 16:55:10 -05:00
Tony Lindgren
82b9a6bb4b dt-bindings: timer: Update TI timer to yaml 
Let's update the TI timer binding to use yaml. As this binding is specific
to the TI dual-mode timers also known as dm-timers, let's use file name
ti,timer-dm.yaml to avoid confusion with other timers.

We add checks for the deprecated ti,hwmods property as done for other TI
device driver bindings earlier.

We also correct the issue with the old binding that was out of date for
several properties.

The am43 related timers are undocumented, but compatible with the am3
timers. Let's add the am43 timers too.

The dm814 and dm816 timers are missing, let's add them.

Some timers on some SoCs are dual mapped, like the ABE timers on omap4
and 5. The reg property maxItems must be updated to 2.

The timer clocks can be managed by the parent interconnect target module
with no clocks assigned for the timer node. And in some cases, the SoC may
need to configure additional system clock for the timer in addition to the
functional clock.

The clock names are optional and not specific to the comptible property.
For example, dra7 timers on l3 interconnect do not need clock-names, while
the timers on dra7 l4 interconnect need them with both being compatible
with ti,omap5430-timer.

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220414085807.7389-2-tony@atomide.com
 2022-04-25 16:55:02 -05:00
Biju Das
f14eb061fe dt-bindings: timer: renesas: ostm: Document Renesas RZ/G2UL OSTM 
Document the General Timer Module(a.k.a OSTM) found on the RZ/G2UL SoC.
OSTM module is identical to one found RZ/G2L SoC. No driver changes are
required as generic compatible string "renesas,ostm" will be used as a
fallback.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220425141828.197321-1-biju.das.jz@bp.renesas.com
 2022-04-25 15:30:57 -05:00
Michael Walle
ac6583f56f dt-bindings: fsl: convert fsl,layerscape-dcfg to YAML 
Convert the fsl,layerscape-dcfg binding to the new YAML format.

In the device trees, the device node always have a "syscon"
compatible, which wasn't mentioned in the previous binding.

One thing added here, compared to the original binding is the clock
controller subnode of the LS1028A SoC and its "simple-mfd" compatible as
used in arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi as well as the
little-endian and big-endian properties.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220425140433.33936-1-michael@walle.cc
 2022-04-25 15:30:23 -05:00
Biju Das
db92a6eb83 dt-bindings: i2c: renesas,riic: Document RZ/G2UL SoC 
Document RZ/G2UL I2C bindings. RZ/G2UL I2C is identical to one found on
the RZ/G2L SoC. No driver changes are required as RZ/G2L compatible
string "renesas,riic-rz" will be used as a fallback.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220425133152.176949-1-biju.das.jz@bp.renesas.com
 2022-04-25 15:20:53 -05:00
Linus Walleij
74de379201 dt-bindings: gnss: Rewrite Mediatek bindings in YAML 
This rewrites the Mediatek GNSS bindings in YAML.

Cc: devicetree@vger.kernel.org
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220425132947.1311171-1-linus.walleij@linaro.org
 2022-04-25 15:19:46 -05:00
Krzysztof Kozlowski
6588cb81e5 dt-bindings: gpio: add common consumer GPIO lines 
Typical GPIO lines like enable, powerdown, reset or wakeup are not
documented as common, which leads to new variations of these (e.g.
pwdn-gpios).  Add a common schema which serves also as a documentation
for preferred naming.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
 2022-04-25 20:48:35 +02:00
Frank Rowand
067c098766 of: overlay: rework overlay apply and remove kfree()s 
Fix various kfree() issues related to of_overlay_apply().
  - Double kfree() of fdt and tree when init_overlay_changeset()
    returns an error.
  - free_overlay_changeset() free the root of the unflattened
    overlay (variable tree) instead of the memory that contains
    the unflattened overlay.
  - For the case of a failure during applying an overlay, move kfree()
    of new_fdt and overlay_mem into free_overlay_changeset(), which
    is called by the function that allocated them.
  - For the case of removing an overlay, the kfree() of new_fdt and
    overlay_mem remains in free_overlay_changeset().
  - Check return value of of_fdt_unflatten_tree() for error instead
    of checking the returned value of overlay_root.
  - When storing pointers to allocated objects in ovcs, do so as
    near to the allocation as possible instead of in deeply layered
    function.

More clearly document policy related to lifetime of pointers into
overlay memory.

Double kfree()
Reported-by: Slawomir Stepien <slawomir.stepien@nokia.com>

Signed-off-by: Frank Rowand <frank.rowand@sony.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220420222505.928492-3-frowand.list@gmail.com
 2022-04-25 10:56:11 -05:00
Rui Miguel Silva
41e3958475 dt-bindings: Add Arm corstone1000 platform 
Add bindings to describe the FPGA in a prototyping board
(MPS3) implementation and the Fixed Virtual Platform
implementation of the ARM Corstone1000 platform.

Link: https://lore.kernel.org/r/20220408131922.3864348-2-rui.silva@linaro.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
 2022-04-25 14:19:45 +01:00
周琰杰 (Zhou Yanjie)
aecec8bbb2 spi: Add bindings for new Ingenic SoCs. 
Add the SPI bindings for the JZ4775 SoC, the X1000 SoC,
and the X2000 SoC from Ingenic.

Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/1650724725-93758-3-git-send-email-zhouyanjie@wanyeetech.com
Signed-off-by: Mark Brown <broonie@kernel.org>
 2022-04-25 14:00:50 +01:00
Krzysztof Kozlowski
a498db69dc regulator: dt-bindings: richtek,rt4801: use existing ena_gpiod feature 
The binding and driver duplicated regulator core feature of controlling
regulators with GPIOs (of_parse_cb + ena_gpiod) and created its own
enable-gpios property with multiple GPIOs.

This is a less preferred way, because enable-gpios should enable only one
element, not multiple. It also duplicates existing solution.

Deprecate the original 'enable-gpios' and add per-regulator property.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220425072455.27356-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
 2022-04-25 14:00:46 +01:00
Yoshihiro Shimoda
8ff93be325 dt-bindings: reset: renesas,rst: Document r8a779g0 reset module 
Document bindings for the R-Car V4H (R8A779G0) reset module.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220420084255.375700-4-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-04-25 10:51:56 +02:00
Yoshihiro Shimoda
6cd3233242 dt-bindings: arm: renesas: Document R-Car V4H White Hawk DT bindings 
Add device tree binding documentation for the Renesas R-Car V4H
(r8a779g0) SoC and the Renesas White Hawk CPU and BreakOut boards.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20220420084255.375700-2-yoshihiro.shimoda.uh@renesas.com
Link: https://lore.kernel.org/r/20220420084255.375700-3-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-04-25 10:50:09 +02:00
Yoshihiro Shimoda
13b4d179c6 dt-bindings: clock: renesas,cpg-mssr: Document r8a779g0 
Add binding documentation for the R-Car V4H (R8A779G0) Clock Pulse
Generator.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220420084255.375700-7-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-04-25 10:45:15 +02:00
Vincent Whitchurch
4e96945960 dt-bindings: reserved-memory: Support MTD/block device 
Add bindings to allow MTD/block devices to be used in reserved-memory
regions using the "phram" (MTD in PHysical RAM) driver.

This allows things like partitioning to be specified via the existing
devicetree bindings.

Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20220412135302.1682890-3-vincent.whitchurch@axis.com
 2022-04-25 10:37:49 +02:00
Krzysztof Kozlowski
9547c4e74f dt-bindings: mtd: jedec, spi-nor: remove unneeded properties 
After conversion the jedec,spi-nor DT schema to reference other schemas
(SPI and MTD) and use unevaluatedProperties, few properties are
redundant.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20220408063720.12826-1-krzysztof.kozlowski@linaro.org
 2022-04-25 10:37:49 +02:00
Mattijs Korpershoek
7050967673 dt-bindings: input: mediatek,mt6779-keypad: update maintainer 
Fengping has no longer interest and time to maintain this driver so he
agreed to transfer maintainership over to me.

Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20220421140255.2781505-1-mkorpershoek@baylibre.com
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
 2022-04-24 21:09:38 -07:00
Marek Vasut
26b954e4ef dt-bindings: display: simple: Add DataImage FG040346DSSWBG04 compatible string 
Add DataImage FG040346DSSWBG04 4.3" 480x272 TFT LCD 24bit DPI panel
compatible string.

Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: Thomas Zimmermann <tzimmermann@suse.de>
Cc: devicetree@vger.kernel.org
To: dri-devel@lists.freedesktop.org
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220422102242.18959-1-marex@denx.de
 2022-04-24 23:53:52 +02:00
Krzysztof Kozlowski
5fe580196d dt-bindings: timer: exynos4210-mct: describe known hardware and its interrupts 
Most of the Samsung Exynos SoCs use almost the same Multi-Core Timer
block, so only two compatibles were used so far (for Exynos4210 and
Exynos4412 flavors) with Exynos4210-one being used in most of the SoCs.
However the Exynos4210 flavor actually differs by number of interrupts.

Add new compatibles, maintaining backward compatibility with Exynos4210,
and constraints for number of interrupts.  This allows to exactly match
the Exynos MCT hardware.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220407194127.19004-1-krzysztof.kozlowski@linaro.org
 2022-04-24 16:53:46 +02:00
Piotr Oniszczuk
acd134bca2 media: dt-bindings: media: rockchip-vpu: Add RK3568 compatible 
RK356x has Hantro G1 video decoder capable to decode MPEG2/H.264/VP8
video formats.

This patch adds RK3568 compatible in rockchip-vpu dt-bindings.

Tested on [1] with FFmpeg v4l2_request code taken from [2]
with MPEG2, H.642 and VP8 samples with results [3].

[1] https://github.com/warpme/minimyth2
[2] https://github.com/LibreELEC/LibreELEC.tv/blob/master/packages/multimedia/ffmpeg/patches/v4l2-request/ffmpeg-001-v4l2-request.patch
[3] https://github.com/warpme/minimyth2/blob/master/video-test-summary.txt

Signed-off-by: Piotr Oniszczuk <piotr.oniszczuk@gmail.com>
Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
 2022-04-24 08:52:00 +01:00
John Crispin
038010bb30 dt-bindings: Add en7523-scu device tree binding documentation 
Adds device tree binding documentation for clocks in the EN7523 SOC.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Link: https://lore.kernel.org/r/20220314084409.84394-2-nbd@nbd.name
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2022-04-22 19:16:48 -07:00
Georgi Vlaev
4ce2b909dc dt-bindings: clock: ehrpwm: Add AM62 specific compatible 
Introduce AM62 specific compatible for EPWM time-base
sub-module clock. The time-base clock setup is identical
to AM64. The only difference is AM62 provides 3 time-base
clocks instead of the 9 found in AM64.

Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Tested-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20220415190343.6284-2-g-vlaev@ti.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2022-04-22 19:04:47 -07:00
Conor Dooley
8e8fbab4f1 dt-bindings: rtc: add refclk to mpfs-rtc 
The rtc on PolarFire SoC does not use the AHB clock as its reference
frequency, but rather a 1 MHz refclk that it shares with MTIMER. Add
this second clock to the binding as a required property.

Fixes: 4cbcc0d7b3 ("dt-bindings: rtc: add bindings for microchip mpfs rtc")
Reviewed-by: Daire McNamara <daire.mcnamara@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20220413075835.3354193-7-conor.dooley@microchip.com
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2022-04-22 18:40:19 -07:00
Conor Dooley
3ebb9fdf46 dt-bindings: clk: mpfs document msspll dri registers 
As there are two sections of registers that are responsible for clock
configuration on the PolarFire SoC: add the dynamic reconfiguration
interface section to the binding & describe what each of the sections
are used for.

Fixes: 2145bb687e ("dt-bindings: clk: microchip: Add Microchip PolarFire host binding")
Reviewed-by: Daire McNamara <daire.mcnamara@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20220413075835.3354193-5-conor.dooley@microchip.com
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2022-04-22 18:40:11 -07:00
Bjorn Andersson
ee651cd1e9 dt-bindings: remoteproc: qcom: pas: Add sc8280xp adsp and nsp pair 
Add the Qualcomm sc8280xp ADSP and NSP pairs to the binding.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20220408220539.625301-1-bjorn.andersson@linaro.org
 2022-04-22 18:00:26 -05:00
Luiz Angelo Daros de Luca
b391719191 dt-bindings: net: dsa: realtek: cleanup compatible strings 
Compatible strings are used to help the driver find the chip ID/version
register for each chip family. After that, the driver can setup the
switch accordingly. Keep only the first supported model for each family
as a compatible string and reference other chip models in the
description.

The removed compatible strings have never been used in a released kernel.

Link: https://lore.kernel.org/netdev/20220414014055.m4wbmr7tdz6hsa3m@bang-olufsen.dk/
Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: Alvin Šipraga <alsi@bang-olufsen.dk>
Link: https://lore.kernel.org/r/20220418233558.13541-1-luizluca@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
 2022-04-22 15:17:53 -07:00
Arınç ÜNAL
69ab1e16d3 dt-bindings: pinctrl: add binding for Ralink RT3883 pinctrl 
Add binding for the Ralink RT3883 pin controller for RT3883 SoC.

Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20220414173916.5552-15-arinc.unal@arinc9.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-04-23 00:05:42 +02:00
Arınç ÜNAL
b6a3a007a9 dt-bindings: pinctrl: add binding for Ralink RT305X pinctrl 
Add binding for the Ralink RT305X pin controller for RT3050, RT3052,
RT3350, RT3352 and RT5350 SoCs.

Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20220414173916.5552-14-arinc.unal@arinc9.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-04-23 00:05:42 +02:00
Arınç ÜNAL
a8bf29d253 dt-bindings: pinctrl: add binding for Ralink MT7621 pinctrl 
Add binding for the Ralink MT7621 pin controller for MT7621 SoC.

Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20220414173916.5552-13-arinc.unal@arinc9.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-04-23 00:05:42 +02:00
Arınç ÜNAL
fdcd7c8d15 dt-bindings: pinctrl: add binding for Ralink MT7620 pinctrl 
Add binding for the Ralink MT7620 pin controller for MT7620, MT7628 and
MT7688 SoCs.

Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20220414173916.5552-12-arinc.unal@arinc9.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-04-23 00:05:42 +02:00
Arınç ÜNAL
23e37546b2 dt-bindings: pinctrl: rt2880: fix binding name, pin groups and functions 
Deprecate the old property "ralink,rt2880-pinmux". Add the new property
"ralink,rt2880-pinctrl". The old property name was inaccurate as the
hardware block is called pinctrl across the Mediatek/Ralink architecture.

Current pin group and function bindings are for MT7621. Put bindings for
RT2880 instead.

Add me as a maintainer.

Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20220414173916.5552-11-arinc.unal@arinc9.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-04-23 00:05:42 +02:00
Linus Walleij
bc8e81a55f Merge tag 'renesas-pinctrl-for-v5.19-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel 
pinctrl: renesas: Updates for v5.19

  - Add support for the new RZ/G2UL SoC,
  - Add drive-strength support for R-Car E3,
  - Add RPC/QSPI pin groups on R-Car E3 and E3,
  - Miscellaneous fixes and improvements.
 2022-04-23 00:04:56 +02:00
Srinivasa Rao Mandadapu
6af63b663d dt-bindings: pinctrl: qcom: Add sc7280 lpass lpi pinctrl bindings 
Add device tree binding Documentation details for Qualcomm SC7280
LPASS LPI pinctrl driver.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1650285427-19752-3-git-send-email-quic_srivasam@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-04-23 00:04:43 +02:00
Srinivasa Rao Mandadapu
e343cff747 dt-bindings: pinctrl: qcom: Update lpass lpi file name to SoC specific 
Change generic lpass lpi pincotrol bindings file to SoC specific file,
to distinguish and accomadate other SoC specific dt bindings.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1650285427-19752-2-git-send-email-quic_srivasam@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-04-23 00:04:43 +02:00
Sebastian Reichel
30b7fa3a98 dt-bindings: pinctrl: rockchip: add rk3588 
Add compatible string for rk3588 pin controller. No other changes
are required, since the new controller can use the old binding.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20220422170920.401914-12-sebastian.reichel@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-04-23 00:01:56 +02:00
William Zhang
ad984c428c dt-bindings: arm: add bcmbca device tree binding document 
Add arch bcmbca device tree binding document for Broadcom ARM based
broadband SoC chipsets. In this change, only BCM47622 is added. Other
chipsets will be added in the future.

Signed-off-by: William Zhang <william.zhang@broadcom.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
 2022-04-22 14:17:49 -07:00
Johan Jonker
f01143f291 dt-bindings: pinctrl: add rockchip,rk3036-pinctrl compatible string 
Add the compatible string "rockchip,rk3036-pinctrl" in already
in use in rk3036.dtsi to rockchip,pinctrl.yaml.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220330133952.1949-1-jbx6244@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-04-22 22:58:07 +02:00
Alexander Stein
4764f39e36 dt-bindings: pinctrl: Convert i.MX7D to json-schema 
Convert the i.MX7D pinctrl binding to DT schema format using json-schema

Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220303150653.1903910-1-alexander.stein@ew.tq-group.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2022-04-22 22:56:46 +02:00
Xinlei Lee
2bf8ee0faa dt-bindings: pwm: Add interrupts property for MediaTek MT8192 
Add interrupts property of pwm for MediaTek MT8192 SoC.

Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
 2022-04-22 18:55:03 +02:00
Xinlei Lee
6ddb156ba4 dt-bindings: pwm: Add compatible for MediaTek MT8186 
Add dt-binding documentation of pwm for MediaTek MT8186 SoC.

Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
 2022-04-22 18:54:18 +02:00
Xinlei Lee
7eafddce08 dt-bindings: pwm: Add compatible for MediaTek MT8195 
Add dt-binding documentation of pwm for MediaTek MT8195 SoC.

Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
 2022-04-22 18:54:06 +02:00
Xinlei Lee
b8ba2b42b0 dt-bindings: pwm: Add compatible for MediaTek MT8192 
Add dt-binding documentation of pwm for MediaTek MT8192 SoC.

Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
 2022-04-22 18:53:53 +02:00
Xinlei Lee
b09b179bac dt-bindings: pwm: Convert pwm-mtk-disp.txt to mediatek,pwm-disp.yaml format 
Convert pwm-mtk-disp.txt to mediatek,pwm-disp.yaml format as suggested
by maintainer.

Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
 2022-04-22 18:53:35 +02:00
Hammer Hsieh
15452ce3c9 dt-bindings: pwm: Add bindings doc for Sunplus SoC SP7021 PWM Driver 
Add bindings doc for Sunplus SoC SP7021 PWM Driver

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Hammer Hsieh <hammerh0314@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
 2022-04-22 18:34:05 +02:00