The Seeed Odyssey-STM32MP157C board has a 20-pin DVP camera output. The
DCMI pins used on this output are defined in the pin state definition
&pinctrl/dcmi-1, AKA &dcmi_pins_b (added in mainline commit
02814a4152). Set these pins as the default
pinctrl of the DCMI peripheral in the board device tree.
The pins are not used for any other purpose, so it seems safe to assume
most users will not need to override (delete) what this patch provides.
status defaults to "disabled", so the peripheral will not be
unnecessarily started. And the users who actually intend to make use of
a camera on the DVP port will have this little part of the configuration
ready.
Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
The SPI NOR is a bit further away from the SoC on DHCOR than on DHCOM,
which causes additional signal delay. At 108 MHz, this delay triggers
a sporadic issue where the first bit of RX data is not received by the
QSPI controller.
There are two options of addressing this problem, either by using the
DLYB block to compensate the extra delay, or by reducing the QSPI bus
clock frequency. The former requires calibration and that is overly
complex, so opt for the second option.
Fixes: 76045bc457 ("ARM: dts: stm32: Add QSPI NOR on AV96")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add support of stm32mp135f discovery board (part number: STM32MP135F-DK).
It embeds a STM32MP135F SOC with 512 MB of DDR3.
Several connections are available on this board:
4*USB2.0, 1*USB2.0 typeC DRD, SDcard, 2*RJ45, HDMI, Combo Wifi/BT, ...
Only SD card, uart4 (console) and watchdog IPs are enabled in this commit.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
We cannot list all the possible chips used in different board revisions,
just use the generic "jedec,spi-nor" compatible instead. This also
fixes dtbs_check error:
['jedec,spi-nor', 's25fl256s1', 's25fl512s'] is too long
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Reviewed-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This fixes dtbs-check error from simple-bus schema:
soc: thermal-zones: {'type': 'object'} is not allowed for {'cpu-thermal': ..... }
From schema: /home/leo/.local/lib/python3.8/site-packages/dtschema/schemas/simple-bus.yaml
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Property "postion" is not documented in the mma8452 binding. Remove it
to resolve the error in "make dtbs_check"
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The FPGA is not really a bus but more like an MFD device. Change the
compatible string from "simple-bus" to "simple-mfd". This also fix a
node name issue with simple-bus schema.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the #power-domain-cells for power-controller node as required by the
schema.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fix the following error from "make dtbs_check"
memory: False schema does not allow ...
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
There is no regulator bus in hardware. So move the regulator nodes out
and remove the regulators simple-bus. This also make the dts align with
the simple-bus schema.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Disable the bus in the SoC dtsi file to be enabled only in board dts
files. Also breakup long values in the ifc node to fix dtbs_check.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Align the compatible strings with the board binding defined in schema
file.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the missing node for qspi flash.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Reviewed-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Although the ordering of DMA channels was not relevant in the txt binding,
it is defined as ordered in the converted yaml schema. Update the dts
to match the order.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The property is optional and not used in matching the clock in driver.
Remove it to avoid dtbs_check issues.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Make use of the i2c bus recovery feature and enable it on PHYTEC
phyCORE-based modules and boards.
Signed-off-by: Yunus Bas <y.bas@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This force-converts the per-device battery node into the standard
properties using "simple-battery" for the HREF machines and the
corresponding Samsung battery for the mobile phones.
This is fine to do since the battery data in the DTS files has never
been deployed or used. In commit a1149ae975
"ARM: ux500: Disable Power Supply and Battery Management by default"
it was turned off and has not been switched back on since. In
the meantime standardized bindings for batteries have appeared
making the old AB8500 battery bindings obsolete.
The battery node which is now in the middle of an included file
is obviously a per-device piece of information so push this down
to each board. The HREF machines all have the same battery and can
share a single node in the HREF dtsi file.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
5.15, please pull the following:
- Stefan fixes the VEC (video encoder) bus address for 2711, fixes the
MDIO bus controller #address-cells/#size-cells inversion and the SDIO
regulator voltage ranges
- Nicolas fixes DTC warnings for the PCIe host bridge and its child
USB device
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Merge tag 'arm-soc/for-5.15/devicetree' of https://github.com/Broadcom/stblinux into arm/fixes
This pull request contains Broadcom ARM-based SoCs Device Tree fixes for
5.15, please pull the following:
- Stefan fixes the VEC (video encoder) bus address for 2711, fixes the
MDIO bus controller #address-cells/#size-cells inversion and the SDIO
regulator voltage ranges
- Nicolas fixes DTC warnings for the PCIe host bridge and its child
USB device
* tag 'arm-soc/for-5.15/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: bcm2711-rpi-4-b: Fix usb's unit address
ARM: dts: bcm2711-rpi-4-b: Fix pcie0's unit address formatting
ARM: dts: bcm2711-rpi-4-b: fix sd_io_1v8_reg regulator states
ARM: dts: bcm2711: fix MDIO #address- and #size-cells
ARM: dts: bcm283x: Fix VEC address for BCM2711
Link: https://lore.kernel.org/r/20211012213841.1872021-1-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add the device tree for a Netgear GS110EMX switch featuring 8 Gigabit
ports and 2 Multi-Gig ports (100M/1G/2.5G/5G/10G). An 88E6390X switch
sits at its core connecting to two 88X3310P 10G PHYs. The control plane
is handled by an 88F6811 Armada 381 SoC.
The following functionality is tested:
- 8 gigabit Ethernet ports connecting via 88E6390X to the 88F6811
- serial console UART
- 128 MB commercial grade DDR3L SDRAM
- 16 MB serial SPI NOR flash
The two 88X3310P 10G PHYs while detected during boot seem neither to
detect any link nor pass any traffic.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
dtbs_check currently complains that:
arch/arm/boot/dts/bcm2711-rpi-4-b.dts:220.10-231.4: Warning
(pci_device_reg): /scb/pcie@7d500000/pci@1,0: PCI unit address format
error, expected "0,0"
Unsurprisingly pci@0,0 is the right address, as illustrated by its reg
property:
&pcie0 {
pci@0,0 {
/*
* As defined in the IEEE Std 1275-1994 document,
* reg is a five-cell address encoded as (phys.hi
* phys.mid phys.lo size.hi size.lo). phys.hi
* should contain the device's BDF as 0b00000000
* bbbbbbbb dddddfff 00000000. The other cells
* should be zero.
*/
reg = <0 0 0 0 0>;
};
};
The device is clearly 0. So fix it.
Also add a missing 'device_type = "pci"'.
Fixes: 258f92d2f8 ("ARM: dts: bcm2711: Add reset controller to xHCI node")
Suggested-by: Rob Herring <robh@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210831125843.1233488-1-nsaenzju@redhat.com
Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
The TYAN S7106 is a server platform with an ASPEED AST2500 BMC.
Signed-off-by: Oskar Senft <osk@google.com>
Reviewed-by: Jeremy Kerr <jk@codeconstruct.com.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210909004920.1634322-1-osk@google.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add the power-config-full-load described in:
https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md#power-config-full-load
The power-config-full-load gpio is designed to be used to specify how
many power supplies the system should have, in rainier it is 2 or 4. If
enough power supplies fail so that the system no longer has redundancy
(no longer n+1), the hardware will signal to the Onboard Chip Controller
that the system may be oversubscribed, and performance may need to be
reduced so the system can maintain it's powered on state.
Signed-off-by: Adriana Kobylak <anoo@us.ibm.com>
Reviewed-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20211005192226.213539-1-anoo@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
This contains various cleanup patches to 32-bit ARM Tegra device trees
and enables USB OTG mode on the Nexus 7.
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Merge tag 'tegra-for-5.16-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.16-rc1
This contains various cleanup patches to 32-bit ARM Tegra device trees
and enables USB OTG mode on the Nexus 7.
* tag 'tegra-for-5.16-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Remove useless usb-ehci compatible string
ARM: tegra: Remove unused backlight-boot-off property
ARM: tegra: nexus7: Enable USB OTG mode
ARM: tegra: Add new properties to USB PHY device-tree nodes
ARM: tegra: Update Broadcom Bluetooth device-tree nodes
ARM: tegra: acer-a500: Correct compatible of ak8975 magnetometer
Link: https://lore.kernel.org/r/20211008201132.1678814-6-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Addition of a new variant in the sama5d2 family: the sama5d29 with
significant updates being CAN and Ethernet controllers;
- Add support for Exegin Q5xR5 and CalAmp LMU5000 boards which were
maintained up to this moment, separately, in OpenWrt tree;
- Two more boards gained I2C bus recovery support;
- Tse850 updated with one Ethernet fix;
- Sama7g5ek gained ADC nodes and sama5d27_wlsom1 WiFi support.
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Merge tag 'at91-dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt
AT91 DT #1 for 5.16:
- Addition of a new variant in the sama5d2 family: the sama5d29 with
significant updates being CAN and Ethernet controllers;
- Add support for Exegin Q5xR5 and CalAmp LMU5000 boards which were
maintained up to this moment, separately, in OpenWrt tree;
- Two more boards gained I2C bus recovery support;
- Tse850 updated with one Ethernet fix;
- Sama7g5ek gained ADC nodes and sama5d27_wlsom1 WiFi support.
* tag 'at91-dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: at91: dts: sama5d29: Add dtsi file for sama5d29
ARM: dts: at91-sama5d2_icp.dts: Added I2C bus recovery support
ARM: dts: at91: tse850: the emac<->phy interface is rmii
ARM: dts: at91: add Exegin Q5xR5 board
dt-bindings: ARM: at91: document exegin q5xr5 board
dt-bindings: add vendor prefix for exegin
ARM: dts: at91: add CalAmp LMU5000 board
dt-bindings: ARM: at91: document CalAmp LMU5000 board
dt-bindings: add vendor prefix for calamp
ARM: dts: at91: at91sam9260: add pinctrl label
ARM: dts: at91-sama5d27_som1_ek: Added I2C bus recovery support
ARM: dts: at91: sama7g5ek: enable ADC on the board
ARM: dts: at91: sama7g5: add node for the ADC
ARM: dts: at91: sama5d27_wlsom1: add wifi device
Link: https://lore.kernel.org/r/20211011123438.16562-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
gpmc,mux-add-data is not boolean.
Fixes the below errors flagged by dtbs_check.
"ethernet@4,0:gpmc,mux-add-data: True is not of type 'array'"
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
gpmc,cycle2cycle-{same|diff}csen are boolean properties. Fix them
to prevent dtbs_check errors.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
On SPEAr3xx, ethernet driver is not compatible with the SPEAr600
one.
Indeed, SPEAr3xx uses an earlier version of this IP (v3.40) and
needs some driver tuning compare to SPEAr600.
The v3.40 IP support was added to stmmac driver and this patch
fixes this issue and use the correct compatible string for
SPEAr3xx
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Input pin that indicates that the BMC is configured to boot with security
protections enforced.
Pulled up by default (secure). Placing the jumper will pull the pin down
(bypass security).
When in the secure boot state, it makes the EEPROM at 0x50 on bus 14
read only.
Link: https://lore.kernel.org/r/20210923074606.283393-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add S0_SCP_AUTH_FAIL, S1_SCP_AUTH_FAIL gpios to indicates firmware
authentication fail on each socket.
Add gpio RTC_BAT_SEN_EN to enable RTC battery adc sensor.
Add BMC_I2C4_O_EN gpio to go high at boot to enable access to I2C4 bus.
Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com>
Signed-off-by: Thang Nguyen <thang@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20210917082945.19111-1-quan@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Few regression fixes for omaps for the v5.15-rc cycle. There is a fix
for boot time hangs that can happen on some am335x devices that started
when the pruss devicetree nodes were added. The other fixes are less
critical:
- Fix compiler warning for sysc_init_soc() that got recently introduced
- Fix external abort for am335x pruss as otherwise some am335x will hang
- Use CLKDM_NOAUTO quirk also for dra7 dcan1
- Fix older NAND device node regression for omap3-sdp
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Merge tag 'omap-for-v5.15/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes
Fixes for omaps for v5.15
Few regression fixes for omaps for the v5.15-rc cycle. There is a fix
for boot time hangs that can happen on some am335x devices that started
when the pruss devicetree nodes were added. The other fixes are less
critical:
- Fix compiler warning for sysc_init_soc() that got recently introduced
- Fix external abort for am335x pruss as otherwise some am335x will hang
- Use CLKDM_NOAUTO quirk also for dra7 dcan1
- Fix older NAND device node regression for omap3-sdp
* tag 'omap-for-v5.15/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap3430-sdp: Fix NAND device node
bus: ti-sysc: Use CLKDM_NOAUTO for dra7 dcan1 for errata i893
soc: ti: omap-prm: Fix external abort for am335x pruss
bus: ti-sysc: Add break in switch statement in sysc_init_soc()
Link: https://lore.kernel.org/r/pull-1633609552-789682@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
There's no such thing as a generic USB EHCI controller. The EHCI
controllers found on Tegra SoCs are instantiations that need Tegra-
specific glue to work properly, so drop the generic compatible string
and keep only the Tegra-specific ones.
Signed-off-by: Thierry Reding <treding@nvidia.com>
- A couple of fixes from Haibo Chen to update SPI NOR TX bus width for
i.MX6 and i.MX8 boards. This becomes necessary because spi-nor driver
starts using the setting in DT.
- Mark buck2 always-on for i.MX8MM Kontron-n801x-som board to avoid the
core supply being turned off unexpectedly.
- Fix eSDHC2 device tree settings for LS1028A SoC.
- Disable GIC CPU interface before calling stby-poweroff sequence to fix
power-off failure on i.MX6.
- Fix M2_RST# GPIO pinmux on i.MX8M venice-gw7902 boards.
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Merge tag 'imx-fixes-5.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.15, round 2:
- A couple of fixes from Haibo Chen to update SPI NOR TX bus width for
i.MX6 and i.MX8 boards. This becomes necessary because spi-nor driver
starts using the setting in DT.
- Mark buck2 always-on for i.MX8MM Kontron-n801x-som board to avoid the
core supply being turned off unexpectedly.
- Fix eSDHC2 device tree settings for LS1028A SoC.
- Disable GIC CPU interface before calling stby-poweroff sequence to fix
power-off failure on i.MX6.
- Fix M2_RST# GPIO pinmux on i.MX8M venice-gw7902 boards.
* tag 'imx-fixes-5.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: imx8m*-venice-gw7902: fix M2_RST# gpio
ARM: imx6: disable the GIC CPU interface before calling stby-poweroff sequence
arm64: dts: ls1028a: fix eSDHC2 node
arm64: dts: imx8mm-kontron-n801x-som: do not allow to switch off buck2
arm64: dts: imx8: change the spi-nor tx
ARM: dts: imx: change the spi-nor tx
Link: https://lore.kernel.org/r/20211006125734.GA10197@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds the matching carrier for Raspberry Pi Compute Module 4.
Instead of xHCI USB host controller there is just a USB 2.0 interface
connected to the DWC2 controller from the BCM2711. As a result
there is a free PCIe Gen 2 socket. Also there are 2 full-size HDMI 2.0
connectors.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Link: https://lore.kernel.org/r/1628334401-6577-10-git-send-email-stefan.wahren@i2se.com
Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
The Raspberry Pi Compute Module 4 (CM4) are SoMs which contain the
following:
* BCM2711 quad core processor
* up to 8 GB RAM
* up to 32 GB eMMC
* a GPIO expander
* Gigabit PHY BCM54210PE
* Wifi/BT module with internal and external antenna
The eMMC and the Wifi/BT module are optional.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Link: https://lore.kernel.org/r/1628334401-6577-9-git-send-email-stefan.wahren@i2se.com
Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
A Wifi/BT chip is quite common for the Raspberry Pi boards. So move those
definitions into a separate dtsi in order to avoid copy & paste. This
change was inspired by a vendor tree patch from Phil Elwell.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Link: https://lore.kernel.org/r/1628334401-6577-7-git-send-email-stefan.wahren@i2se.com
Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
DT schema check complains at sd_io_1v8_reg about the following:
[1800000, 1, 3300000, 0] is too long
Additional items are not allowed (3300000, 0 were unexpected)
So fix the states definition.
Fixes: 7dbe8c62ce ("ARM: dts: Add minimal Raspberry Pi 4 support")
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Link: https://lore.kernel.org/r/1628334401-6577-3-git-send-email-stefan.wahren@i2se.com
Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
The values of #address-cells and #size-cells are swapped. Fix this
and avoid the following DT schema warnings for mdio@e14:
#address-cells:0:0: 1 was expected
#size-cells:0:0: 0 was expected
Fixes: be8af7a9e3 ("ARM: dts: bcm2711-rpi-4: Enable GENET support")
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Link: https://lore.kernel.org/r/1628334401-6577-2-git-send-email-stefan.wahren@i2se.com
Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
The VEC has a different address (0x7ec13000) on the BCM2711 (used in
e.g. Raspberry Pi 4) compared to BCM283x (e.g. Pi 3 and earlier). This
was erroneously not taken account for.
Definition of the VEC in the devicetrees had to be moved from
bcm283x.dtsi to bcm2711.dtsi and bcm2835-common.dtsi to allow for this
differentiation.
Fixes: 7894bdc622 ("ARM: boot: dts: bcm2711: Add BCM2711 VEC compatible")
Signed-off-by: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Link: https://lore.kernel.org/r/1626980528-3835-1-git-send-email-stefan.wahren@i2se.com
Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
BB2D is a Vivante GC 2D Accelerator.
This adds the node to the dts file within a target module node.
Crossbar index number is used for interrupt mapping.
Signed-off-by: Gowtham Tammana <g-tammana@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fix typo in pinctrl. It did only work because the bootloader
seems to have initialized it.
Fixes: ee32711195 ("ARM: dts: omap3-gta04: Define and use bma180 irq pin")
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add mandatory supply properties. The supply is always on, so it is just
a syntax issue, no functional change.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add mandatory supply properties. The supply is always on, so it is just
a syntax issue, no functional change.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Replace depreciated nodenames, fix label name to match scheme.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Hyphens should be used in label names. make dtbs_check complains
about that since it does not match the corresponding pattern
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Switch the compatible for the am33xx_pinmux pin controller node from
pinctrl-single to pinconf-single. The only change between these two
compatibles is that PCS_HAS_PINCONF will be true. This then allows
pinconf properties to be utilized.
The purpose of this change is to allow the PocketBeagle to use:
pinctrl-single,bias-pullup
pinctrl-single,bias-pulldown
This dts already defines these properites for gpio pins in the default
pinctrl state but it has no effect unless PCS_HAS_PINCONF is set.
The bias properties can then be modified on the corresponding gpio lines
through the gpiod uapi. The mapping between the pins and gpio lines is
defined by gpio-ranges under the gpio controller nodes in am33xx-l4.dtsi
Signed-off-by: Drew Fustini <drew@pdp7.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Nand is on CS1 so reg properties first field should be 1 not 0.
Fixes: 44e4716499 ("ARM: dts: omap3: Fix NAND device nodes")
Cc: stable@vger.kernel.org # v4.6+
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
- I2C EEPROM support on the RZA2MEVB development board,
- DMA, USB2.0, and audio support for the RZ/G2L SoC,
- USB2.0, I2C, audio, ADC, and CANFD support for the RZ/G2L SMARC EVK
development board,
- Support for more R-Car Gen3e SoCs (H3e, M3e, M3Ne(-2G), D3e, E3e,
H3Ne),
- PWM support for the R-Car M3-W+ and V3U SoCs,
- IPMMU support for SDHI on the R-Car V3U SoC,
- Switches support for the Falcon development board,
- Improve Ethernet PHY descriptions to fix reset handling after kexec,
- Miscellaneous fixes and improvements.
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Merge tag 'renesas-arm-dt-for-v5.16-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.16
- I2C EEPROM support on the RZA2MEVB development board,
- DMA, USB2.0, and audio support for the RZ/G2L SoC,
- USB2.0, I2C, audio, ADC, and CANFD support for the RZ/G2L SMARC EVK
development board,
- Support for more R-Car Gen3e SoCs (H3e, M3e, M3Ne(-2G), D3e, E3e,
H3Ne),
- PWM support for the R-Car M3-W+ and V3U SoCs,
- IPMMU support for SDHI on the R-Car V3U SoC,
- Switches support for the Falcon development board,
- Improve Ethernet PHY descriptions to fix reset handling after kexec,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.16-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (45 commits)
arm64: dts: renesas: rcar-gen3: Add missing Ethernet PHY resets
ARM: dts: rzg1: Add missing Ethernet PHY resets
ARM: dts: r-mobile: Add missing Ethernet PHY resets
arm64: dts: renesas: Add compatible properties to RTL8211E Ethernet PHYs
arm64: dts: renesas: Add compatible properties to KSZ9031 Ethernet PHYs
arm64: dts: renesas: Add compatible properties to AR8031 Ethernet PHYs
ARM: dts: renesas: Add compatible properties to uPD6061x Ethernet PHYs
ARM: dts: renesas: Add compatible properties to RTL8201FL Ethernet PHYs
ARM: dts: renesas: Add compatible properties to LAN8710A Ethernet PHYs
ARM: dts: renesas: Add compatible properties to KSZ9031 Ethernet PHYs
ARM: dts: renesas: Add compatible properties to KSZ8081 Ethernet PHYs
ARM: dts: renesas: Add compatible properties to KSZ8041 Ethernet PHYs
arm64: dts: renesas: beacon: Fix Ethernet PHY mode
ARM: dts: renesas: Fix SMSC Ethernet compatible values
arm64: dts: renesas: rzg2l-smarc: Enable CANFD
arm64: dts: renesas: rzg2l-smarc-som: Enable ADC on SMARC platform
arm64: dts: renesas: rzg2l-smarc-som: Move extal and memory nodes to SOM DTSI
arm64: dts: renesas: r8a779a0: falcon-cpu: Add SW47-SW49 support
arm64: dts: renesas: rzg2l-smarc: Add Mic routing
arm64: dts: renesas: rzg2l-smarc: Enable audio
...
Link: https://lore.kernel.org/r/cover.1633081147.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Revert cc8870bf4c to fix the regression on i.MX6 that suspend
support becomes broken.
- Add `qca,clk-out-frequency` property to fix Ethernet support on
imx6qdl-pico board.
- Re-enable FB support in imx_v6_v7_defconfig. It gets lost due to
f611b1e762 ("drm: Avoid circular dependencies for CONFIG_FB").
- Fix LP5562 LED support on imx6dl-yapp4 board.
- Add missing pinctrl-names for panel on M53Menlo board.
- Fix USB host power regulator polarity on M53Menlo board.
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Merge tag 'imx-fixes-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.15:
- Revert cc8870bf4c to fix the regression on i.MX6 that suspend
support becomes broken.
- Add `qca,clk-out-frequency` property to fix Ethernet support on
imx6qdl-pico board.
- Re-enable FB support in imx_v6_v7_defconfig. It gets lost due to
f611b1e762 ("drm: Avoid circular dependencies for CONFIG_FB").
- Fix LP5562 LED support on imx6dl-yapp4 board.
- Add missing pinctrl-names for panel on M53Menlo board.
- Fix USB host power regulator polarity on M53Menlo board.
* tag 'imx-fixes-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx_v6_v7_defconfig: enable fb
ARM: dts: imx6qdl-pico: Fix Ethernet support
ARM: dts: imx: Fix USB host power regulator polarity on M53Menlo
ARM: dts: imx: Add missing pinctrl-names for panel on M53Menlo
Revert "ARM: imx6q: drop of_platform_default_populate() from init_machine"
ARM: dts: imx6dl-yapp4: Fix lp5562 LED driver probe
Link: https://lore.kernel.org/r/20210923063356.GK13480@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Bunch of DTS fixes to resolve addressing issues with some of the device
nodes, dropping unused/undocumented properties in various nodes, and
aligning node names with dtschema.
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Merge tag 'juno-fixes-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/fixes
Juno/Vexpress fixes for v5.15
Bunch of DTS fixes to resolve addressing issues with some of the device
nodes, dropping unused/undocumented properties in various nodes, and
aligning node names with dtschema.
* tag 'juno-fixes-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm: dts: vexpress: Fix motherboard bus 'interrupt-map'
arm: dts: vexpress: Fix addressing issues with 'motherboard-bus' nodes
arm: dts: vexpress-v2p-ca9: Fix the SMB unit-address
arm: dts: vexpress: Drop unused properties from motherboard node
arm64: dts: arm: drop unused interrupt-names in MHU
ARM: dts: arm: align watchdog and mmc node names with dtschema
arm64: dts: arm: align watchdog and mmc node names with dtschema
arm64: dts: fvp: Remove panel timings
Link: https://lore.kernel.org/r/20210927105249.3583380-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This corrects the use of depricated chipid and clock names, for which
support was finally dropped from the driver. It also ensures that the
DSI PLL is fed by the correct clock, now that it's being migrated to not
rely on global clock names.
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Merge tag 'qcom-dts-fixes-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes
Qualcomm DTS fixes for v5.15
This corrects the use of depricated chipid and clock names, for which
support was finally dropped from the driver. It also ensures that the
DSI PLL is fed by the correct clock, now that it's being migrated to not
rely on global clock names.
* tag 'qcom-dts-fixes-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
ARM: dts: qcom: apq8064: update Adreno clock names
ARM: dts: qcom: apq8064: Use 27MHz PXO clock as DSI PLL reference
ARM: dts: qcom: apq8064: use compatible which contains chipid
Link: https://lore.kernel.org/r/20210930025526.1146-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add a label for the touchscreen to allow a custom baseboard to
disable this node if needed.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The STMPE811 ADC on the Apalis SoM board can be used as a provider
of ADC capabilities to other devices, for example, when a custom
baseboard has an SN74LV4051 analog mux.
Pass the 'io-channel-cells' parameter to indicate such possibility.
While at it, also pass a label for the adc device, so that it can
be referenced in the custom baseboard.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It is recommended not to use underscore in node names.
Change it to dash.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Make operating point definitions comply with binding
specifications.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Make operating point definitions comply with binding
specifications.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Only led-X or led are allowed according to bindings definition.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds a devicetree for the Tolino Vision 5 Ebook reader. It is
based on boards called ¨e70k02¨. It is equipped with an imx6sl SoC.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds a devicetree for the Kobo Libra H2O Ebook reader. It is based on
boards called e70k02. It is equipped with an imx6sll SoC.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Netronix board E70K02 can be found some several Ebook-Readers,
at least the Kobo Libra H2O and the Tolino Vision 5. The board
is equipped with different SoCs requiring different pinmuxes.
For now the following peripherals are included:
- LED
- Power Key
- Cover (gpio via hall sensor)
- RC5T619 PMIC
- Backlight via lm3630a
- Wifi sdio chip detection (mmc-powerseq and stuff)
It is based on vendor kernel but heavily reworked due to many
changed bindings.
Known limitations: cold colored backlight does not work due to
incompatible hard coded overvoltage setting in the driver.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the partition layout also used by the bootloader.
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The SPI-NOR flash on the SoM was missing from the device tree.
The TQMa7 as a designated QSPI_RESET# pin, however depending on the
hardware configuration the pin may be unconnected, or be used for a
different purpose. With this in mind, we mux the pin as a pullup and
define an input hog for it, but keep it a separate pin group, so that it
is easy for dependent Device Trees to modify the configuration.
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
"TQ-Systems" is written with a dash.
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The MPL3115A2 I2C pressure sensor driver does not take a VCC regulator.
The bindings are so far trivial, but the datasheet does not have a VCC
pin.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add a device tree for a Colibri iMX6ULL 1GB which has a eMMC instead of
the raw NAND used on other SKUs.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Nexus 7 has OTG-cable microUSB port, enable OTG mode. USB peripheral
devices now can be connected to Nexus 7 using OTG adapter, switching
USB port into host mode.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add new properties to USB PHYs needed for enabling USB OTG mode.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The host-wakeup GPIO is now marked as deprecated in the broadcom-bluetooth
device-tree binding, it's replaced with the host-wakeup interrupt. Update
Tegra device-trees to the recent version of the Bluetooth binding.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The "ak,ak8975" compatible is not recognized by dt-bindings, it's
deprecated. Use supported "asahi-kasei,ak8975" compatible.
Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Thierry Reding <treding@nvidia.com>
With commit c709135e57 ("pinctrl: at91-pio4: add support for slew-rate")
and commit cbde6c823b ("pinctrl: at91-pio4: Fix slew rate disablement")
the slew-rate is enabled by default for each configured pin. The datasheet
specifies at chapter "Output Driver AC Characteristics" that HSIO
drivers (use in SDMMCx and QSPI0 peripherals), don't have a slewrate
setting but are rather calibrated against an external 1% resistor mounted
on the SDMMCx_CAL or QSPI0_CAL pins. Depending on the target signal
frequency and the external load, it is possible to adjust their target
output impedance. Thus set slew-rate = <0> for SDMMC (QSPI is not enabled
at the moment in device tree).
Fixes: 7540629e2f ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210915074836.6574-3-claudiu.beznea@microchip.com
Datasheet chapter "EMAC Timings" specifies that while in 3.3V domain
GMAC's MDIO pins should be configured with slew-rate enabled, while the
data + signaling pins should be configured with slew-rate disabled when
GMAC works in RGMII or RMII modes. The pin controller for SAMA7G5 sets
the slew-rate as enabled for all pins. Adapt the device tree to comply
with these.
Fixes: 7540629e2f ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210915074836.6574-2-claudiu.beznea@microchip.com
SAMA7G5-EK board has DDR3L type of memory soldered. This needs 1.35V. The
1.35V for DDR3L rail at run-time is selected by the proper configuration
on SELV2 pin (for 1.35V it needs to be in high-z state). When suspended
the MCP16502 PMIC soldered on SAMA7G5-EK will use different sets of
configuration registers to provide proper voltages on its rail. Run-time
configuration registers could be configured differently than suspend
configuration register for MCP16502 (VSEL2 affects only run-time
configuration). In suspend states the DDR3L memory soldered on SAMA7G5-EK
switches to self-refresh. Even on self-refresh it needs to be powered by
a 1.35V rail. Thus, make sure the PMIC is configured properly when system
is suspended.
Fixes: 7540629e2f (ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210930154219.2214051-2-claudiu.beznea@microchip.com
Before commit 0e30f47232 ("mtd: spi-nor: add support for DTR protocol"),
for all PP command, it only support 1-1-1 mode, no matter the tx setting
in dts. But after the upper commit, the logic change. It will choose
the best mode(fastest mode) which flash device and spi-nor host controller
both support.
Though the spi-nor device on imx6sx-sdb/imx6ul(l/z)-14x14-evk board
do not support PP-1-4-4/PP-1-1-4, but if tx is 4 in dts file, it will also
impact the read mode selection. For the spi-nor device on the upper mentioned
boards, they support read 1-4-4 mode and read 1-1-4 mode according to the
device internal sfdp register. But qspi host controller do not support
read 1-4-4 mode. so need to set the tx to 1, let the common code finally
select read 1-1-4 mode, PP-1-1-1 mode.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Fixes: 0e30f47232 ("mtd: spi-nor: add support for DTR protocol")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The S5M8767 PMIC does not require anymore a safe DVS voltage, if the DVS
GPIO is not enabled. Although previously bindings required providing
this safe DVS voltage, but since commit 04f9f068a6 ("regulator:
s5m8767: Modify parsing method of the voltage table of buck2/3/4") this
was ignored.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210928084949.27939-12-krzysztof.kozlowski@canonical.com
Add compatible values to Ethernet PHY subnodes representing Renesas
uPD60610 or uPD60611 PHYs on RZ/A1 boards. This allows software to
identify the PHY model at any time, regardless of the state of the PHY
reset line.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/335a1dfea905369da683e122e41e08ca1c5f90f7.1631174218.git.geert+renesas@glider.be
Add compatible values to Ethernet PHY subnodes representing Realtek
RTL8201FL PHYs on RZ/A2 boards. This allows software to identify the
PHY model at any time, regardless of the state of the PHY reset line.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/a23eca16869457684b0300379233e335b4e2047e.1631174218.git.geert+renesas@glider.be
Add compatible values to Ethernet PHY subnodes representing SMSC
LAN8710A PHYs on RZ/A1 and R-Mobile A1 boards. This allows software to
identify the PHY model at any time, regardless of the state of the PHY
reset line.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/247dc2074dae149af07b6d014985ad30eb362eda.1631174218.git.geert+renesas@glider.be
Add compatible values to Ethernet PHY subnodes representing Micrel
KSZ9031 PHYs on RZ/G1 boards. This allows software to identify the PHY
model at any time, regardless of the state of the PHY reset line.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/ce8ae6b199fa244315a008ae31891a808ca1948d.1631174218.git.geert+renesas@glider.be
Add compatible values to Ethernet PHY subnodes representing Micrel
KSZ8041 PHYs on RZ/G1 and R-Car Gen2 boards. This allows software to
identify the PHY model at any time, regardless of the state of the PHY
reset line.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/f9e26625924f90eff34fe6f6f02b15fa272c5d80.1631174218.git.geert+renesas@glider.be
According to schematics, and confirmed by ID_REV register contents, the
Ethernet controllers on various development board are not SMSC LAN9220,
but different variants:
- KZM-A9-Dual and KZM-A9-GT: LAN9221,
- Bock-W and Marzen: LAN89218AQ.
Update the compatible values accordingly.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/59c142176f795b3541c935df43ab11cecd77cc61.1631173813.git.geert+renesas@glider.be
Commit 078fb7aa6a ("arm: dts: vexpress: Fix addressing issues with
'motherboard-bus' nodes") broke booting on a couple of 32-bit VExpress
boards. The problem is #address-cells size changed, but interrupt-map
was not updated. This results in the timer interrupt (and all the
other motherboard interrupts) not getting mapped.
As the 'interrupt-map' properties are all just duplicates across boards,
just move them into vexpress-v2m.dtsi and vexpress-v2m-rs1.dtsi.
Strictly speaking, 'interrupt-map' is dependent on the parent
interrupt controller, but it's not likely we'll ever have a different
parent than GICv2 on these old platforms. If there was one,
'interrupt-map' can still be overridden.
Link: https://lore.kernel.org/r/20210924214221.1877686-1-robh@kernel.org
Fixes: 078fb7aa6a ("arm: dts: vexpress: Fix addressing issues with 'motherboard-bus' nodes")
Cc: Guillaume Tucker <guillaume.tucker@collabora.com>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Reported-by: Reported-by: "kernelci.org bot" <bot@kernelci.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Commit bbc4d71d63 ("net: phy: realtek: fix rtl8211e rx/tx delay
config") sets the RX/TX delay according to the phy-mode property in the
device tree. For the A20-olinuxino-lime2 board this is "rgmii", which is the
wrong setting.
Following the example of a900cac375 ("ARM: dts: sun7i: a20: bananapro:
Fix ethernet phy-mode") the phy-mode is changed to "rgmii-id" which gets
the Ethernet working again on this board.
Signed-off-by: Bastien Roucariès <rouca@debian.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210916081721.237137-1-rouca@debian.org
The SSI 1328 is a NAS box running a SL3516 SoC.
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The edimax NS2502 is a NAS box running a SL3516 SoC.
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Currently, it is no longer possible to retrieve a DHCP address
on the imx6qdl-pico board.
This issue has been exposed by commit f5d9aa79df ("ARM: imx6q:
remove clk-out fixup for the Atheros AR8031 and AR8035 PHYs").
Fix it by describing the qca,clk-out-frequency property as suggested
by the commit above.
Fixes: 98670a0bb0 ("ARM: dts: imx6qdl: Add imx6qdl-pico support")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The micro-SD card doesn't feature a write-protect pin. Set the
corresponding property in the devicetree to handle this behavior
correctly and suppress driver warnings.
Signed-off-by: Yunus Bas <y.bas@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The MIC2025 switch input signal nEN is active low, describe it as such
in the DT. The previous change to this regulator polarity was incorrectly
influenced by broken quirks in gpiolib-of.c, which is now long fixed. So
fix this regulator polarity setting here once and for all.
Fixes: 3c3601cd6a ("ARM: dts: imx53: Update USB configuration on M53Menlo")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The panel already contains pinctrl-0 phandle, but it is missing
the default pinctrl-names property, so the pin configuration is
ignored. Fill in the missing pinctrl-names property, so the pin
configuration is applied.
Fixes: d81765d693 ("ARM: dts: imx53: Update LCD panel node on M53Menlo")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
- ranges property should be grouped by region, with no functional
changes. Otherwise, schema dtbs_check would report the following errors.
"linux-imx/arch/arm/boot/dts/imx6qp-vicutp.dt.yaml: pcie@1ffc000: ranges: 'oneOf' conditional failed, one must be fixed:
linux-imx/arch/arm/boot/dts/imx6qp-vicutp.dt.yaml: pcie@1ffc000: ranges: 'oneOf' conditional failed, one must be fixed:
[[2164260864, 0, 0, 33030144, 0, 65536, 2181038080, 0, 16777216, 16777216, 0, 15728640]] is not of type 'boolean'
True was expected
[[2164260864, 0, 0, 33030144, 0, 65536, 2181038080, 0, 16777216, 16777216, 0, 15728640]] is not of type 'null'
[2164260864, 0, 0, 33030144, 0, 65536, 2181038080, 0, 16777216, 16777216, 0, 15728640] is too long
From schema: linux-imx/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml"
- refer to commit 281f1f99cf ("PCI: dwc: Detect number of iATU windows").
The num-viewport is not required anymore, remove them totally.
- dt_binding_check complains "compatible: ['fsl,imx6qp-pcie', 'snps,dw-pcie']
is too long", remove "snps,dw-pcie" from the compatible string.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the ADC nodes to the AST2600 devicetree. Enable ADC1 for Rainier and
Everest systems and add an iio-hwmon node for the 7th channel to report
the battery voltage.
Tested on Rainier:
~# cat /sys/class/hwmon/hwmon11/in1_input
1347
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20210916210045.31769-1-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
The following warning is seen when the SPI GPIO driver probes:
gpio-expander@0 enforce active low on chipselect handle
The reason for this warning is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:
* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.
To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
helped to detect the following SPI chipselect polarity mismatch on an
imx6q-sabresd for example:
[ 4.854337] m25p80@0 enforce active low on chipselect handle
Prior to the above commit, the chipselect polarity passed via cs-gpios
property was ignored and considered active-low.
The reason for such mismatch is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:
* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.
To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
helped to detect the following SPI chipselect polarity mismatch on an
imx6q-sabresd for example:
[ 4.854337] m25p80@0 enforce active low on chipselect handle
Prior to the above commit, the chipselect polarity passed via cs-gpios
property was ignored and considered active-low.
The reason for such mismatch is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:
* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.
To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
helped to detect the following SPI chipselect polarity mismatch on an
imx6q-sabresd for example:
[ 4.854337] m25p80@0 enforce active low on chipselect handle
Prior to the above commit, the chipselect polarity passed via cs-gpios
property was ignored and considered active-low.
The reason for such mismatch is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:
* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.
To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Since the reg property was added to each channel node in commit
b86d3d21cd ("ARM: dts: imx6dl-yapp4: Add reg property to the lp5562
channel node") it is possible to skip unused channels.
Remove the actually unused white LED channel.
Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Since the LED multicolor framework support was added in commit
92a81562e6 ("leds: lp55xx: Add multicolor framework support to lp55xx")
LEDs on this platform stopped working.
Author of the framework attempted to accommodate this DT to the
framework in commit b86d3d21cd ("ARM: dts: imx6dl-yapp4: Add reg property
to the lp5562 channel node") but that is not sufficient. A color property
is now required even if the multicolor framework is not used, otherwise
the driver probe fails:
lp5562: probe of 1-0030 failed with error -22
Add the color property to fix this.
Fixes: 92a81562e6 ("leds: lp55xx: Add multicolor framework support to lp55xx")
Cc: <stable@vger.kernel.org>
Cc: linux-leds@vger.kernel.org
Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The MAC-Address of the MR32's sole ethernet port is
located in offset 0x66 of the attached AT24C64 eeprom.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
the switch identifies itself as a BCM53012 (rev 5)...
This patch has been tested & verified on OpenWrt's
snapshot with Linux 5.10 (didn't test any older kernels).
The MR32 is able to "talk to the network" as before with
OpenWrt's SWITCHDEV b53 driver.
| b53-srab-switch 18007000.ethernet-switch: found switch: BCM53012, rev 5
| libphy: dsa slave smi: probed
| b53-srab-switch 18007000.ethernet-switch poe (uninitialized):
| PHY [dsa-0.0:00] driver [Generic PHY] (irq=POLL)
| b53-srab-switch 18007000.ethernet-switch: Using legacy PHYLIB callbacks.
| Please migrate to PHYLINK!
| DSA: tree 0 setup
Reported-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
BCM53573 family SoC have Ethernet switch connected to the first Ethernet
controller (accessible over MDIO).
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
To match the new dts binding. Remove "subsys",unused
interrupt and slot node.Add "interrupt-names",
"linux,pci-domain" and pciecfg node.
Signed-off-by: Chuanjia Liu <chuanjia.liu@mediatek.com>
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
Link: https://lore.kernel.org/r/20210823032800.1660-7-chuanjia.liu@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The partitions on the eMMC will not even appear sometimes, in the
datasheet for the Samsung KLMxGxxE4x we find that the power-on time
for a 4GB eMMC of this type is 300 ms and nowadays the block stack
is so fast so we are stressing it, and we need to specify that we
need this delay in the device tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
A new dtsi file for sama5d29 SoC is added which basically inherits the sama5d2
dtsi with the mac controller compatible property updated.
Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210812140758.28273-1-Hari.PrasathGE@microchip.com
This went unnoticed until commit 7897b071ac ("net: macb: convert
to phylink") which tickled the problem. The sama5d3 emac has never
been capable of rgmii, and it all just happened to work before that
commit.
Fixes: 21dd0ece34 ("ARM: dts: at91: add devicetree for the Axentia TSE-850")
Signed-off-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/ea781f5e-422f-6cbf-3cf4-d5a7bac9392d@axentia.se
With the conversion of rockchip,rk-timer.yaml the clock-names order
was set to "pclk", "timer", but nothing was fixed in the ARM dts section
of the mainline kernel, so the swap timer clock-names that don't fit.
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/timer/rockchip,rk-timer.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210828102659.7348-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
After the conversion to YAML of the Operating Performance Points(OPP)
binding the operating-points property expects values in
a uint32-matrix with 2 items, so fix the notifications by adding
angle brackets.
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/opp/opp-v1.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210828091233.19992-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
After the conversion to YAML of the Operating Performance Points(OPP)
binding the operating-points-v2 property expects the nodename to have
the '^opp-table(-[a-z0-9]+)?$' format, so rename all Rockchip ARM dts
opp-table node names.
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/opp/opp-v2.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210828094512.26862-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The rv1108 gmac node is checked with rockchip-dwmac.yaml,
snps,dwmac.yaml and ethernet-controller.yaml.
The nodename should have a pattern: "^ethernet(@.*)?$",
so change to nodename.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210828114240.12231-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The MK808 has a button inside the cover for the boot loader to do
some action. Add the adc-keys node to the rk3066a-mk808.dts file.
The rk3066 has a higher maximum DC supply voltage for the analog part of
SAR-ADC VDDA_SARADC of 2.75V then other Rockchip SoCs.
For the "rockchip,saradc" node is a vref-supply property required,
so add a regulator for it as well.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210828092755.24560-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
MT7623 has an musb controller that is compatible with the one from MT2701.
Signed-off-by: Sungbo Eo <mans0n@gorani.run>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210830155903.13907-2-mans0n@gorani.run
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
According to YAML validation, and for a future patchset putting this
xo_board reference clock to use as VCO reference parent, add the missing
clock to dsi_phy0.
Fixes: 5a9fc531f6 ("ARM: dts: msm8974: add display support")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210830175739.143401-1-marijn.suijten@somainline.org
APQ8064 was last user of gpu-pwrlevels inside mainline tree, so convert
it now.
Tested on Nexus 7 2013, no functional changes.
Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210829133918.57780-3-david@ixit.cz
The legacy clock names (including the _clk suffix) was dropped from the
driver, so update the dts accordingly).
Tested on Nexus 7 2013, no functional changes.
Signed-off-by: David Heidelberg <david@ixit.cz>
[bjorn: Updated commit message]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210829133918.57780-2-david@ixit.cz
The 'motherboard-bus' node in Arm Ltd boards fails schema checks as
'simple-bus' child nodes must have a unit-address. The 'ranges' handling is
also wrong (or at least strange) as the mapping of SMC chip selects should
be in the 'arm,vexpress,v2m-p1' node rather than a generic 'simple-bus'
node. Either there's 1 too many levels of 'simple-bus' nodes or 'ranges'
should be moved down a level. The latter change is more simple, so let's do
that. As the 'ranges' value doesn't vary for a given motherboard instance,
we can move 'ranges' into the motherboard dtsi files.
Link: https://lore.kernel.org/r/20210819184239.1192395-6-robh@kernel.org
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Add Exegin Q5xR5. The base device tree is from OpenWrt tree and with
the addition of this patch there will be no need to maintain it
separatelly in OpenWrt.
[osk: original author of patch in OpenWrt]
[claudiu.beznea: use "&<label> {" syntax, sorted nodes in alphabetical
order, adapted flash to new support in kernel 5.14, use proper
compatibles according to kernel 5.14, use macros instead of
hardcoded numbers for pinctrl phandles and for all pinctrl references,
add pinctrl-names, pinctrl-X where necessaray]
Signed-off-by: Owen Kirby <osk@exegin.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210816064416.1630674-8-claudiu.beznea@microchip.com
Add CalAmp LMU5000 board. The base device tree is from OpenWrt tree and
with the addition of this patch there will be no need to maintain it
separatelly in OpenWrt.
[porter.adam: original author of patch in OpenWrt]
[claudiu.beznea: fixed compilation warnings, use &<lable> syntax,
sorted nodes in alphabetical order, adapted flash to new support
in kernel 5.14, use proper compatibles according to kernel 5.14,
use macros instead of hard coded numbers for pinctrl phandles and
for all pinctrl references, add pinctrl-names, pinctrl-X where
necessary]
Signed-off-by: Adam Porter <porter.adam@gmail.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210816064416.1630674-5-claudiu.beznea@microchip.com
The ADC controller on the board is fed by a 2.5V reference voltage.
By default the channels #14 and #15 are dedicated to analog input
(marked AN on the board), on the connectors mikrobus1 and mikrobus2.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210901123013.329792-11-eugen.hristev@microchip.com
SAMA5D27 WLSOM1 boards has a WILC3000 device soldered. Add proper
device tree nodes for this.
[eugen.hristev: original author of this code]
[claudiu.beznea: adapt such that make dtbs_check is happy, remove status
for wifi_pwrseq and wifi nodes]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
[nicolas.ferre: original author of this code]
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20210825094055.642941-1-claudiu.beznea@microchip.com
Those are remaining models I have that didn't have ports yet. All
tested.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The naming of this node is based upon that of the initial EA9500 dts[1].
However this does not conform with the mdio-mux format, yielding the
following message when running dtbs_check:
mdio-mii-mux: $nodename:0: 'mdio-mii-mux' does not match '^mdio-mux[\\-@]?'
Secondly, this node should be moved to within the axi node and given the
appropriate unit address. This also requires exposing the axi node via a
label in bcm-nsp.dtsi. This fixes the following warning:
Warning (unit_address_vs_reg): /mdio-mii-mux: node has a reg or ranges property, but no unit name
[1]https://patchwork.ozlabs.org/project/linux-imx/patch/20180618174159.86150-1-npcomplete13@gmail.com/#1941353
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Running dtbs_check yields the following message when checking the
MX64/MX65 devicetree:
at24@50: $nodename:0: 'at24@50' does not match '^eeprom@[0-9a-f]{1,2}$'
This patch fixes the issue by renaming the at24 node appropriately.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
While functional, the mdio-mux-mmioreg binding does not conform to
Documentation/devicetree/bindings/net/mdio-mux-mmioreg.yaml in that an
mdio-mux compatible is also required. Without this the following output
is observed when running dtbs_check:
mdio-mux@32000: compatible: ['mdio-mux-mmioreg'] is too short
This change brings conformance to this requirement and corresponds
likewise to Rafal Milecki's change to the BCM5301x platform[1].
[1] https://lore.kernel.org/linux-arm-kernel/20210822191256.3715003-1-f.fainelli@gmail.com/T/
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Running dtbs_check yielded the issues with bcm-nsp.dtsi.
Firstly this patch fixes the following message by appending "-bus" to
the mpcore node name:
mpcore@19000000: $nodename:0: 'mpcore@19000000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
Secondly mmc node name. The label name can remain as is.
sdhci@21000: $nodename:0: 'sdhci@21000' does not match '^mmc(@.*)?$'
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This board was previously added to
Documentation/devicetree/bindings/arm/bcm/brcm,nsp.yaml
however the dts file was not updated to reflect this change. This patch
corrects bcm958623hr.dts by adding the board name to the compatible.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This fixes following error for all BCM5301X dts files:
mdio-bus-mux@18003000: compatible: ['mdio-mux-mmioreg'] is too short
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This fixes following errors for all BCM5301X dts files:
chipcommonA@18000000: $nodename:0: 'chipcommonA@18000000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
mpcore@19000000: $nodename:0: 'mpcore@19000000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
mdio-bus-mux@18003000: $nodename:0: 'mdio-bus-mux@18003000' does not match '^mdio-mux[\\-@]?'
dmu@1800c000: $nodename:0: 'dmu@1800c000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
MX65 & MX65W Hardware info:
- CPU: Broadcom BCM58625 Cortex A9 @ 1200Mhz
- RAM: 2 GB (4 x 4Gb SK Hynix H5TC4G83CFR)
- Storage: 1 GB (Micron MT29F8G08ABACA)
- Networking: BCM58625 switch (2x 1GbE ports)
2x Qualcomm QCA8337 switches (10x 1GbE ports total)
- PSE: Broadcom BCM59111KMLG connected to LAN ports 11 & 12
- USB: 1x USB2.0
- Serial: Internal header
- WLAN(MX65W Only): 2x Broadcom BCM43520KMLG on the PCI bus.
Note that a driver and firmware image for the BCM59111 PSE has been
released under GPL, but this is not present in the kernel.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
MX64 & MX64W Hardware info:
- CPU: Broadcom BCM58625 Cortex A9 @ 1200Mhz
- RAM: 2 GB (4 x 4Gb SK Hynix H5TC4G83CFR)
- Storage: 1 GB (Micron MT29F8G08ABACA)
- Networking: BCM58625 internal switch (5x 1GbE ports)
- USB: 1x USB2.0
- Serial: Internal header
- WLAN(MX64W only): 2x Broadcom BCM43520KMLG on the PCI bus
This patch adds the Meraki MX64 series-specific bindings. Since some
devices make use of the older A0 SoC, changes need to be made to
accommodate this case, including removal of coherency options and
modification to the secondary-boot-reg.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
While uncommon, some Ax NSP SoCs exist in the wild. This stepping
requires a modified secondary CPU boot-reg and removal of DMA coherency
properties. Without these modifications, the secondary CPU will be
inactive and many peripherals will exhibit undefined behaviour.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
These bindings are required for all Meraki MX64/MX65 devices. These
common bindings include memory (2GB), PWM LEDs, AMAC, I2C (AT24), NAND
partitions, EHCI, OHCI and pinctrl.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This patch largely replicates Vivek Unune's patch "ARM: dts:
BCM5301X:Make usb3 phy use mdio phy driver"[1] for the NSP platform,
whereby we need to create an mdio-mux to facilitate switches
configured via external MDIO, in this case on the Meraki MX65.
However in doing so, we are creating an overlap with usb3_phy's
ccb-mii range. To resolve this, usb3_phy should be moved to a child
node of the internal MDIO bus. The result is heavily based upon Vivek's
patch. This has also been cross-referenced with Yendapally Reddy's
earlier work which utilised the subsequently dropped brcm,nsp-usb3-phy
driver: "[PATCH v2 4/4] arm: dts: nsp: Add USB nodes to device tree"
[2]. Finally, this change provides conformance to the bcm-ns-usb3-phy
documentation, utilising the required usb3-dmp-syscon property. Note
that support for the deprecated ccb-mii bindings has been dropped as of
"phy: phy-bcm-ns-usb3: drop support for deprecated DT binding"[3].
[1] https://lore.kernel.org/patchwork/patch/933971/
[2] https://www.spinics.net/lists/arm-kernel/msg555132.html
[3] https://lore.kernel.org/linux-devicetree/20201113113423.9466-1-zajec5@gmail.com/
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This patch adds the node for the MDIO bus controller, present on the NSP
SoC.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The QSPI bus is enabled by default, however this may not used on all
devices. This patch disables by default, requiring it to be explicitly
enabled where required.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The previous patch "ARM: dts: NSP: Disable PL330 by default, add
dma-coherent property" set the DMAC to disabled by default, requiring it
to be manually enabled on each device. The bcm988312hr was mistakenly
omitted. This patch adds it back.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Currently only the SoC type and platform are specified for all NSP
devices. This patch adds the device names.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The s6e63m0 display used "type 3" SPI communication so
flag the device as using negative clocking and polarity
on the SPI bus.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Without a sensor node, the ISC will simply fail to probe, as the
corresponding port node is missing.
It is then logical to disable the node in the devicetree.
If we add a port with a connection to a sensor endpoint, ISC can be enabled.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210902121358.503589-1-eugen.hristev@microchip.com
Based on 'ranges', the 'bus@4000000' node unit-address is off by 1 '0'.
Link: https://lore.kernel.org/r/20210819184239.1192395-5-robh@kernel.org
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Drop the '#interrupt-cells' property in the motherboard node which has no
effect as the node is neither an interrupt-controller or interrupt-map
(that's in the parent node).
Drop 'model' as it is not used by software nor documented.
Drop 'arm,v2m-memory-map' as it is not used by software. The purpose was
to describe which memory map, but that's all described by the DT
already.
Link: https://lore.kernel.org/r/20210819184239.1192395-4-robh@kernel.org
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Align the watchdog and mmc device node names with the schema to fix
warnings like:
mmci@50000: $nodename:0: 'mmci@50000' does not match '^mmc(@.*)?$'
wdt@f0000: $nodename:0: 'wdt@f0000' does not match '^watchdog(@.*|-[0-9a-f])?$'
Link: https://lore.kernel.org/r/20210820081733.83976-2-krzysztof.kozlowski@canonical.com
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The state of this GPIO determines whether a factory reset has been
requested. If a physical switch is used, it can be high or low. During boot,
the software checks and records the state of this switch. If it is different
than the previous recorded state, then the read-write portions of memory are
reformatted.
Signed-off-by: Isaac Kurth <isaac.kurth@ibm.com>
Link: https://lore.kernel.org/r/20210901185236.558771-1-isaac.kurth@ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add a device tree for the LG G Watch R smartwatch, manufactured by LG
Electronics and based on the msm8226 platform (apq8026).
Currently UART, internal storage, power button and touchscreen are
supported.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
[bjorn: Moved "rpm_requests" before "sdhc", to keep things sorted]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210911232707.259615-9-luca@z3ntu.xyz
Add nodes for sdhc, uart4, i2c, scm, smem, rpm-requests including
dependencies.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
[bjorn: Moved other nodes before "soc" to keep things alphabetical]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210911232707.259615-5-luca@z3ntu.xyz
The 28NM DSI PLL driver for msm8960 calculates with a 27MHz reference
clock and should hence use PXO, not CXO which runs at 19.2MHz.
Note that none of the DSI PHY/PLL drivers currently use this "ref"
clock; they all rely on (sometimes inexistant) global clock names and
usually function normally without a parent clock. This discrepancy will
be corrected in a future patch, for which this change needs to be in
place first.
Fixes: 6969d1d9c6 ("ARM: dts: qcom-apq8064: Set 'cxo_board' as ref clock of the DSI PHY")
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Link: https://lore.kernel.org/r/20210829203027.276143-2-marijn.suijten@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Also resolves these kernel warnings for APQ8064:
adreno 4300000.adreno-3xx: Using legacy qcom,chipid binding!
adreno 4300000.adreno-3xx: Use compatible qcom,adreno-320.2 instead.
Tested on Nexus 7 2013, no functional changes.
Cc: <stable@vger.kernel.org>
Signed-off-by: David Heidelberg <david@ixit.cz>
Link: https://lore.kernel.org/r/20210818065317.19822-1-david@ixit.cz
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Allwinner R40 has 3 I2S controllers, compatible to those in H3. First
two are routed to pins, while third is used internally for HDMI audio.
Add nodes for all 3 I2S controllers.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210912072914.398419-3-jernej.skrabec@gmail.com
The dumb-vga-dac and adi,adv7123 compatibles are not supposed to be used
together according to the binding.
Since the corpro gm7123 is a drop-in replacement for the adv7123, let's
remove dumb-vga-dac from our compatible list.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20210901091852.479202-47-maxime@cerno.tech
The edt,edt-ft5x06 compatible has never been a valid compatible
according to the binding. Let's change for one that is.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20210901091852.479202-46-maxime@cerno.tech
According to the SPI NOR bindings, the flash node names are supposed to
be flash@<address>. Let's fix our users to use that new scheme.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20210901091852.479202-44-maxime@cerno.tech
The operating-points-v2 nodes are named inconsistently, but mostly
either opp_table0 or gpu-opp-table. However, the underscore is an
invalid character for a node name and the thermal zone binding
explicitly requires that zones are called opp-table-*. Let's fix it.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20210901091852.479202-43-maxime@cerno.tech
Even though it translates to the same thing down to the binary level, we
should have an array of 2 number cells to describe each OPP, which in
turns create a validation warning.
Let's fix this.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20210901091852.479202-42-maxime@cerno.tech
We've had a pinctrl node name convention for a while now, let's follow
it for the AXP pinctrl nodes as well.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20210901091852.479202-41-maxime@cerno.tech
The name of our PMIC power supply names conflict with the generic
regulator supply check that matches anything called *-supply, including
the nodes, and then makes sure it's a phandle.
A node is obviously not a phandle, so let's change our power supplies
names to avoid any conflict.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20210901091852.479202-40-maxime@cerno.tech
- Add new cpufreq driver for the MediaTek MT6779 platform called
mediatek-hw along with corresponding DT bindings (Hector.Yuan).
- Add DCVS interrupt support to the qcom-cpufreq-hw driver (Thara
Gopinath).
- Make the qcom-cpufreq-hw driver set the dvfs_possible_from_any_cpu
policy flag (Taniya Das).
- Blocklist more Qualcomm platforms in cpufreq-dt-platdev (Bjorn
Andersson).
- Make the vexpress cpufreq driver set the CPUFREQ_IS_COOLING_DEV
flag (Viresh Kumar).
- Add new cpufreq driver callback to allow drivers to register
with the Energy Model in a consistent way and make several
drivers use it (Viresh Kumar).
- Change the remaining users of the .ready() cpufreq driver callback
to move the code from it elsewhere and drop it from the cpufreq
core (Viresh Kumar).
- Revert recent intel_pstate change adding HWP guaranteed performance
change notification support to it that led to problems, because
the notification in question is triggered prematurely on some
systems (Rafael Wysocki).
- Convert the OPP DT bindings to DT schema and clean them up while
at it (Rob Herring).
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Merge tag 'pm-5.15-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull more power management updates from Rafael Wysocki:
"These are mostly ARM cpufreq driver updates, including one new
MediaTek driver that has just passed all of the reviews, with the
addition of a revert of a recent intel_pstate commit, some core
cpufreq changes and a DT-related update of the operating performance
points (OPP) support code.
Specifics:
- Add new cpufreq driver for the MediaTek MT6779 platform called
mediatek-hw along with corresponding DT bindings (Hector.Yuan).
- Add DCVS interrupt support to the qcom-cpufreq-hw driver (Thara
Gopinath).
- Make the qcom-cpufreq-hw driver set the dvfs_possible_from_any_cpu
policy flag (Taniya Das).
- Blocklist more Qualcomm platforms in cpufreq-dt-platdev (Bjorn
Andersson).
- Make the vexpress cpufreq driver set the CPUFREQ_IS_COOLING_DEV
flag (Viresh Kumar).
- Add new cpufreq driver callback to allow drivers to register with
the Energy Model in a consistent way and make several drivers use
it (Viresh Kumar).
- Change the remaining users of the .ready() cpufreq driver callback
to move the code from it elsewhere and drop it from the cpufreq
core (Viresh Kumar).
- Revert recent intel_pstate change adding HWP guaranteed performance
change notification support to it that led to problems, because the
notification in question is triggered prematurely on some systems
(Rafael Wysocki).
- Convert the OPP DT bindings to DT schema and clean them up while at
it (Rob Herring)"
* tag 'pm-5.15-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (23 commits)
Revert "cpufreq: intel_pstate: Process HWP Guaranteed change notification"
cpufreq: mediatek-hw: Add support for CPUFREQ HW
cpufreq: Add of_perf_domain_get_sharing_cpumask
dt-bindings: cpufreq: add bindings for MediaTek cpufreq HW
cpufreq: Remove ready() callback
cpufreq: sh: Remove sh_cpufreq_cpu_ready()
cpufreq: acpi: Remove acpi_cpufreq_cpu_ready()
cpufreq: qcom-hw: Set dvfs_possible_from_any_cpu cpufreq driver flag
cpufreq: blocklist more Qualcomm platforms in cpufreq-dt-platdev
cpufreq: qcom-cpufreq-hw: Add dcvs interrupt support
cpufreq: scmi: Use .register_em() to register with energy model
cpufreq: vexpress: Use .register_em() to register with energy model
cpufreq: scpi: Use .register_em() to register with energy model
dt-bindings: opp: Convert to DT schema
dt-bindings: Clean-up OPP binding node names in examples
ARM: dts: omap: Drop references to opp.txt
cpufreq: qcom-cpufreq-hw: Use .register_em() to register with energy model
cpufreq: omap: Use .register_em() to register with energy model
cpufreq: mediatek: Use .register_em() to register with energy model
cpufreq: imx6q: Use .register_em() to register with energy model
...
no core changes at all this time, just driver work!
New drivers:
- New subdriver for Intel Keem Bay (an ARM-based SoC)
- New subdriver for Qualcomm MDM9607 and SM6115
- New subdriver for ST Microelectronics STM32MP135
- New subdriver for Freescale i.MX8ULP ("Ultra Low Power")
- New subdriver for Ingenic X2100
- Support for Qualcomm PMC8180, PMC8180C, SA8155p-adp PMIC GPIO
- Support Samsung Exynos850
- Support Renesas RZ/G2L
Enhancements:
- A major refactoring of the Rockchip driver, breaking part of it out
to a separate GPIO driver in drivers/gpio
- Pin bias support on Renesas r8a77995
- Add SCI pins support to Ingenic JZ4755 and JZ4760
- Mediatek device tree bindings converted to YAML
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Merge tag 'pinctrl-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is the bulk of pin control changes for the v5.15 kernel cycle, no
core changes at all this time, just driver work!
New drivers:
- New subdriver for Intel Keem Bay (an ARM-based SoC)
- New subdriver for Qualcomm MDM9607 and SM6115
- New subdriver for ST Microelectronics STM32MP135
- New subdriver for Freescale i.MX8ULP ("Ultra Low Power")
- New subdriver for Ingenic X2100
- Support for Qualcomm PMC8180, PMC8180C, SA8155p-adp PMIC GPIO
- Support Samsung Exynos850
- Support Renesas RZ/G2L
Enhancements:
- A major refactoring of the Rockchip driver, breaking part of it out
to a separate GPIO driver in drivers/gpio
- Pin bias support on Renesas r8a77995
- Add SCI pins support to Ingenic JZ4755 and JZ4760
- Mediatek device tree bindings converted to YAML"
* tag 'pinctrl-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (53 commits)
pinctrl: renesas: Add RZ/G2L pin and gpio controller driver
pinctrl: samsung: Add Exynos850 SoC specific data
dt-bindings: pinctrl: samsung: Add Exynos850 doc
MAINTAINERS: Add maintainers for amd-pinctrl driver
pinctrl: Add Intel Keem Bay pinctrl driver
dt-bindings: pinctrl: Add bindings for Intel Keembay pinctrl driver
pinctrl: zynqmp: Drop pinctrl_unregister for devm_ registered device
dt-bindings: pinctrl: qcom-pmic-gpio: Remove the interrupts property
dt-bindings: pinctrl: qcom-pmic-gpio: Convert qcom pmic gpio bindings to YAML
dt-bindings: pinctrl: mt8195: Use real world values for drive-strength arguments
dt-bindings: mediatek: convert pinctrl to yaml
arm: dts: mt8183: Move pinfunc to include/dt-bindings/pinctrl
arm: dts: mt8135: Move pinfunc to include/dt-bindings/pinctrl
pinctrl: ingenic: Add .max_register in regmap_config
pinctrl: ingenic: Fix bias config for X2000(E)
pinctrl: ingenic: Fix incorrect pull up/down info
pinctrl: Ingenic: Add pinctrl driver for X2100.
dt-bindings: pinctrl: Add bindings for Ingenic X2100.
pinctrl: Ingenic: Add SSI pins support for JZ4755 and JZ4760.
pinctrl: Ingenic: Improve the code.
...
As usual, the bulk of work in the SoC tree goes into DT files,
this time with a roughly even split between 32-bit and 64-bit
SoCs rather than the usual mostly 64-bit changes.
New SoCs:
- Microchip SAMA7 SoC family based on Cortex-A7, a new
32-bit platform based on the older SAMA5 series.
- Qualcomm Snapdragon SDM636 and SM8150, variations of the
existing phone SoCs.
- Renesas R-Car H3e-2G and M3e-2G SoCs, variations of
older Renesas SoCs.
New boards:
- Marvell CN913x reference boards
- ASpeed AST2600 BMC implementations for Facebook Cloudripper,
Elbert and Fuji server boards.
- Snapdragon 665 based Sony Xperia 10II
- Snapdragon MSM8916 based Xiaomi Redmi 2
- Snapdragon MSM8226 based Samsung Galaxy S3 Neo
- NXP i.MX based 32-bit boards:
- DHCOM based PicoITX
- DHSOM based DRC0ỉ
- SolidRun SolidSense
- SKOV i.MX6 boards.
- NXP i.MX based 64-bit boards:
- Nitrogen8 SoM and MNT Reform2
- LS1088A based Traverse Ten64
- i.MX8M based GW7902.
- NVIDIA Jetson TX2 NX Developer Kit
- 4KOpen STiH418-b2264 development board
- ux500 based Samsung phones: Gavini, Codina and Kyle
- TI AM335x based Sancloud BBE Lite
- ixp4xx dts files to replace all old board files
Other changes:
- Treewide fixes for dtc warnings
- Rockchips i/o domain support
- TI OMAP/AM3 CPSW switch driver support
- Improved device support for allwinner, aspeed, qualcomm, NXP,
nvidia, Renesas, Samsung, Amlogic, Mediatek, ixp4xx, stm32, sti,
OMAP and actions.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC DT updates from Arnd Bergmann:
"As usual, the bulk of work in the SoC tree goes into DT files, this
time with a roughly even split between 32-bit and 64-bit SoCs rather
than the usual mostly 64-bit changes.
New SoCs:
- Microchip SAMA7 SoC family based on Cortex-A7, a new 32-bit
platform based on the older SAMA5 series.
- Qualcomm Snapdragon SDM636 and SM8150, variations of the existing
phone SoCs.
- Renesas R-Car H3e-2G and M3e-2G SoCs, variations of older Renesas
SoCs.
New boards:
- Marvell CN913x reference boards
- ASpeed AST2600 BMC implementations for Facebook Cloudripper, Elbert
and Fuji server boards.
- Snapdragon 665 based Sony Xperia 10II
- Snapdragon MSM8916 based Xiaomi Redmi 2
- Snapdragon MSM8226 based Samsung Galaxy S3 Neo
- NXP i.MX based 32-bit boards:
- DHCOM based PicoITX
- DHSOM based DRC0ỉ
- SolidRun SolidSense
- SKOV i.MX6 boards.
- NXP i.MX based 64-bit boards:
- Nitrogen8 SoM and MNT Reform2
- LS1088A based Traverse Ten64
- i.MX8M based GW7902.
- NVIDIA Jetson TX2 NX Developer Kit
- 4KOpen STiH418-b2264 development board
- ux500 based Samsung phones: Gavini, Codina and Kyle
- TI AM335x based Sancloud BBE Lite
- ixp4xx dts files to replace all old board files
Other changes:
- Treewide fixes for dtc warnings
- Rockchips i/o domain support
- TI OMAP/AM3 CPSW switch driver support
- Improved device support for allwinner, aspeed, qualcomm, NXP,
nvidia, Renesas, Samsung, Amlogic, Mediatek, ixp4xx, stm32, sti,
OMAP and actions"
* tag 'dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (412 commits)
arm/arm64: dts: Fix remaining dtc 'unit_address_format' warnings
ARM: dts: rockchip: Add SFC to RV1108
arm64: dts: marvell: armada-37xx: Extend PCIe MEM space
ARM: dts: aspeed: p10bmc: Add power control pins
ARM: dts: aspeed: cloudripper: Add comments for "mdio1"
ARM: dts: aspeed: minipack: Update flash partition table
dt-bindings: arm: fsl: Add Traverse Ten64 (LS1088A) board
dt-bindings: vendor-prefixes: add Traverse Technologies
arm64: dts: add device tree for Traverse Ten64 (LS1088A)
arm64: dts: ls1088a: add missing PMU node
arm64: dts: ls1088a: add internal PCS for DPMAC1 node
ARM: dts: imx6qp-prtwd3: configure ENET_REF clock to 125MHz
ARM: dts: vf610-zii-dev-rev-b: Remove #address-cells and #size-cells property from at93c46d dt node
ARM: dts: add SKOV imx6q and imx6dl based boards
dt-bindings: arm: fsl: add SKOV imx6q and imx6dl based boards
dt-bindings: vendor-prefixes: Add an entry for SKOV A/S
arm64: dts: imx8mq-reform2: add sound support
arm64: dts: imx8m: drop interrupt-affinity for pmu
arm64: dts: imx8qxp: update pmu compatible
arm64: dts: imx8mm: update pmu compatible
...
These are updates for drivers that are tied to a particular SoC,
including the correspondig device tree bindings:
- A couple of reset controller changes for unisoc, uniphier, renesas
and zte platforms
- memory controller driver fixes for omap and tegra
- Rockchip io domain driver updates
- Lots of updates for qualcomm platforms, mostly touching their
firmware and power management drivers
- Tegra FUSE and firmware driver updateѕ
- Support for virtio transports in the SCMI firmware framework
- cleanup of ixp4xx drivers, towards enabling multiplatform
support and bringing it up to date with modern platforms
- Minor updates for keystone, mediatek, omap, renesas.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'drivers-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
"These are updates for drivers that are tied to a particular SoC,
including the correspondig device tree bindings:
- A couple of reset controller changes for unisoc, uniphier, renesas
and zte platforms
- memory controller driver fixes for omap and tegra
- Rockchip io domain driver updates
- Lots of updates for qualcomm platforms, mostly touching their
firmware and power management drivers
- Tegra FUSE and firmware driver updateѕ
- Support for virtio transports in the SCMI firmware framework
- cleanup of ixp4xx drivers, towards enabling multiplatform support
and bringing it up to date with modern platforms
- Minor updates for keystone, mediatek, omap, renesas"
* tag 'drivers-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (96 commits)
reset: simple: remove ZTE details in Kconfig help
soc: rockchip: io-domain: Remove unneeded semicolon
soc: rockchip: io-domain: add rk3568 support
dt-bindings: power: add rk3568-pmu-io-domain support
bus: ixp4xx: return on error in ixp4xx_exp_probe()
soc: renesas: Prefer memcpy() over strcpy()
firmware: tegra: Stop using seq_get_buf()
soc/tegra: fuse: Enable fuse clock on suspend for Tegra124
soc/tegra: fuse: Add runtime PM support
soc/tegra: fuse: Clear fuse->clk on driver probe failure
soc/tegra: pmc: Prevent racing with cpuilde driver
soc/tegra: bpmp: Remove unused including <linux/version.h>
dt-bindings: soc: ti: pruss: Add dma-coherent property
soc: ti: Remove pm_runtime_irq_safe() usage for smartreflex
soc: ti: pruss: Enable support for ICSSG subsystems on K3 AM64x SoCs
dt-bindings: soc: ti: pruss: Update bindings for K3 AM64x SoCs
firmware: arm_scmi: Use WARN_ON() to check configured transports
firmware: arm_scmi: Fix boolconv.cocci warnings
soc: mediatek: mmsys: Fix missing UFOE component in mt8173 table routing
soc: mediatek: mmsys: add MT8365 support
...
Here is the big set of char/misc driver changes for 5.15-rc1.
Lots of different driver subsystems are being updated in here, notably:
- mhi subsystem update
- fpga subsystem update
- coresight/hwtracing subsystem update
- interconnect subsystem update
- nvmem subsystem update
- parport drivers update
- phy subsystem update
- soundwire subsystem update
and there are some other char/misc drivers being updated as well:
- binder driver additions
- new misc drivers
- lkdtm driver updates
- mei driver updates
- sram driver updates
- other minor driver updates.
Note, there are no habanna labs driver updates in this pull request,
that will probably come later before -rc1 is out in a different request.
All of these have been in linux-next for a while with no reported
problems.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char / misc driver updates from Greg KH:
"Here is the big set of char/misc driver changes for 5.15-rc1.
Lots of different driver subsystems are being updated in here,
notably:
- mhi subsystem update
- fpga subsystem update
- coresight/hwtracing subsystem update
- interconnect subsystem update
- nvmem subsystem update
- parport drivers update
- phy subsystem update
- soundwire subsystem update
and there are some other char/misc drivers being updated as well:
- binder driver additions
- new misc drivers
- lkdtm driver updates
- mei driver updates
- sram driver updates
- other minor driver updates.
Note, there are no habanalabs driver updates in this pull request,
that will probably come later before -rc1 is out in a different
request.
All of these have been in linux-next for a while with no reported
problems"
* tag 'char-misc-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (169 commits)
Revert "bus: mhi: Add inbound buffers allocation flag"
misc/pvpanic: fix set driver data
VMCI: fix NULL pointer dereference when unmapping queue pair
char: mware: fix returnvar.cocci warnings
parport: remove non-zero check on count
soundwire: cadence: do not extend reset delay
soundwire: intel: conditionally exit clock stop mode on system suspend
soundwire: intel: skip suspend/resume/wake when link was not started
soundwire: intel: fix potential race condition during power down
phy: qcom-qmp: Add support for SM6115 UFS phy
dt-bindings: phy: qcom,qmp: Add SM6115 UFS PHY bindings
phy: qmp: Provide unique clock names for DP clocks
lkdtm: remove IDE_CORE_CP crashpoint
lkdtm: replace SCSI_DISPATCH_CMD with SCSI_QUEUE_RQ
coresight: Replace deprecated CPU-hotplug functions.
Documentation: coresight: Add documentation for CoreSight config
coresight: syscfg: Add initial configfs support
coresight: config: Add preloaded configurations
coresight: etm4x: Add complex configuration handlers to etmv4
coresight: etm-perf: Update to activate selected configuration
...
Pull operating performance points (OPP) framework changes for v5.15
from Viresh Kumar:
"This moves the OPP bindings to DT schema (Rob Herring)."
* 'opp/linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm:
dt-bindings: opp: Convert to DT schema
dt-bindings: Clean-up OPP binding node names in examples
ARM: dts: omap: Drop references to opp.txt
Fix all the remaining dtc 'unit_address_format' warnings except for the ones
related to 'register-bit-led'. For those, we need to decide on and document
the node name.
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210823165126.2320910-1-robh@kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
opp.txt is getting removed with the OPP binding converted to DT schema.
As it is unusual to reference a binding doc from a dts file, let's just
remove the reference.
Cc: "Benoît Cousson" <bcousson@baylibre.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Add a devicetree entry for the Rockchip SFC for the RV1108 SOC.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20210812134546.31340-5-jon.lin@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
- New machines
* Facebook's Cloudripper
* Facebook's Elbert
* Facebook's Fuji
All three carry the description of "Facebook's next generation switch
platform with an AST2600 BMC integrated for health monitoring
purpose."
They share a 128 MB SPI NOR flash layout that is also used by some
older platforms.
* Inspur's NF5280M6, an x86 platform server with an AST2500-based BMC
- SGPIO updates including AST2600 support
- GPIO descriptions for the IBM AST2600 machines
- Pinctrl fix
- Updates to Facebook's AST2500 based machines
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Merge tag 'aspeed-5.15-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into arm/dt
ASPEED device tree updates for 5.15
- New machines
* Facebook's Cloudripper
* Facebook's Elbert
* Facebook's Fuji
All three carry the description of "Facebook's next generation switch
platform with an AST2600 BMC integrated for health monitoring
purpose."
They share a 128 MB SPI NOR flash layout that is also used by some
older platforms.
* Inspur's NF5280M6, an x86 platform server with an AST2500-based BMC
- SGPIO updates including AST2600 support
- GPIO descriptions for the IBM AST2600 machines
- Pinctrl fix
- Updates to Facebook's AST2500 based machines
* tag 'aspeed-5.15-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc: (23 commits)
ARM: dts: aspeed: p10bmc: Add power control pins
ARM: dts: aspeed: cloudripper: Add comments for "mdio1"
ARM: dts: aspeed: minipack: Update flash partition table
ARM: dts: aspeed: Add Facebook Fuji (AST2600) BMC
ARM: dts: aspeed: Add Facebook Elbert (AST2600) BMC
ARM: dts: aspeed: Add Facebook Cloudripper (AST2600) BMC
ARM: dts: aspeed: Common dtsi for Facebook AST2600 Network BMCs
ARM: dts: aspeed: wedge400: Use common flash layout
ARM: dts: Add Facebook BMC 128MB flash layout
ARM: dts: aspeed-g5: Remove ngpios from sgpio node.
ARM: dts: aspeed-g6: Add SGPIO node.
dt-bindings: aspeed-sgpio: Add ast2600 sgpio
dt-bindings: aspeed-sgpio: Convert txt bindings to yaml.
ARM: dts: aspeed: ast2500evb: Enable built in RTC
ARM: dts: aspeed: tacoma: Add TPM reset GPIO
ARM: dts: rainier, everest: Add TPM reset GPIO
ARM: dts: aspeed: wedge100: Enable ADC channels
ARM: dts: aspeed: galaxy100: Remove redundant ADC device
ARM: dts: aspeed: wedge40: Remove redundant ADC device
ARM: dts: aspeed: Enable ADC in Facebook AST2400 common dtsi
...
Link: https://lore.kernel.org/r/CACPK8XdWRBb9cuDWGQPfK8R8TsZuydJQHsL4_e2w=HvCKAMogg@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This introduces the MSM8226 platform and an initial dts for the Samsung
Galaxy S III Neo phone.
MSM8974 gains another UART and this is used to enable Bluetooth on the
Sony Xperia Z2 Tablet. Samsung Galaxy S5 gains regulator definitions for
audio and modem remoteprocs, effectively enabling these.
DSI clocks on APQ8064 are updates as the old legacy clock names are no
longer supported by the driver. And IPQ806x GMAC nodes gains AHB resets
wired up.
Lastly APQ8060 is converted to a SPDX header and the ethernet node is
updates in accordance with the binding.
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Merge tag 'qcom-dts-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm dts updates for v5.15
This introduces the MSM8226 platform and an initial dts for the Samsung
Galaxy S III Neo phone.
MSM8974 gains another UART and this is used to enable Bluetooth on the
Sony Xperia Z2 Tablet. Samsung Galaxy S5 gains regulator definitions for
audio and modem remoteprocs, effectively enabling these.
DSI clocks on APQ8064 are updates as the old legacy clock names are no
longer supported by the driver. And IPQ806x GMAC nodes gains AHB resets
wired up.
Lastly APQ8060 is converted to a SPDX header and the ethernet node is
updates in accordance with the binding.
* tag 'qcom-dts-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
ARM: dts: qcom: add ahb reset to ipq806x-gmac
ARM: dts: qcom: Fix up APQ8060 DragonBoard license
ARM: dts: qcom: msm8974: castor: Add Bluetooth-related nodes
ARM: dts: qcom: msm8974: Add blsp2_uart7 for bluetooth on sirius
ARM: dts: qcom: Add initial DTS file for Samsung Galaxy S III Neo phone
dt-bindings: arm: qcom: Document MSM8226 SoC binding
ARM: dts: qcom: Add support for MSM8226 SoC
ARM: dts: qcom: apq8060: Correct Ethernet node name and drop bogus irq property
ARM: dts: qcom: apq8064: correct clock names
ARM: dts: qcom: msm8974-klte: Enable remote processors
Link: https://lore.kernel.org/r/20210816211957.579365-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- A series from Christoph Niedermaier to clean up i.MX6 DHCOM support.
- New board support: DHCOM based PicoITX, DHSOM based DRC02, SolidRun
SolidSense, SKOV i.MX6 boards.
- Add WiFi support for i.MX7D base reMkarkable2 device.
- Add FTM devices for i.MX7 to have Flex Timers support.
- Configure ENET_REF clock to 125MHz for imx6qp-prtwd3 to support RGMII
PHY mode.
- Drop unneeded #address-cells and #size-cells from vf610-zii SPI EEPROM
device node.
- Add missing USB OTG OC pinmux and Crypto device for i.MX6QDL Gateworks
boards.
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Merge tag 'imx-dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm32 device tree changes for 5.15:
- A series from Christoph Niedermaier to clean up i.MX6 DHCOM support.
- New board support: DHCOM based PicoITX, DHSOM based DRC02, SolidRun
SolidSense, SKOV i.MX6 boards.
- Add WiFi support for i.MX7D base reMkarkable2 device.
- Add FTM devices for i.MX7 to have Flex Timers support.
- Configure ENET_REF clock to 125MHz for imx6qp-prtwd3 to support RGMII
PHY mode.
- Drop unneeded #address-cells and #size-cells from vf610-zii SPI EEPROM
device node.
- Add missing USB OTG OC pinmux and Crypto device for i.MX6QDL Gateworks
boards.
* tag 'imx-dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (23 commits)
ARM: dts: imx6qp-prtwd3: configure ENET_REF clock to 125MHz
ARM: dts: vf610-zii-dev-rev-b: Remove #address-cells and #size-cells property from at93c46d dt node
ARM: dts: add SKOV imx6q and imx6dl based boards
ARM: dts: imx7: add ftm nodes for Flex Timers
ARM: dts: imx6qdl-dhcom: Add DHSOM based DRC02 board
ARM: dts: imx6qdl-dhcom: Add DHCOM based PicoITX board
ARM: dts: imx6qdl-dhcom: Split SoC-independent parts of DHCOM SOM and PDK2
ARM: dts: imx6q-dhcom: Cleanup of the devicetrees
ARM: dts: imx6q-dhcom: Rearrange of iomux
ARM: dts: imx6q-dhcom: Rework of the DHCOM GPIO pinctrls
ARM: dts: imx6q-dhcom: Use 1G ethernet on the PDK2 board
ARM: dts: imx6q-dhcom: Set minimum memory size of all DHCOM i.MX6 variants
ARM: dts: imx6q-dhcom: Remove ddc-i2c-bus property
ARM: dts: imx6q-dhcom: Add keys and leds to the PDK2 board
ARM: dts: imx6q-dhcom: Align stdout-path with other DHCOM SoMs
ARM: dts: imx6q-dhcom: Adding Wake pin to the PCIe pinctrl
ARM: dts: imx6q-dhcom: Fill GPIO line names on DHCOM SoM
ARM: dts: imx6q-dhcom: Add interrupt and compatible to the ethernet PHY
ARM: dts: imx6q-dhcom: Add the parallel system bus
ARM: dts: imx7d-remarkable2: Add WiFi support
...
Link: https://lore.kernel.org/r/20210814133853.9981-2-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The majority of this is temperature sensor additions for various devices
and fixes to the trigger type of the thermal interrupts.
Other than that there are various minor fixes across the board.
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Merge tag 'tegra-for-5.15-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.15-rc1
The majority of this is temperature sensor additions for various devices
and fixes to the trigger type of the thermal interrupts.
Other than that there are various minor fixes across the board.
* tag 'tegra-for-5.15-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: tamonten: Fix UART pad setting
ARM: tegra: nexus7: Improve thermal zones
ARM: tegra: acer-a500: Improve thermal zones
ARM: tegra: acer-a500: Use verbose variant of atmel,wakeup-method value
ARM: tegra: acer-a500: Add power supplies to accelerometer
ARM: tegra: acer-a500: Remove bogus USB VBUS regulators
ARM: tegra: jetson-tk1: Correct interrupt trigger type of temperature sensor
ARM: tegra: dalmore: Correct interrupt trigger type of temperature sensor
ARM: tegra: cardhu: Correct interrupt trigger type of temperature sensor
ARM: tegra: apalis: Correct interrupt trigger type of temperature sensor
ARM: tegra: nyan: Correct interrupt trigger type of temperature sensor
ARM: tegra: acer-a500: Add interrupt to temperature sensor node
ARM: tegra: nexus7: Add interrupt to temperature sensor node
ARM: tegra: paz00: Add interrupt to temperature sensor node
ARM: tegra: ouya: Add interrupt to temperature sensor node
ARM: tegra: Add SoC thermal sensor to Tegra30 device-trees
Link: https://lore.kernel.org/r/20210813162157.2820913-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add some comments to explain the purpose of "mdio1" controller: it's
connected to the MDC/MDIO interface of the on-board management switch.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Link: https://lore.kernel.org/r/20210813061900.24539-1-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
By default ENET_REF is configured to 50MHz, which is usable for the RMII
link. In case RGMII is used, we need 125MHz clock.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Remove #address-cells and #size-cells property from at93c46d device tree
node as it does not have child nodes.
Fixes: 1556063fde ("ARM: dts: vf610-zii-dev: Add ZII development board.")
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch fixes the tristate and pullup configuration for UART 1 to 3
on the Tamonten SOM.
Signed-off-by: Andreas Obergschwandtner <andreas.obergschwandtner@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Use skin temperature for maintaining temperature that is suitable
specifically for Nexus 7. Add CPU thermal zone that protects silicon.
All these changes don't make a significant difference, but it is a
more correct definition of thermal zones.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Use skin temperature for maintaining temperature that is suitable
specifically for A500. Add CPU thermal zone that protects silicon.
All these changes don't make a significant difference, but it is a
more correct definition of thermal zones.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The verbose variant of the atmel,wakeup-method value was lost when patch
that added the property was merged because it conflicted with other patch,
re-add it for consistency.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The configuration of USB VBUS regulators was borrowed from downstream
kernel, which is incorrect because the corresponding GPIOs are connected
to PROX_EN (A501 3G model) and LED_EN pins in accordance to the board
schematics. USB works fine with both GPIOs being disabled, so remove the
bogus USB VBUS regulators. The USB VBUS of USB3 is supplied from the fixed
5v system regulator and device-mode USB1 doesn't have VBUS switches.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The LM90 temperature sensor should use edge-triggered interrupt because
LM90 hardware doesn't deassert interrupt line until temperature is back
to normal state, which results in interrupt storm. Correct the interrupt
trigger type.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The LM90 temperature sensor should use edge-triggered interrupt because
LM90 hardware doesn't deassert interrupt line until temperature is back
to normal state, which results in interrupt storm. Correct the interrupt
trigger type.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The LM90 temperature sensor should use edge-triggered interrupt because
LM90 hardware doesn't deassert interrupt line until temperature is back
to normal state, which results in interrupt storm. Correct the interrupt
trigger type.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The LM90 temperature sensor should use edge-triggered interrupt because
LM90 hardware doesn't deassert interrupt line until temperature is back
to normal state, which results in interrupt storm. Correct the interrupt
trigger type.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The LM90 temperature sensor should use edge-triggered interrupt because
LM90 hardware doesn't deassert interrupt line until temperature is back
to normal state, which results in interrupt storm. Correct the interrupt
trigger type.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The TEMP_ALERT pin of LM90 temperature sensor is connected to Tegra SoC.
Add interrupt property to the temperature sensor for completeness.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The TEMP_ALERT pin of LM90 temperature sensor is connected to Tegra SoC.
Add interrupt property to the temperature sensor for completeness.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The TEMP_ALERT pin of LM90 temperature sensor is connected to Tegra SoC.
Add interrupt property to the temperature sensor for completeness.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The TEMP_ALERT pin of LM90 temperature sensor is connected to Tegra SoC.
Add interrupt property to the temperature sensor and enable it in pinmux,
for completeness.
Tested-by: Matt Merhar <mattmerhar@protonmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the on-chip SoC thermal sensor to Tegra30 device-trees. Now CPU
temperature reporting and thermal throttling is available on all Tegra30
devices universally.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add initial version of device tree for Facebook Fuji (AST2600) BMC.
Fuji is Facebook's next generation switch platform with an AST2600 BMC
integrated for health monitoring purpose.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210805222818.8391-7-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add initial version of device tree for Facebook Elbert (AST2600) BMC.
Elbert is Facebook's next generation switch platform with an AST2600 BMC
integrated for health monitoring purpose.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210805222818.8391-6-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add initial version of device tree for Facebook Cloudripper (AST2600) BMC.
Cloudripper is Facebook's next generation switch platform with an AST2600
BMC integrated for health monitoring purpose.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210805222818.8391-5-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
This common descirption is included by all Facebook AST2600 Network BMC
platforms to minimize duplicated device entries across Facebook Network
BMC device trees.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210805222818.8391-4-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Simplify wedge400 flash layout by using the common layout defined in
"facebook-bmc-flash-layout-128.dtsi".
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210805222818.8391-3-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
This is the layout used by Facebook BMC systems. It describes the fixed
flash layout of a 128MB mtd device.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210805222818.8391-2-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
A series of changes to update am3 to use cpsw switch driver and
few updates to earlier SanCloud changes. The plan was to send the
cpsw switch driver changes earlier but looks like I never tagged
the mail thread in my inbox to apply for v5.15.
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Merge tag 'omap-for-v5.15/dt-am3-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Changes for am3 cpsw and SanCloud for v5.15
A series of changes to update am3 to use cpsw switch driver and
few updates to earlier SanCloud changes. The plan was to send the
cpsw switch driver changes earlier but looks like I never tagged
the mail thread in my inbox to apply for v5.15.
* tag 'omap-for-v5.15/dt-am3-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x-sancloud-bbe: Drop usb wifi comment
ARM: dts: am335x-sancloud-bbe: Fix missing pinctrl refs
ARM: dts: am335x-bone: switch to new cpsw switch drv
ARM: dts: am33xx: update ethernet aliases
ARM: dts: am335x-sl50: switch to new cpsw switch drv
ARM: dts: am335x-shc: switch to new cpsw switch drv
ARM: dts: am335x-phycore: switch to new cpsw switch drv
ARM: dts: am335x-pepper: switch to new cpsw switch drv
ARM: dts: am335x-pdu001: switch to new cpsw switch drv
ARM: dts: am335x-osd3358-sm-red: switch to new cpsw switch drv
ARM: dts: am335x-myirtech: switch to new cpsw switch drv
ARM: dts: am335x-moxa-uc: switch to new cpsw switch drv
ARM: dts: am335x-lxm: switch to new cpsw switch drv
ARM: dts: am335x-igep0033: switch to new cpsw switch drv
ARM: dts: am335x-cm-t335: switch to new cpsw switch drv
ARM: dts: am335x-chiliboard: switch to new cpsw switch drv
ARM: dts: am335x-nano: switch to new cpsw switch drv
ARM: dts: am335x-baltos: switch to new cpsw switch drv
Link: https://lore.kernel.org/r/pull-1628751694-126144@atomide.com-3
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Fix up some (non-urgent) IRQ flags for the PCI buses.
- Add the second UART to the generic ixp4xx.dtsi
- Make use of the new expansion bus driver in all device
trees with e.g. flash memory on the expansion bus.
- Adds the CF card slot to the Gateworks GW2358.
- Add new device trees for:
- Iomega NAS 100D
- D-Link DSM-G600
- Netgear WG302v2
- Arcom Vulcan
- Gateworks Avila GW2348
- Intel IXPD425 and siblings
- Coyote and IXDPG425
- Linksys WRV54G
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Merge tag 'ixp4xx-dts-arm-soc-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt
IXP4xx DTS file updates for the v5.15 kernel cycle:
- Fix up some (non-urgent) IRQ flags for the PCI buses.
- Add the second UART to the generic ixp4xx.dtsi
- Make use of the new expansion bus driver in all device
trees with e.g. flash memory on the expansion bus.
- Adds the CF card slot to the Gateworks GW2358.
- Add new device trees for:
- Iomega NAS 100D
- D-Link DSM-G600
- Netgear WG302v2
- Arcom Vulcan
- Gateworks Avila GW2348
- Intel IXPD425 and siblings
- Coyote and IXDPG425
- Linksys WRV54G
* tag 'ixp4xx-dts-arm-soc-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: ixp4xx: Add a devicetree for Freecom FSG-3
ARM: dts: ixp4xx: Add devicetree for Linksys WRV54G
ARM: dts: ixp4xx: Add device trees for Coyote and IXDPG425
ARM: dts: ixp4xx: Add Intel IXDP425 etc reference designs
ARM: dts: ixp4xx: Add CF to GW2358
ARM: dts: ixp4xx: Add Gateworks Avila GW2348 device tree
ARM: dts: ixp4xx: Add Arcom Vulcan device tree
ARM: dts: ixp4xx: Add devicetree for Netgear WG302v2
ARM: dts: ixp4xx: Use the expansion bus
ARM: dts: ixp4xx: Add second UART
ARM: dts: ixp4xx: Add devicetree for D-Link DSM-G600 rev A
ARM: dts: ixp4xx: Move EPBX100 flash to external bus node
ARM: dts: ixp4xx: Add devicetree for Iomega NAS 100D
ARM: dts: ixp4xx: Fix up bad interrupt flags
Link: https://lore.kernel.org/r/CACRpkdY19AvWT--OcmEKbwFue_EcThVs7uZeHkzORten7xj-RA@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Devicetree changes for omaps to configure more devices, and
add support for new SoC variants and devices:
- Add add gpio-line-names for am335x-boneblue
- Add support for dra762 abz package
- Two patches for McASP support on omap4
- Three patches to add support for am335x-sancloud-bbe-lite
- A series of changes to configure PRUSS for am3/4/5
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Merge tag 'omap-for-v5.15/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Devicetree changes for omaps for v5.15
Devicetree changes for omaps to configure more devices, and
add support for new SoC variants and devices:
- Add add gpio-line-names for am335x-boneblue
- Add support for dra762 abz package
- Two patches for McASP support on omap4
- Three patches to add support for am335x-sancloud-bbe-lite
- A series of changes to configure PRUSS for am3/4/5
* tag 'omap-for-v5.15/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am57xx: Add PRUSS MDIO controller nodes
ARM: dts: am57xx: Add PRU-ICSS nodes
ARM: dts: am4372: Add PRUSS MDIO controller node
ARM: dts: am4372: Add the PRU-ICSS0 DT node
ARM: dts: am4372: Add the PRU-ICSS1 DT node
ARM: dts: am335x-icev2: Enable PRU-ICSS module
ARM: dts: am335x-evmsk: Enable PRU-ICSS module
ARM: dts: am335x-evm: Enable PRU-ICSS module
ARM: dts: am335x-bone-common: Enable PRU-ICSS node
ARM: dts: am33xx-l4: Add PRUSS MDIO controller node
ARM: dts: am33xx-l4: Add PRUSS node
ARM: dts: am335x-sancloud-bbe-lite: New devicetree
ARM: dts: am335x-sancloud-bbe: Extract common code
ARM: dts: am335x-boneblack: Extract HDMI config
ARM: dts: omap4-l4-abe: Add McASP configuration
ARM: dts: omap4-l4-abe: Correct sidle modes for McASP
ARM: dts: Add support for dra762 abz package
ARM: dts: am335x-boneblue: add gpio-line-names
Link: https://lore.kernel.org/r/pull-1628153040-834155@atomide.com-3
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
It includes all required changes for handling i.MX6/7 eCSPI errata
ERR009165, which causes FIFO transfer to be sent twice in DMA mode.
Both SPI and DMA maintainers agree to merge it through arm-soc tree.
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Merge tag 'imx-ecspi-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers
i.MX eCSPI errata handling for 5.15:
It includes all required changes for handling i.MX6/7 eCSPI errata
ERR009165, which causes FIFO transfer to be sent twice in DMA mode.
Both SPI and DMA maintainers agree to merge it through arm-soc tree.
* tag 'imx-ecspi-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
dmaengine: imx-sdma: add terminated list for freed descriptor in worker
dmaengine: imx-sdma: add uart rom script
dma: imx-sdma: add i.mx6ul compatible name
dmaengine: imx-sdma: remove ERR009165 on i.mx6ul
spi: imx: remove ERR009165 workaround on i.mx6ul
spi: imx: fix ERR009165
dmaengine: imx-sdma: add mcu_2_ecspi script
dmaengine: dma: imx-sdma: add fw_loaded and is_ram_script
dmaengine: imx-sdma: remove duplicated sdma_load_context
Revert "dmaengine: imx-sdma: refine to load context only once"
Revert "ARM: dts: imx6: Use correct SDMA script for SPI cores"
Revert "ARM: dts: imx6q: Use correct SDMA script for SPI5 core"
Link: https://lore.kernel.org/r/20210809071838.GF30984@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Move mt8135-pinfunc.h into include/dt-bindings/pinctrl so that we can
include it in yaml examples.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210804044033.3047296-1-hsinyi@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The wifi chip on USB port 4 may not be present on all BBE variants.
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
pinctrl settings for the USB hub, barometer & accelerometer need to be
referenced from the relevant nodes to work.
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The i.MX7 has two possible Flex Timers, disabled by default. Moreover, the
block is the same as LS1021a, then the drivers can be used as-is.
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add DT for DH DRC02 unit, which is a universal controller device.
The system has two ethernet ports, two CANs, RS485 and RS232, USB,
capacitive buttons and an OLED display.
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: kernel@dh-electronics.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add DT for DH PicoITX unit, which is a bare-bones carrier board for
the DHCOM. The board has ethernet port, USB, CAN, LEDs and a custom
board-to-board expansion connector.
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: kernel@dh-electronics.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The DH electronics PDK2 can be populated with SoM with i.MX6S/DL/D/Q
variants. Split the SoC-independent parts of the SoM and PDK2 into the
imx6qdl-dhcom-*.dtsi and reduce imx6q-dhcom-pdk2.dts to example of
adding i.MX6S/DL/D/Q variants of the SoM into a PDK2 carrier board.
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: kernel@dh-electronics.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Following cleanups of the devicetrees done, no change in function:
- Remove parentheses from the license
- Update copyright date
- Alphabetical sorting
- Add comments
- Update pinctrl names
- Hex values in lower case
- Set 3rd values of fixed regulators gpio property to 0
- Replace interrupt type with a define
- Remove superfluous property max-speed from the fec node
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: kernel@dh-electronics.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move iomux to the end, no change in function.
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: kernel@dh-electronics.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The function of each SoM pins is defined in the DHCOM standard [1] and
subset of them is defined as GPIOs (pins A-W). To ensure the interchange-
ability of the DHCOM SoMs, the function of the pins are fixed and cannot
be changed. On board level the DHCOM GPIOs can be used associated with
different blocks e.g. for interrupt or reset, but the function is always
GPIO. If not used, they can be freely used in the user space.
Therefore the whole configuration of SoM pins is made in the SoM DT.
Defining the DHCOM GPIO pins as a separate pinctrl nodes makes moving a
subset of them to an appropriate block pinctrl group easier on board level,
since it is not necessary to have a large pinctrl hog group containing
unrelated pinmux entries on board level. This also makes it easy to update
the SoM DT without having to update all the board DTs too. If necessary it
is also possible to change the electrical properties of the DHCOM GPIOs by
overwriting the pinctrl on board level.
[1] https://wiki.dh-electronics.com/images/2/2e/DOC_DHCOM-Standard-Specification_R01_2016-11-17.pdf
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: kernel@dh-electronics.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The PDK2 board is capable of running both 100M and 1G ethernet. However,
the i.MX6 has only one ethernet MAC, so it is possible to configure
either 100M or 1G Ethernet. In case of 100M option, the PHY is on the
SoM and the signals are routed to a RJ45 port. For 1G the PHY is on
the PDK2 board with another RJ45 port. 100M and 1G ethernet use
different signal pins from the i.MX6, but share the MDIO bus.
This SoM board combination is used to demonstrate how to enable 1G
ethernet configuration.
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: kernel@dh-electronics.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
We need the fixes in here as well, and resolves some merge issues with
the mhi codebase.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This adds a devicetree for the Freecom FSG-3, a combined router
and NAS.
Cc: Rod Whitby <rod@whitby.id.au>
Cc: Marc Zyngier <maz@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a device tree for the Linksys WRV54G also known as
Gemtek GTWX5715. Some enhancements have been folded in from the
OpenWrt patches.
This supports everything in the upstream kernel with placeholders
for the out-of-tree multiphy which exist in OpenWrt.
Cc: phj@phj.hu
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds device trees for the ADI Engineering Coyote and the
Intel IXDPG425 reference design. The ethernet set-up on the
IXDPG425 is a bit dubious because I think it uses a DSA
switch chip, but this is a good as it gets right now.
The Coyote boardfile claims an IDE port exist at 0xFFFE1000
but the implementation does not use this. If you have the
board and can/want to test, please contact me.
Cc: Deepak Saxena <dsaxena@plexity.net>
Cc: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Cc: Zoltan HERPAI <wigyori@uid0.hu>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The IXDP425, IXCDP1100, KIXRP435 and IXDP465 are similar Intel reference
designs for IXP42x, IXP43x and IXP4[56]x.
This adds device trees for these so the board files can be migrated.
Cc: Deepak Saxena <dsaxena@plexity.net>
Cc: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a device tree file for the Gateworks Avila GW2348 platform
supporting all the features of the in-kernel boardfiles.
There are more boards in the Avila family, but this is the one that
is supported out-of-the-box by the current boardfiles. Some extra
features have been folded in from the upstream OpenWrt sources,
such as proper ethernet setup for both ethernet ports.
More variants can be added based on this device tree. Some of those
have DSA switches, multiple LEDs, multiple serial ports and similar
and would need some more elaborate work.
Cc: Michael-Luke Jones <mlj28@cam.ac.uk>
Cc: Deepak Saxena <dsaxena@plexity.net>
Cc: Tom Billman <kernel@giantshoulderinc.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a devicetree for the Netgear WG302v2 router.
The DTS is mostly based on the upstream boardfile but I also
added in the ethernet from OpenWrt to get a more complete
system.
Cc: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Replace the "simple-bus" simplification by the proper bus for
IXP4xx memory or device expansion.
Use chip-select addressing with two address cells on all the
flashes mounted on the IXP4xx devices. This includes all flash
chips.
Change the unit-name from @50000000 to @c4000000 as the DTS
validation screams. The registers for controlling the bus are
at c4000000 but the actual memory windows and ranges are at
50000000. Well it is just syntax, we can live with it.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The IXP4xx has two UARTs and some platforms make use of the
second one so add this to the include DTSI.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a devicetree for the D-Link DSM-G600 Wireless Network
Storage Enclosure so that we can delete the boardfile. The boardfile
does not even define an ethernet interface as it has an external
ethernet on PCI. This devicetree is for revision A using IXP420
the rev B version uses PowerPC.
Cc: Michael-Luke Jones <mlj28@cam.ac.uk>
Cc: Rod Whitby <rod@whitby.id.au>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Michael Westerhof <mwester@dls.net>
Cc: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This moves the EPBX100 flash under the external bus on CS0
like on the other IXP4xx systems.
Cc: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This creates a more or less fully featured device tree for the
IXP42x-based Iomega NAS 100D.
We can't read out the raw flash contents for ethernet MAC, and
we cannot handle a power-off-button inside the kernel like the
boardfile does. These two things are normally done in userspace.
This conversion is part of moving all of the IXP4xx board files
over to device tree to modernize the IXP4xx kernel.
Cc: Rod Whitby <rod@whitby.id.au>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The PCI hosts had bad IRQ semantics, these are all active low.
Use the proper define and fix all in-tree users.
Suggested-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The board features a 128MiB NAND chip and recently linux gained support
for the NAND controller on the Zynq SoC. Thus add the corresponding
devicetree nodes.
Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20210616155437.27378-4-michael@walle.cc
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Recently, a driver for the ARM Primecell PL35x static memory controller
(including NAND controller) was added in linux. Add the corresponding
device tree node.
Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20210616155437.27378-3-michael@walle.cc
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The STiH418 embedded the same sensor as the STiH410.
This commit adds the corresponding node, relying on the st_thermal
driver.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The rng11 is not available on the STiH418 hence is disabled in the
stih418.dtsi
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The STiH407 family (and further versions STiH410/STiH418) embedded
a serial flash controller allowing fast access to SPI-NOR.
This commit adds the corresponding node, relying on the st-spi-fsm
drivers.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The clkgen-fsyn driver now embed the clock names (assuming the
right compatible is used). Remove all clock-output-names property
and update when necessary the compatible.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The clkgen-fsyn driver now embed the clock names (assuming the
right compatible is used). Remove all clock-output-names property
and update when necessary the compatible.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The clkgen-fsyn driver now embed the clock names (assuming the
right compatible is used). Remove all clock-output-names property
and update when necessary the compatible.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The clkgen-pll driver now embed the clock names (assuming the
right compatible is used). Remove all clock-output-names property
and update when necessary the compatible.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The clkgen-pll driver now embed the clock names (assuming the
right compatible is used). Remove all clock-output-names property
and update when necessary the compatible.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The clkgen-pll driver now embed the clock names (assuming the
right compatible is used). Remove all clock-output-names property
and update when necessary the compatible.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
With the introduction of new flexgen compatible within the clk-flexgen
driver, remove the clock-output-names entry from the flexgen nodes
and set the new proper compatible corresponding.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
With the introduction of new flexgen compatible within the clk-flexgen
driver, remove the clock-output-names entry from the flexgen nodes
and set the new proper compatible corresponding.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
With the introduction of new flexgen compatible within the clk-flexgen
driver, remove the clock-output-names entry from the flexgen nodes
and set the new proper compatible corresponding.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.
So, Switch BeagleBone boards to use new cpsw switch driver. Those boards
have or 2 Ext. port wired and configured in dual_mac mode by default, or
only 1 Ext. port.
For am335x-sancloud-bbe-common.dtsi also removed duplicated davinci_mdio DT
nodes which already defined in am335x-bone-common.dtsi.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Update ethernet aliases to point at CPSW switchdev driver.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.
So, switch Toby Churchill SL50 Series to use new cpsw switch driver.
Those boards have or 2 Ext. port wired and configured in dual_mac mode by
default, or only 1 Ext. port.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.
So, switch Bosch SHC to use new cpsw switch driver.
Those boards have or 2 Ext. port wired and configured in dual_mac mode by
default, or only 1 Ext. port.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.
So, switch Phytec AM335x phyCORE SOM, phyBOARD-WEGA, phyBOARD-REGOR,
PCM-953 to use new cpsw switch driver. Those boards have or 2 Ext. port
wired and configured in dual_mac mode by default, or only 1 Ext. port.
Cc: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.
So, switch Gumstix Pepper to use new cpsw switch driver.
Those boards have or 2 Ext. port wired and configured in dual_mac mode by
default, or only 1 Ext. port.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.
So, switch EETS,PDU001 to use new cpsw switch driver. Those boards have or
2 Ext. port wired and configured in dual_mac mode by default, or only 1
Ext. port.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.
So, switch Octavo Systems OSD3358-SM-RED to use new cpsw switch driver.
Those boards have or 2 Ext. port wired and configured in dual_mac mode by
default, or only 1 Ext. port.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.
So, switch MYIR MYC-AM335X/MYD-AM335X to use new cpsw switch driver. Those
boards have or 2 Ext. port wired and configured in dual_mac mode by
default, or only 1 Ext. port.
Cc: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.
So, switch Moxa am335x-moxa-uc-210x/8100 to use new cpsw switch driver.
Those boards have or 2 Ext. port wired and configured in dual_mac mode by
default, or only 1 Ext. port.
Cc: Johnson Chen <johnsonch.chen@moxa.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.
So, switch NovaTech OrionLXm to use new cpsw switch driver. Those boards
have or 2 Ext. port wired and configured in dual_mac mode by default, or
only 1 Ext. port
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.
So, switch am335x-igep0033 to use new cpsw switch driver. Those boards have
or 2 Ext. port wired and configured in dual_mac mode by default, or only 1
Ext. port.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.
So, switch CompuLab CM-T335 to use new cpsw switch driver. Those boards
have or 2 Ext. port wired and configured in dual_mac mode by default, or
only 1 Ext. port.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.
So, switch AM335x Chiliboard to use new cpsw switch driver. Those boards
have or 2 Ext. port wired and configured in dual_mac mode by default, or
only 1 Ext. port.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.
So, switch Newflow AM335x NanoBone to use new cpsw switch driver. Those
boards have or 2 Ext. port wired and configured in dual_mac mode by
default, or only 1 Ext. port.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.
So, switch OnRISC Baltos and NetCom/Cam boards to use new cpsw switch
driver. Those boards have or 2 Ext. port wired and configured in dual_mac
mode by default, or only 1 Ext. port.
Cc: Yegor Yefremov <yegorslists@googlemail.com>
Cc: Christina Quast <cquast@hanoverdisplays.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This file is licensed in some kind of BSD manner, put it under
the combined GPL+BSD license like what the bindings use, it
seems most helpful.
I wrote the whole file so whatever. Those are my principles,
if you don't like them: I have others.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20210409124954.320529-1-linus.walleij@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Castor has a BCM4339 attached to BLSP2 UART7, add the necessary nodes to
define the uart as well as the serdev BCM.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Julian Weigt <juw@posteo.de>
Link: https://lore.kernel.org/r/20210723202101.65371-2-juw@posteo.de
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
PPD has only one ACHC device, which effectively is a Kinetis
microcontroller. It has one SPI interface used for normal
communication. Additionally it's possible to flash the device
firmware using NXP's EzPort protocol by correctly driving a
second chip select pin and the device reset pin.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20210802172309.164365-3-sebastian.reichel@collabora.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
MT7623/BPI-R2 has idle temperature after bootup from 48 degrees celsius
increase the passive trip temp threshold to not trottle CPU frequency at
this temperature
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20210725163451.217610-1-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
- New device trees for these mobile phones:
- Samsung Gavini
- Samsung Codina
- Samsung Kyle
- Flag eMMC cards as non-SD non-SDIO to save time
- Link USB PHY to USB controller in the device tree
- Fix up the operating points to the actual clock frequencies
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Merge tag 'ux500-dts-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt
Ux500 Device Tree updates for the v5.15 kernel cycle:
- New device trees for these mobile phones:
- Samsung Gavini
- Samsung Codina
- Samsung Kyle
- Flag eMMC cards as non-SD non-SDIO to save time
- Link USB PHY to USB controller in the device tree
- Fix up the operating points to the actual clock frequencies
* tag 'ux500-dts-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: ux500: Adjust operating points to reality
ARM: dts: ux500: Add a device tree for Kyle
ARM: dts: ux500: Add devicetree for Codina
ARM: dts: ux500: ab8500: Link USB PHY to USB controller node
ARM: dts: ux500: Flag eMMCs as non-SDIO/SD
ARM: dts: ux500: Add device tree for Samsung Gavini
Link: https://lore.kernel.org/r/CACRpkdbjBv5ywZZD8rK07d5sLcHsG8o4iYD-3jHO=HLg6-nKnA@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Some fixes for regressions and boot issues for various devices:
- Fix gpt12 system timer regression on earlier beagleboard revisions
- Fix potential NULL pointer access for omap_hwmod_get_pwrdm()
- Disable RNG on secure am335x variants as it's not accessible
- Fix flakey DCDC2 voltage causing hangs on am43x-epos-evm by reducing
i2c0 bus speed for tps65218
- Fix typo for am437x-l4 can@0 node
- Fix omap5 regression caused by vdds_1v8_main fixed-regulator
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Merge tag 'omap-for-v5.14/fixes-rc5-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes
Fixes for omaps for v5.14-rc series
Some fixes for regressions and boot issues for various devices:
- Fix gpt12 system timer regression on earlier beagleboard revisions
- Fix potential NULL pointer access for omap_hwmod_get_pwrdm()
- Disable RNG on secure am335x variants as it's not accessible
- Fix flakey DCDC2 voltage causing hangs on am43x-epos-evm by reducing
i2c0 bus speed for tps65218
- Fix typo for am437x-l4 can@0 node
- Fix omap5 regression caused by vdds_1v8_main fixed-regulator
* tag 'omap-for-v5.14/fixes-rc5-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
omap5-board-common: remove not physically existing vdds_1v8_main fixed-regulator
ARM: dts: am437x-l4: fix typo in can@0 node
ARM: dts: am43x-epos-evm: Reduce i2c0 bus speed for tps65218
bus: ti-sysc: AM3: RNG is GP only
ARM: omap2+: hwmod: fix potential NULL pointer access
bus: ti-sysc: Fix gpt12 system timer issue with reserved status
Link: https://lore.kernel.org/r/pull-1627995895-406133@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The PRUSSs on AM57xx SoCs contain an MDIO controller that can
be used to control external PHYs associated with the Industrial
Ethernet peripherals within each PRUSS. The MDIO module used
within the PRU-ICSS is an instance of the MDIO Controller used
in TI Davinci SoCs. The same bus frequency of 1 MHz is chosen as
the regular MDIO node.
The nodes are added in the common am57-pruss.dtsi file and enabled
by default, but are disabled in all the existing AM57xx board dts
files. These nodes need pinctrl lines, and so should be enabled
only on boards where they are actually wired and pinned out for
PRUSS Ethernet. Any new board dts file should disable these if
they are not sure.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add the DT nodes for the PRU-ICSS1 and PRU-ICSS2 processor subsystems
that are present on AM57xx family of SoCs. Each PRU-ICSS instance is
represented by a pruss node and other child nodes. The two PRU-ICSSs
are identical to each other. They are not supported on DRA7xx SoCs in
general, so the nodes are added under the respective interconnect target
module nodes in a common am57-pruss.dtsi file. The file is already
included only in the AM57xx related board files.
The PRU-ICSSs on AM57xx are very similar to the PRUSS in AM33xx and AM437x
except for variations in the RAM sizes and the number of interrupts coming
into the MPU INTC. The interrupt events into the PRU-ICSS also requires
programming of the corresponding crossbars properly.
The PRUSS subsystem node contains the entire address space. The various
sub-modules of the PRU-ICSS are represented as individual child nodes
(so platform devices themselves) of the PRUSS subsystem node. These
include the two PRU cores and the interrupt controller. All the Data
RAMs are represented within a child node of its own named 'memories'
without any compatible. The Real Time Media Independent Interface
controller (MII_RT), and the CFG sub-module are represented as syscon
nodes. The PRUSS CFG module has a clock mux for IEP clock, this clk
node is added under the CFG child node 'clocks'. The default source
for this mux clock is the ICSS_IEP_CLK clock.
The DT nodes use all standard properties. The regs property in the PRU
nodes define the addresses for the Instruction RAM, the Debug and Control
sub-modules for that PRU core. The firmware for each PRU core is defined
through a 'firmware-name' property.
The default names for the firmware images for each PRU core are defined
as follows (these can be adjusted either in derivative board dts files or
through sysfs at runtime if required):
PRU-ICSS1 PRU0 Core: am57xx-pru1_0-fw
PRU-ICSS1 PRU1 Core: am57xx-pru1_1-fw
PRU-ICSS2 PRU0 Core: am57xx-pru2_0-fw
PRU-ICSS2 PRU1 Core: am57xx-pru2_1-fw
Note:
1. There are few more sub-modules like the Industrial Ethernet Peripheral
(IEPs), MDIO, UART, eCAP that do not have bindings and so will be added
in the future.
2. The PRUSS INTC on AM57xx SoCs also connect the host interrupts 6 and 7
as possible DMA events, so use the 'ti,irqs-reserved' property in
derivative board dts files _if_ any of them should not be handled by
the host OS.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The PRU-ICSS1 instance on AM437x SoCs has a MDIO sub-module that
can be used to control external PHYs associated with the Industrial
Ethernet peripherals within the PRUSS. The MDIO module used within
this PRU-ICSS is an instance of the MDIO Controller used in TI
Davinci SoCs. The same bus frequency of 1 MHz is chosen as the
regular MDIO node. Note that there is no MDIO node added to the
smaller PRU-ICSS0 instance as the MDIO pins are not pinned out.
The node is added and enabled in the common am4372.dtsi file by
default, and disabled in all the existing AM437x board dts files.
This node needs pinctrl lines, and so should be enabled only on
boards where they are actually wired and pinned out for PRUSS
Ethernet. Any new board dts file should disable these if they
are not sure.
Signed-off-by: Andrew F. Davis <afd@ti.com>
[s-anna@ti.com: fix reg address, add commit description]
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The AM4376+ SoCs have a second smaller PRU-ICSS subsystem (PRUSS0) in
addition to the primary PRUSS1 instance. The PRUSS0 has less DRAM
per PRU, and no Shared DRAM among other minor differences. The IEP
and MII_RT modules even though present within the IP are not pinned
out.
This PRUSS0 instance has a weird SoC integration. It shares the same
L3 OCP interconnect interface with PRUSS1, and also shares its reset
line and clocks. Any external accesses from PRUSS0 requires the PRUSS1's
PRUSS_SYSCFG register to be programmed properly. That said, it is its
own IP instance (a cut-down version), and so it has been added as an
independent node (sibling node to PRUSS1 node) and a child node of the
corresponding PRUSS target module interconnect node. This allows the
PRUSS0 instance to be enabled/disabled independently of the PRUSS1
instance.
The nodes are added under the corresponding interconnect target module
node in the common am4372 dtsi file. The PRU-ICSS instances are not
supported on AM4372 SoC though in the AM437x family, so the interconnect
target module node should be disabled in any derivative board dts file that
uses AM4372 SoCs. The individual PRUSS node can be disabled in the
corresponding board dts file if desired.
The default names for the firmware images for each PRU core are defined
as follows (these can be adjusted either in derivative board dts files or
through sysfs at runtime if required):
PRU-ICSS0 PRU0 Core: am437x-pru0_0-fw
PRU-ICSS0 PRU1 Core: am437x-pru0_1-fw
Note:
1. There are few more sub-modules like the Industrial Ethernet Peripheral
(IEP), eCAP, UART, that do not have bindings and so will be added in the
future. Only UART is pinned out, so others should be added in disabled
state if added.
2. The PRUSS0 INTC on AM437x SoCs routes the host interrupt 5 to the other
PRUSS1, so it is already marked reserved through the 'ti,irqs-reserved'
property.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add the DT node for the PRU-ICSS1 instance on the AM437x family of SoCs.
Each PRU-ICSS instance is represented by a pruss node and other child
nodes. The nodes are added under the interconnect target module node in
the common am4372 dtsi file. The PRU-ICSS instances are supported only
on AM4376+ SoCs though in the AM437x family, so the interconnect target
module node should be disabled in any derivative board dts file that
uses AM4372 SoCs.
The PRU-ICSS1 on AM437x is very similar to the PRUSS in AM33xx, except
for variations in the RAM sizes, bus addresses and the number of
interrupts coming into the MPU INTC (host interrupt 5 is routed to
the other PRUSS instead of MPU).
The PRUSS subsystem node contains the entire address space. The various
sub-modules of the PRU-ICSS are represented as individual child nodes
(so platform devices themselves) of the PRUSS subsystem node. These
include the two PRU cores and the interrupt controller. All the Data
RAMs are represented within a child node of its own named 'memories'
without any compatible. The Real Time Media Independent Interface
controller (MII_RT), and the CFG sub-module are represented as syscon
nodes. The PRUSS CFG module has a clock mux for IEP clock, this clk
node is added under the CFG child node 'clocks'. The default source
for this mux clock is the PRU_ICSS_IEP_GCLK clock.
The DT nodes use all standard properties. The regs property in the PRU
nodes define the addresses for the Instruction RAM, the Debug and Control
sub-modules for that PRU core. The firmware for each PRU core is defined
through a 'firmware-name' property.
The default names for the firmware images for each PRU core are defined
as follows (these can be adjusted either in derivative board dts files
or through sysfs at runtime if required):
PRU-ICSS1 PRU0 Core: am437x-pru1_0-fw
PRU-ICSS1 PRU1 Core: am437x-pru1_1-fw
Note:
1. There are few more sub-modules like the Industrial Ethernet Peripheral
(IEP), MDIO, UART, eCAP that do not have bindings and so will be added
in the future.
2. The PRUSS INTC on AM437x SoCs also connect the host interrupt 0 to ADC0
and ADC1; 6 and 7 as possible DMA events, so use the 'ti,irqs-reserved'
property in derivative board dts files _if_ any of them should not be
handled by the host OS. Host interrupt 5 is already marked reserved as
it is connected to the other PRUSS instance.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The PRU-ICSS target module node was left in disabled state in the
base am33xx-l4.dtsi file. PRU-ICSS is supported on the AM335x ICEv2
board, so enable this node to support PRUSS on this board. The PRUSS
node and most of its child nodes are already enabled in the base dts
file, and so become effective automatically with the enabling of
this PRU-ICSS target module node.
The corresponding PRU nodes can be disabled later on if there are
no use-cases defined to use a particular PRU core or the whole
PRU-ICSS subsystem itself if both its PRU cores are unused.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The PRU-ICSS target module node was left in disabled state in the
base am33xx-l4.dtsi file. PRU-ICSS is supported on the AM335x SK
EVM board, so enable this node to support PRUSS on this board. The
PRUSS node and most of its child nodes are already enabled in the
base dts file, and so become effective automatically with the
enabling of this PRU-ICSS target module node.
The corresponding PRU nodes can be disabled later on if there are
no use-cases defined to use a particular PRU core or the whole
PRU-ICSS subsystem itself if both its PRU cores are unused.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The PRU-ICSS target module node was left in disabled state in the
base am33xx-l4.dtsi file. PRU-ICSS is supported on the AM335x EVM,
so enable this node on the AM335x EVM. The PRUSS node and most of
its child nodes are already enabled in the base dts file, and so
become effective automatically with the enabling of this PRU-ICSS
target module node.
The corresponding PRU nodes can be disabled later on if there are
no use-cases defined to use a particular PRU core or the whole
PRU-ICSS subsystem itself if both its PRU cores are unused.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The PRU-ICSS target module node was left in disabled state in the base
am33xx-l4.dtsi file. Enable this node on all the AM335x beaglebone
boards as they mostly use a AM3358 or a AM3359 SoC which do contain
the PRU-ICSS IP. The PRUSS node and most of its child nodes are already
enabled in the base dts file, and so become effective automatically
with the enabling of this PRU-ICSS target-module node.
The corresponding PRU nodes can be disabled later on if there are
no use-cases defined to use a particular PRU core or the whole
PRU-ICSS subsystem itself if both its PRU cores are unused.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The PRUSS on AM335x SoCs has a MDIO sub-module that can be used
to control external PHYs associated with the Industrial Ethernet
peripherals within the PRUSS. The MDIO module used within the
PRU-ICSS is an instance of the MDIO Controller used in TI Davinci
SoCs. The same bus frequency of 1 MHz is chosen as the regular
MDIO node.
The node is added to the common am33xx-l4.dtsi file and is disabled.
This needs to be enabled in the respective board files using the
relevant AM335x SoCs supporting PRUSS and where the ethernet is
pinned out and connected properly.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add the DT nodes for the PRU-ICSS on AM33xx family of SoCs. The AM33xx
SoCs contain a single PRU-ICSS instance and is represented by a pruss
node and other child nodes. PRU-ICSS is supported only on AM3356+ SoCs
though in the AM33xx family, so the nodes are added under the
corresponding disabled interconnect target module node in the common
am33xx-l4 dtsi file. The target module node should be enabled in only
those derivative board files that use a SoC containing PRU-ICSS.
The PRUSS subsystem node contains the entire address space. The various
sub-modules of the PRU-ICSS are represented as individual child nodes
(so platform devices themselves) of the PRUSS subsystem node. These
include the two PRU cores and the interrupt controller. All the Data
RAMs are represented within a child node of its own named 'memories'
without any compatible. The Real Time Media Independent Interface
controller (MII_RT), and the CFG sub-module are represented as syscon
nodes. The PRUSS CFG module has a clock mux for IEP clock, this clk
node is added under the CFG child node 'clocks'. The default source
for this mux clock is the PRU_ICSS_IEP_GCLK clock.
The DT nodes use all standard properties. The regs property in the PRU
nodes define the addresses for the Instruction RAM, the Debug and Control
sub-modules for that PRU core. The firmware for each PRU core is defined
through a 'firmware-name' property.
The default names for the firmware images for each PRU core are defined
as follows (these can be adjusted either in derivative board dts files
or through sysfs at runtime if required):
PRU-ICSS PRU0 Core: am335x-pru1_0-fw
PRU-ICSS PRU1 Core: am335x-pru1_1-fw
Note:
1. There are few more sub-modules like the Industrial Ethernet Peripheral
(IEP), MDIO, UART, eCAP that do not have bindings and so will be added
in the future.
2. The PRUSS INTC on AM335x SoCs also connect the host interrupts 0 to
TSC_ADC; 6 and 7 as possible DMA events, so use the 'ti,irqs-reserved'
property in derivative board dts files _if_ any of them should not be
handled by the host OS.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Remove ngpios property from sgpio node as it should be defined in the
platform dts.
Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20210712100317.23298-5-steven_lee@aspeedtech.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
- Switches support for the Draak and Ebisu development boards,
- I2C support on RZ/G2L,
- I2C EEPROM support on the Ebisu development board,
- Sound support for the R-Car D3 SoC and the Draak development board,
- Support for the new R-Car H3e-2G and M3e-2G SoCs on the Salvator-XS
and ULCB development boards,
- IOMMU support for DMAC, EtherAVB, and SDHI on the R-Car M3-W+ SoC,
- Miscellaneous fixes and improvements.
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Merge tag 'renesas-arm-dt-for-v5.15-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.15
- Switches support for the Draak and Ebisu development boards,
- I2C support on RZ/G2L,
- I2C EEPROM support on the Ebisu development board,
- Sound support for the R-Car D3 SoC and the Draak development board,
- Support for the new R-Car H3e-2G and M3e-2G SoCs on the Salvator-XS
and ULCB development boards,
- IOMMU support for DMAC, EtherAVB, and SDHI on the R-Car M3-W+ SoC,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.15-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (29 commits)
arm64: dts: renesas: r8a77961: Add iommus to ipmmu_ds[01] related nodes
arm64: dts: renesas: Add support for M3ULCB+Kingfisher with R-Car M3e-2G
arm64: dts: renesas: Add support for M3ULCB with R-Car M3e-2G
arm64: dts: renesas: Add support for Salvator-XS with R-Car M3e-2G
arm64: dts: renesas: Add support for H3ULCB+Kingfisher with R-Car H3e-2G
arm64: dts: renesas: Add support for H3ULCB with R-Car H3e-2G
arm64: dts: renesas: Add support for Salvator-XS with R-Car H3e-2G
arm64: dts: renesas: Add Renesas R8A779M3 SoC support
arm64: dts: renesas: Add Renesas R8A779M1 SoC support
arm64: dts: renesas: hihope-rzg2-ex: Add EtherAVB internal rx delay
arm64: dts: renesas: r8a77995: draak: Add R-Car Sound support
arm64: dts: renesas: r8a77995: Add R-Car Sound support
arm64: dts: renesas: rcar-gen3: Add SoC model to comment headers
arm64: dts: renesas: r8a77990: ebisu: Add I2C EEPROM for PMIC
arm64: dts: renesas: r8a77995: draak: Remove bogus adv7511w properties
arm64: dts: renesas: beacon: Enable micbias
arm64: dts: renesas: r9a07g044: Add I2C nodes
arm64: dts: renesas: r8a779a0: Restore sort order
arm64: dts: renesas: r8a77990: ebisu: Add SW4 support
arm64: dts: renesas: r8a77995: draak: Add SW56 support
...
Link: https://lore.kernel.org/r/cover.1627650696.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- A couple of fixes on MMDC driver to add missing iounmap() and
clk_disable_unprepare(), and a follow-up fix.
- Fix missing-prototypes warning in SRC driver.
- Revert commit 7d981405d0 ("soc: imx8m: change to use platform
driver"), which breaks i.MX8M system that has CAAM driver enabled.
- One fix on imx53-m53menlo pinctrl configuration.
- Increase the PHY reset duration for imx6qdl-sr-som to fix intermittent
issues where the PHY would be unresponsive every once in a while.
- Add missing flag for in-band signalling between PHY and MAC on
kontron-sl28-var2 board to fix network support.
- Limit the SDIO Clock on Colibri iMX6ULL to 25MHz for fixing wireless
noise issue.
- Fix sysclk node name for LS1028A so that U-Boot is able to update the
"clock-frequency" property.
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Merge tag 'imx-fixes-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.14:
- A couple of fixes on MMDC driver to add missing iounmap() and
clk_disable_unprepare(), and a follow-up fix.
- Fix missing-prototypes warning in SRC driver.
- Revert commit 7d981405d0 ("soc: imx8m: change to use platform
driver"), which breaks i.MX8M system that has CAAM driver enabled.
- One fix on imx53-m53menlo pinctrl configuration.
- Increase the PHY reset duration for imx6qdl-sr-som to fix intermittent
issues where the PHY would be unresponsive every once in a while.
- Add missing flag for in-band signalling between PHY and MAC on
kontron-sl28-var2 board to fix network support.
- Limit the SDIO Clock on Colibri iMX6ULL to 25MHz for fixing wireless
noise issue.
- Fix sysclk node name for LS1028A so that U-Boot is able to update the
"clock-frequency" property.
* tag 'imx-fixes-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx: Swap M53Menlo pinctrl_power_button/pinctrl_power_out pins
ARM: imx: fix missing 3rd argument in macro imx_mmdc_perf_init
ARM: dts: colibri-imx6ull: limit SDIO clock to 25MHz
arm64: dts: ls1028: sl28: fix networking for variant 2
Revert "soc: imx8m: change to use platform driver"
ARM: dts: imx6qdl-sr-som: Increase the PHY reset duration to 10ms
ARM: imx: common: Move prototype outside the SMP block
ARM: imx: add missing clk_disable_unprepare()
ARM: imx: add missing iounmap()
arm64: dts: ls1028a: fix node name for the sysclk
Link: https://lore.kernel.org/r/20210726023221.GF5901@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
