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Author SHA1 Message Date
Linus Torvalds
4eb766f64d Devicetree updates for v5.17: 
Bindings:
 - DT schema conversions for Samsung clocks, RNG bindings, Qcom Command
   DB and rmtfs, gpio-restart, i2c-mux-gpio, i2c-mux-pinctl, Tegra I2C
   and BPMP, pwm-vibrator, Arm DSU, and Cadence macb
 
 - DT schema conversions for Broadcom platforms: interrupt controllers,
   STB GPIO, STB waketimer, STB reset, iProc MDIO mux, iProc PCIe,
   Cygnus PCIe PHY, PWM, USB BDC, BCM6328 LEDs, TMON, SYSTEMPORT, AMAC,
   Northstar 2 PCIe PHY, GENET, moca PHY, GISB arbiter, and SATA
 
 - Add binding schemas for Tegra210 EMC table, TI DC-DC converters,
 
 - Clean-ups of MDIO bus schemas to fix 'unevaluatedProperties' issues
 
 - More fixes due to 'unevaluatedProperties' enabling
 
 - Data type fixes and clean-ups of binding examples found in preparation
   to move to validating DTB files directly (instead of intermediate YAML
   representation.
 
 - Vendor prefixes for T-Head Semiconductor, OnePlus, and Sunplus
 
 - Add various new compatible strings
 
 DT core:
 - Silence a warning for overlapping reserved memory regions
 
 - Reimplement unittest overlay tracking
 
 - Fix stack frame size warning in unittest
 
 - Clean-ups of early FDT scanning functions
 
 - Fix handling of "linux,usable-memory-range" on EFI booted systems
 
 - Add support for 'fail' status on CPU nodes
 
 - Improve error message in of_phandle_iterator_next()
 
 - kbuild: Disable duplicate unit-address warnings for disabled nodes
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmHfCdcQHHJvYmhAa2Vy
 bmVsLm9yZwAKCRD6+121jbxhw+UZD/0ZMQQ6VF20MW7Gg0bOutd8Q6Q6opjrCG5c
 nLW5mv8Q+um3sI1ZpwdMI4zAfCmTfeL13ZM9KtJKlJ0o41bgId+kZsezy4I2rN9+
 sE1CwA4TninKTJsUkmyQX4fgJRUZ95Eubryfb07sy7nbK3LZQ+t18R5tzVBDpzy4
 7hy4eM6mlMxgIJDi7EUboLZslkMM4TGGutLsk5C5T5V5lcWSt3Jj5WZtl5k4Wykq
 j4i9mU+GGTZi0nGAJQ7lNoLPatZDSVQx5tzNV/Wi8hSwZbn0Kycu+IuWZyihILz/
 9lzB/7tv8fl+xkTaJ5xxaY05HcDeX02yCLzh3PfAHRYdbQ2EkFoaKqJ81SLfAq5t
 aH87v41wFSrjzynxpppqswXOdqI/jofrHrGlQldnw0VHGTjEfDbyZGRQFPHmuzTG
 gXaSNKCxppG7ThpXarfu7D4TdYV75n+cBOsC/BBopYgIS2+xmjDA3t5Scks1/4NX
 1Hfq9IMF9iYJYc/GNXBWcOrLn9d1ILYt6HrKRQar1NIEFH1Lt0c2aw5WsyvOZ4zx
 aLHLSbEwnl+2wleyGB9YQkFaaF7N6qcid3u9KFRJP6nTojoaeQaIi3MR9F3LVReZ
 LV5YfWEcij1zc+lzwgHc6+8bbgFxrKgOC2IL/B6u93u/BO0wmF/54kbEZKaLyX8d
 a7Iii4IYFw==
 =2g8v
 -----END PGP SIGNATURE-----

Merge tag 'devicetree-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree updates from Rob Herring:
 "Bindings:

   - DT schema conversions for Samsung clocks, RNG bindings, Qcom
     Command DB and rmtfs, gpio-restart, i2c-mux-gpio, i2c-mux-pinctl,
     Tegra I2C and BPMP, pwm-vibrator, Arm DSU, and Cadence macb

   - DT schema conversions for Broadcom platforms: interrupt
     controllers, STB GPIO, STB waketimer, STB reset, iProc MDIO mux,
     iProc PCIe, Cygnus PCIe PHY, PWM, USB BDC, BCM6328 LEDs, TMON,
     SYSTEMPORT, AMAC, Northstar 2 PCIe PHY, GENET, moca PHY, GISB
     arbiter, and SATA

   - Add binding schemas for Tegra210 EMC table, TI DC-DC converters,

   - Clean-ups of MDIO bus schemas to fix 'unevaluatedProperties' issues

   - More fixes due to 'unevaluatedProperties' enabling

   - Data type fixes and clean-ups of binding examples found in
     preparation to move to validating DTB files directly (instead of
     intermediate YAML representation.

   - Vendor prefixes for T-Head Semiconductor, OnePlus, and Sunplus

   - Add various new compatible strings

  DT core:

   - Silence a warning for overlapping reserved memory regions

   - Reimplement unittest overlay tracking

   - Fix stack frame size warning in unittest

   - Clean-ups of early FDT scanning functions

   - Fix handling of "linux,usable-memory-range" on EFI booted systems

   - Add support for 'fail' status on CPU nodes

   - Improve error message in of_phandle_iterator_next()

   - kbuild: Disable duplicate unit-address warnings for disabled nodes"

* tag 'devicetree-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (114 commits)
  dt-bindings: net: mdio: Drop resets/reset-names child properties
  dt-bindings: clock: samsung: convert S5Pv210 to dtschema
  dt-bindings: clock: samsung: convert Exynos5410 to dtschema
  dt-bindings: clock: samsung: convert Exynos5260 to dtschema
  dt-bindings: clock: samsung: extend Exynos7 bindings with UFS
  dt-bindings: clock: samsung: convert Exynos7 to dtschema
  dt-bindings: clock: samsung: convert Exynos5433 to dtschema
  dt-bindings: i2c: maxim,max96712: Add bindings for Maxim Integrated MAX96712
  dt-bindings: iio: adi,ltc2983: Fix 64-bit property sizes
  dt-bindings: power: maxim,max17040: Fix incorrect type for 'maxim,rcomp'
  dt-bindings: interrupt-controller: arm,gic-v3: Fix 'interrupts' cell size in example
  dt-bindings: iio/magnetometer: yamaha,yas530: Fix invalid 'interrupts' in example
  dt-bindings: clock: imx5: Drop clock consumer node from example
  dt-bindings: Drop required 'interrupt-parent'
  dt-bindings: net: ti,dp83869: Drop value on boolean 'ti,max-output-impedance'
  dt-bindings: net: wireless: mt76: Fix 8-bit property sizes
  dt-bindings: PCI: snps,dw-pcie-ep: Drop conflicting 'max-functions' schema
  dt-bindings: i2c: st,stm32-i2c: Make each example a separate entry
  dt-bindings: net: stm32-dwmac: Make each example a separate entry
  dt-bindings: net: Cleanup MDIO node schemas
  ...
 2022-01-12 16:47:05 -08:00
Linus Torvalds
c01d85c219 MTD core changes: 
* mtdchar: Prevent unbounded allocation in MEMWRITE ioctl
 * gen_probe: Use bitmap_zalloc() when applicable
 * Introduce an expert mode for forensics and debugging purposes
 * Clear out unregistered devices a bit more
 * Provide unique name for nvmem device
 * Remove unused header file <linux/mtd/latch-addr-flash.h>
 * Fixed breaking list in __mtd_del_partition.
 
 MTD device changes:
 * sst25l, mchp48l640, mchp23k256, dataflash:
   - Warn about failure to unregister mtd device
 
 Raw NAND core changes:
 * Export nand_read_page_hwecc_oob_first()
 
 GPMC memory controller for OMAP2 NAND controller changes:
 * GPMC:
   - Add support for AM64 SoC and allow build on K3 platforms
   - Use a compatible match table when checking for NAND controller
   - Use platform_get_irq() to get the interrupt
 
 Raw NAND controller changes:
 * OMAP2 NAND controller:
   - Document the missing 'rb-gpios' DT property
   - Drop unused variable
   - Fix force_8bit flag behaviour for DMA mode
   - Move to exec_op interface
   - Use platform_get_irq() to get the interrupt
 * Renesas:
   - Add new NAND controller driver with its bindings and MAINTAINERS entry
 * Onenand:
   - Remove redundant variable ooblen
 * MPC5121:
   - Remove unused variable in ads5121_select_chip()
 * GPMI:
   - Add ERR007117 protection for nfc_apply_timings
   - Remove explicit default gpmi clock setting for i.MX6
   - Use platform_get_irq_byname() to get the interrupt
   - Remove unneeded variable
 * Ingenic:
   - JZ4740 needs 'oob_first' read page function
 * Davinci:
   - Rewrite function description
   - Avoid duplicated page read
   - Don't calculate ECC when reading page
 
 SPI NOR core changes:
 * Add Pratyush as SPI NOR co-maintainer.
 * Flash parameters initialization was done in a spaghetti way. Clean
   flash parameters initialization.
 * Rework the flash_info flags and clarify where one should be used.
 * Initialize all flash parameters based on JESD216 SFDP where possible.
   Flash parameters and settings that are SFDP discoverable should not be
   duplicated via flash_info flags at flash declaration.
 * Remove debugfs entries that duplicate sysfs entries.
 
 SPI NOR manufacturer driver changes:
 * Use late_init() hook in various drivers to make it clear that those
   flash parameters are either not declared in the JESD216 SFDP standard,
   or the SFDP tables which define those flash parameters are not defined
   by the flash.
 * Fix mtd size for s3an flashes.
 * Write 2 bytes when disabling Octal DTR mode: 1 byte long transactions are
   not allowed in 8D-8D-8D mode.
 
 Hyperbus changes:
 * Couple of fixes in Renesas hyperbus rpc-if driver to avoid crash on
   module remove and for missing check for error value in probe.
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEE9HuaYnbmDhq/XIDIJWrqGEe9VoQFAmHO+g8ACgkQJWrqGEe9
 VoRW1AgAjFC58ARNBw7asYerGyiUWv7b8RjPIRWZqmcSQ6D5m20cGNBTa15c2NrC
 v0dNMf2+3FrCECso6wKPbkEbLt9lHjlMmt+AdlraV0QvHBXrJq/Tc2p2ATI5kTqq
 WaP4oCx1mccgO+IrEIiGikOcFx/TLBBJEk+U0Anbm16eia9Cjw+uD/q7X2HbF5xQ
 MOFZyQ+rAVqkM8tCh6VHhCpX85pn9pj2ZdouOhPWsqjULaGqDbUopC70YPZLVJyx
 9u4xHFaVLVae6AS5Gitser2ie8klypTN/H+1weSao43GGmwIrT0wK0mCOVIm90Zd
 4frlpnt4QE/IIAKgAm+HxkWg+KV9qg==
 =E8lV
 -----END PGP SIGNATURE-----

Merge tag 'mtd/for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux

Pull MTD updates from Miquel Raynal:
 "MTD core changes:

   - mtdchar: Prevent unbounded allocation in MEMWRITE ioctl

   - gen_probe: Use bitmap_zalloc() when applicable

   - Introduce an expert mode for forensics and debugging purposes

   - Clear out unregistered devices a bit more

   - Provide unique name for nvmem device

   - Remove unused header file <linux/mtd/latch-addr-flash.h>

   - Fixed breaking list in __mtd_del_partition.

  MTD device changes:

   - Warn about failure to unregister mtd device in sst25l, mchp48l640,
     mchp23k256, and dataflash drivers.

  Raw NAND core changes:

   - Export nand_read_page_hwecc_oob_first()

  GPMC memory controller for OMAP2 NAND controller changes:

   - Add support for AM64 SoC and allow build on K3 platforms

   - Use a compatible match table when checking for NAND controller

   - Use platform_get_irq() to get the interrupt

  Raw NAND controller changes:

   - OMAP2 NAND controller:
      - Document the missing 'rb-gpios' DT property
      - Drop unused variable
      - Fix force_8bit flag behaviour for DMA mode
      - Move to exec_op interface
      - Use platform_get_irq() to get the interrupt

   - Renesas:
      - Add new NAND controller driver with its bindings and MAINTAINERS entry

   - Onenand:
      - Remove redundant variable ooblen

   - MPC5121:
      - Remove unused variable in ads5121_select_chip()

   - GPMI:
      - Add ERR007117 protection for nfc_apply_timings
      - Remove explicit default gpmi clock setting for i.MX6
      - Use platform_get_irq_byname() to get the interrupt
      - Remove unneeded variable

   - Ingenic:
      - JZ4740 needs 'oob_first' read page function

   - Davinci:
      - Rewrite function description
      - Avoid duplicated page read
      - Don't calculate ECC when reading page

  SPI NOR core changes:

   - Add Pratyush as SPI NOR co-maintainer.

   - Flash parameters initialization was done in a spaghetti way. Clean
     flash parameters initialization.

   - Rework the flash_info flags and clarify where one should be used.

   - Initialize all flash parameters based on JESD216 SFDP where
     possible. Flash parameters and settings that are SFDP discoverable
     should not be duplicated via flash_info flags at flash declaration.

   - Remove debugfs entries that duplicate sysfs entries.

  SPI NOR manufacturer driver changes:

   - Use late_init() hook in various drivers to make it clear that those
     flash parameters are either not declared in the JESD216 SFDP
     standard, or the SFDP tables which define those flash parameters
     are not defined by the flash.

   - Fix mtd size for s3an flashes.

   - Write 2 bytes when disabling Octal DTR mode: 1 byte long
     transactions are not allowed in 8D-8D-8D mode.

  Hyperbus changes:

   - Couple of fixes in Renesas hyperbus rpc-if driver to avoid crash on
     module remove and for missing check for error value in probe"

* tag 'mtd/for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (71 commits)
  mtd: spi-nor: Remove debugfs entries that duplicate sysfs entries
  mtd: spi-nor: micron-st: write 2 bytes when disabling Octal DTR mode
  mtd: spi-nor: spansion: write 2 bytes when disabling Octal DTR mode
  mtd: spi-nor: core: use 2 data bytes for template ops
  mtd: spi-nor: Constify part specific fixup hooks
  mtd: spi-nor: core: Remove reference to spi-nor.c
  mtd: rawnand: gpmi: Use platform_get_irq_byname() to get the interrupt
  mtd: rawnand: omap_elm: Use platform_get_irq() to get the interrupt
  mtd: rawnand: omap2: Select GPMC device driver for ARCH_K3
  memory: omap-gpmc: Use a compatible match table when checking for NAND controller
  memory: omap-gpmc: Add support for GPMC on AM64 SoC
  dt-bindings: memory-controllers: ti,gpmc: Add compatible for AM64
  memory: omap-gpmc: Use platform_get_irq() to get the interrupt
  MAINTAINERS: Add an entry for Renesas NAND controller
  mtd: rawnand: renesas: Add new NAND controller driver
  dt-bindings: mtd: renesas: Describe Renesas R-Car Gen3 & RZ/N1 NAND controller
  mtd: rawnand: gpmi: remove unneeded variable
  mtd: rawnand: omap2: drop unused variable
  mtd: rawnand: omap2: fix force_8bit flag behaviour for DMA mode
  mtd: rawnand: omap2: Add compatible for AM64 SoC
  ...
 2022-01-11 11:35:28 -08:00
Linus Torvalds
ff8be96420 - Add support for version 3 of the Synopsys DDR controller to synopsys_edac 
- Add support for DRR5 and new models 0x10-0x1f and 0x50-0x5f of AMD
   family 0x19 CPUs to amd64_edac
 
 - The usual set of fixes and cleanups
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEzv7L6UO9uDPlPSfHEsHwGGHeVUoFAmHb/PwACgkQEsHwGGHe
 VUqhbhAAo0mRNnBF3CJn1zlXRgmqrvV1IPnJQNp+z5iaXY1vr0qRMgO4OcgsJrxF
 nxrx/fdAYlQQO4vz1iq4t4j+eazOQyM/JZ0DKi4e+Dw2mC0axdCx8a0pyl1g2de6
 oQ5GkplRKUFn+3bTJpHIE5QnCOD7S85Mrp1F3Soa6jD9i+HwQIqAoltNMcCP7Yei
 ibhWUBX2H/oYcHARecIkP/YEyzSEHhcX6LRjNILW5haZQ6GziQUFzKUUwpUS3hsz
 9i6hXnHXEPhOq8JyoyWWhvVDywFK9z8lh57G7DFfZIhAk1FjuLDP2iI270D/LkYF
 shq6+M8ST9yqwOMV3Iaoa8VZFf/fjTyV0E0L2p2+faxaJ66rqdzbagLIZQv6hDNe
 N1/LD72/Io4et1kEbbaHm5jpxzSJ0jQwu1o+rY1/NmKsWhzE6V4X0GnDTZzZwP9b
 CbFJAWdCD+fi3WQjzv8HLVepjIsV+R3VVTOLq2oodn/mtoK0DRU/vTeCCwRS9ntF
 IyF55L/jSqy9CtP119KBnItGo4b84UrJDozXizGtc6Zt3chz7ljSpa2gJrKF+fCR
 Yhyr9Pt+vYQBpnIMDu1BPcoE58pwZYKoOSO00COUHHsLn+u8qhetGmQzYwWHCq7J
 hz8HHZnlTdFseZTp5tavk3B4md5HiPu+A7GevK3YH3lBv/vEmDM=
 =85ZE
 -----END PGP SIGNATURE-----

Merge tag 'edac_updates_for_v5.17_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras

Pull EDAC updates from Borislav Petkov:

 - Add support for version 3 of the Synopsys DDR controller to
   synopsys_edac

 - Add support for DRR5 and new models 0x10-0x1f and 0x50-0x5f of AMD
   family 0x19 CPUs to amd64_edac

 - The usual set of fixes and cleanups

* tag 'edac_updates_for_v5.17_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras:
  EDAC/amd64: Add support for family 19h, models 50h-5fh
  EDAC/sb_edac: Remove redundant initialization of variable rc
  RAS/CEC: Remove a repeated 'an' in a comment
  EDAC/amd64: Add support for AMD Family 19h Models 10h-1Fh and A0h-AFh
  EDAC: Add RDDR5 and LRDDR5 memory types
  EDAC/sifive: Fix non-kernel-doc comment
  dt-bindings: memory: Add entry for version 3.80a
  EDAC/synopsys: Enable the driver on Intel's N5X platform
  EDAC/synopsys: Add support for version 3 of the Synopsys EDAC DDR
  EDAC/synopsys: Use the quirk for version instead of ddr version
 2022-01-10 11:45:23 -08:00
Linus Torvalds
aca48b2dd1 ARM: SoC devicetree changes for v5.17 
As usual, this is the bulk of the updates for the SoC tree, adding
 more devices to existing files, addressing issues from ever improving
 automated checking, and fixing minor issues.
 
 The most interesting bits as usual are the new platforms.
 All the newly supported SoCs belong into existing families
 this time:
 
  - Qualcomm gets support for two newly announced platforms, both
    of which can now work in production environments: the SDX65
    5G modem that can run a minimal Linux on its Cortex-A7 core,
    and the Snapdragon 8 Gen 1, their latest high-end phone SoC.
 
  - Renesas adds support for R-Car S4-8, the most recent automotive
    Server/Communication SoC.
 
  - TI adds support for J721s2, a new automotive SoC in the K3
    family.
 
  - Mediatek MT7986a/b is a SoC used in Wifi routers, the latest
    generation following their popular MT76xx series. Only basic
    support is added for now.
 
  - NXP i.MX8 ULP8 is a new low-power variant of the widespread
    i.MX8 series.
 
  - TI SPEAr320s is a minor variant of the old SPEAr320 SoC that
    we have supported for a long time.
 
 New boards with the existing SoCs include
 
  - Aspeed AST2500/AST2600 BMCs in TYAN, Facebook and Yadro servers
 
  - AT91/SAMA5 based evaluation board
 
  - NXP gains twenty new development and industrial boards for their
    i.MX and Layerscape SoCs
 
  - Intel IXP4xx now supports the final two machines in device tree
    that were previously only supported in old style board files.
 
  - Mediatek MT6589 is used in the Fairphone FP1 phone from 2013,
    while MT8183 is used in the Acer Chromebook 314.
 
  - Qualcomm gains support for the reference machines using the two
    new SoCs, plus a number of Chromebook variants and phones based
    on the Snapdragon 7c, 845 and 888 SoCs, including various
    Sony Xperia devices and the Microsoft Surface Duo 2.
 
  - ST STM32 now supports the Engicam i.Core STM32MP1 carrier board.
 
  - Tegra now boots various older Android devices based on 32-bit
    chips out of the box, including a number of ASUS Transformer
    tablets.
    There is also a new Jetson AGX Orin developer kit.
 
  - Apple support adds the missing device trees for all the remaining
    M1 Macbook and iMac variants, though not yet the M1 Pro/Max
    versions.
 
  - Allwinner now supports another version of the Tanix TX6 set-top
    box based on the H6 SoC.
 
  - Broadcom gains support for the Netgear RAXE500 Wireless router
    based on BCM4908.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHDsm4ACgkQmmx57+YA
 GNm9YhAAm0c/uPAkDA/6ESjaMC5qIHnV8CC9ZV24iINqFutcjKm2az8OiqKZT7UW
 a/+n2sfjAiyoAAaXrp/WvyMH2Sula1i/OZpR4GYIbD/lbYRFk+4+iW2YY9vViCjL
 KH6M/H6KfOSNmGcpe3wDvu7D4YWfFKDCDyUJsEaMW2xSQehYbH5P0OuzQW1EROHr
 GQp60QtCbUpMmqIrkJT99MxBGCCyb4dV6BT3iU489/YU3q3pOF8OWMLKv5TlXzfw
 x0pLH5CKavvCFj3iqp80sCEBeSoUecLKVnBRfmwAH1vgfNrhpXh4jP9m1e3Vh3Bb
 aJGZ57W77Akf+TywZEojDdIDQGKcdlzpZNxN2i4e4+LECYvfOdJW8GP18MmsXEY4
 apb0NeKad8FGRI4b97dIVEcTa894JkEZaEtnNaIdjWFhBgzO+Kr2iOTw71AKsJmc
 eIwv4SDdUQTU4VT08ceJTOVt8NikGALJStg5knpVJ9lfHvFlWj1GAE4QnCtS6pUR
 iiyqJ1/7khNplcgowaz6nuC2gSE49UwYQImLvBfG17eT1YU3B2OZg/FZ9xSmr2bW
 Thk+TKO9A6xai8QQWYV99Ae+Y6nDWUrLL5U9DXTn4cm64g5z3VkVKGcNajg/kAad
 hyQmSIhcypp2KN//c+d3VU/KY1EUYJDzg1EEwRuxP7Gih5/7pb8=
 =IF3G
 -----END PGP SIGNATURE-----

Merge tag 'dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC devicetree updates from Arnd Bergmann:
 "As usual, this is the bulk of the updates for the SoC tree, adding
  more devices to existing files, addressing issues from ever improving
  automated checking, and fixing minor issues.

  The most interesting bits as usual are the new platforms. All the
  newly supported SoCs belong into existing families this time:

   - Qualcomm gets support for two newly announced platforms, both of
     which can now work in production environments: the SDX65 5G modem
     that can run a minimal Linux on its Cortex-A7 core, and the
     Snapdragon 8 Gen 1, their latest high-end phone SoC.

   - Renesas adds support for R-Car S4-8, the most recent automotive
     Server/Communication SoC.

   - TI adds support for J721s2, a new automotive SoC in the K3 family.

   - Mediatek MT7986a/b is a SoC used in Wifi routers, the latest
     generation following their popular MT76xx series. Only basic
     support is added for now.

   - NXP i.MX8 ULP8 is a new low-power variant of the widespread i.MX8
     series.

   - TI SPEAr320s is a minor variant of the old SPEAr320 SoC that we
     have supported for a long time.

  New boards with the existing SoCs include

   - Aspeed AST2500/AST2600 BMCs in TYAN, Facebook and Yadro servers

   - AT91/SAMA5 based evaluation board

   - NXP gains twenty new development and industrial boards for their
     i.MX and Layerscape SoCs

   - Intel IXP4xx now supports the final two machines in device tree
     that were previously only supported in old style board files.

   - Mediatek MT6589 is used in the Fairphone FP1 phone from 2013, while
     MT8183 is used in the Acer Chromebook 314.

   - Qualcomm gains support for the reference machines using the two new
     SoCs, plus a number of Chromebook variants and phones based on the
     Snapdragon 7c, 845 and 888 SoCs, including various Sony Xperia
     devices and the Microsoft Surface Duo 2.

   - ST STM32 now supports the Engicam i.Core STM32MP1 carrier board.

   - Tegra now boots various older Android devices based on 32-bit chips
     out of the box, including a number of ASUS Transformer tablets.

     There is also a new Jetson AGX Orin developer kit.

   - Apple support adds the missing device trees for all the remaining
     M1 Macbook and iMac variants, though not yet the M1 Pro/Max
     versions.

   - Allwinner now supports another version of the Tanix TX6 set-top box
     based on the H6 SoC.

   - Broadcom gains support for the Netgear RAXE500 Wireless router
     based on BCM4908"

* tag 'dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (574 commits)
  Revert "ARM: dts: BCM5301X: define RTL8365MB switch on Asus RT-AC88U"
  arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCX
  arm64: dts: qcom: sm8450-qrd: Enable USB nodes
  arm64: dts: qcom: sm8450: Add usb nodes
  ARM: dts: aspeed: add LCLK setting into LPC KCS nodes
  dt-bindings: ipmi: bt-bmc: add 'clocks' as a required property
  ARM: dts: aspeed: add LCLK setting into LPC IBT node
  ARM: dts: aspeed: p10: Add TPM device
  ARM: dts: aspeed: p10: Enable USB host ports
  ARM: dts: aspeed: Add TYAN S8036 BMC machine
  ARM: dts: aspeed: tyan-s7106: Add uart_routing and fix vuart config
  ARM: dts: aspeed: Adding Facebook Bletchley BMC
  ARM: dts: aspeed: g220a: Enable secondary flash
  ARM: dts: Add openbmc-flash-layout-64-alt.dtsi
  ARM: dts: aspeed: Add secure boot controller node
  dt-bindings: aspeed: Add Secure Boot Controller bindings
  ARM: dts: Remove "spidev" nodes
  dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850
  dt-bindings: arm: samsung: Document E850-96 board binding
  dt-bindings: Add vendor prefix for WinLink
  ...
 2022-01-10 08:24:40 -08:00
Roger Quadros
4892242784 dt-bindings: memory-controllers: ti,gpmc: Add compatible for AM64 
AM64 SoC contains the GPMC module. Add compatible for it.

Newer SoCs don't necessarily map GPMC data region at the same place
as legacy SoCs. Add reg-names "data", to provide this information to
the device driver.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211221131757.2030-2-rogerq@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
 2021-12-22 12:52:30 +01:00
Thierry Reding
c3859c1436 dt-bindings: memory: tegra: Add Tegra234 support 
Document the variant of the memory controller and external memory
controllers found on Tegra234 and add some memory client and SMMU
stream ID definitions for use in device tree files.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2021-12-16 16:43:49 +01:00
Thierry Reding
8c970e7ee7 dt-bindings: memory: tegra: Update for Tegra194 
The #interconnect-cells properties are required to hook up memory
clients to the MC/EMC in interconnects properties. Add a description for
these properties.

For the nested EMC controller, the list of required properties was
missing. Add it so that the validation can be more strict.

Also, allow multiple reg entries required by Tegra194 and later.

While at it, also remove the dummy BPMP node from the example because it
is incomplete and fails validation. It's also not necessary for this
file and the BPMP DT schema already has a full example.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2021-12-16 16:43:49 +01:00
Rob Herring
07bb5e0e7b dt-bindings: memory-controllers: ti,gpmc: Drop incorrect unevaluatedProperties 
With 'unevaluatedProperties' support implemented, the TI GPMC example
has a warning:

Documentation/devicetree/bindings/mtd/ti,gpmc-onenand.example.dt.yaml: memory-controller@6e000000: onenand@0,0: Unevaluated properties are not allowed ('compatible', '#address-cells', '#size-cells', 'partition@0', 'partition@100000' were unexpected)

The child node definition for GPMC is not a complete binding, so specifying
'unevaluatedProperties: false' for it is not correct and should be
dropped.

Fixup the unnecessary 'allOf' while we're here.

Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20211206174215.2297796-1-robh@kernel.org
 2021-12-14 16:18:37 -06:00
Dinh Nguyen
a9e6b3819b dt-bindings: memory: Add entry for version 3.80a 
Add an entry for version 3.80a of the Synopsys DDR controller.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lkml.kernel.org/r/20211012190709.1504152-4-dinguyen@kernel.org
 2021-11-20 19:51:35 +01:00
Lad Prabhakar
4b5a231ff6 dt-bindings: memory: renesas,rpc-if: Add optional interrupts property 
For completeness add optional interrupts property.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20211025205631.21151-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
 2021-11-16 11:28:31 +01:00
Lad Prabhakar
c271aa1f73 dt-bindings: memory: renesas,rpc-if: Add support for the R9A07G044 
SPI Multi I/O Bus Controller on RZ/G2L SoC is almost identical to
the RPC-IF interface found on R-Car Gen3 SoC's.

This patch adds a new compatible string to identify the RZ/G2L family
so that the timing values on RZ/G2L can be adjusted.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20211025205631.21151-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
 2021-11-16 11:28:13 +01:00
Patrice Chotard
f4eedebdbf dt-bindings: treewide: Update @st.com email address to @foss.st.com 
Not all @st.com email address are concerned, only people who have
a specific @foss.st.com email will see their entry updated.
For some people, who left the company, remove their email.

Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
Cc: Fabien Dessenne <fabien.dessenne@foss.st.com>
Cc: Christophe Roullier <christophe.roullier@foss.st.com>
Cc: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Cc: Lionel Debieve <lionel.debieve@foss.st.com>
Cc: Amelie Delaunay <amelie.delaunay@foss.st.com>
Cc: Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com>
Cc: Ludovic Barre <ludovic.barre@foss.st.com>
Cc: Christophe Kerello <christophe.kerello@foss.st.com>
Cc: pascal Paillet <p.paillet@foss.st.com>
Cc: Erwan Le Ray <erwan.leray@foss.st.com>
Cc: Philippe CORNU <philippe.cornu@foss.st.com>
Cc: Yannick Fertre <yannick.fertre@foss.st.com>
Cc: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Cc: Olivier Moysan <olivier.moysan@foss.st.com>
Cc: Hugues Fruchet <hugues.fruchet@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-By: Vinod Koul <vkoul@kernel.org>
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20211110150144.18272-6-patrice.chotard@foss.st.com
Signed-off-by: Rob Herring <robh@kernel.org>
 2021-11-11 22:27:16 -06:00
Paul Cercueil
c4a11bf423 dt-bindings: Rename Ingenic CGU headers to ingenic,*.h 
Tidy up a bit the tree, by prefixing all include/dt-bindings/clock/ files
related to Ingenic SoCs with 'ingenic,'.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211016133322.40771-1-paul@crapouillou.net
 2021-11-11 22:27:14 -06:00
Linus Torvalds
d461e96cd2 ARM: SoC drivers for 5.16 
These are all the driver updates for SoC specific drivers. There
 are a couple of subsystems with individual maintainers picking up
 their patches here:
 
  - The reset controller subsystem add support for a few new SoC
    variants to existing drivers, along with other minor improvements
 
  - The OP-TEE subsystem gets a driver for the ARM FF-A transport
 
  - The memory controller subsystem has improvements for Tegra,
    Mediatek, Renesas, Freescale and Broadcom specific drivers.
 
  - The tegra cpuidle driver changes get merged through this
    tree this time. There are only minor changes, but they depend
    on other tegra driver updates here.
 
  - The ep93xx platform finally moves to using the drivers/clk/
    subsystem, moving the code out of arch/arm in the process.
    This depends on a small sound driver change that is included
    here as well.
 
  - There are some minor updates for Qualcomm and Tegra specific
    firmware drivers.
 
 The other driver updates are mainly for drivers/soc, which contains
 a mixture of vendor specific drivers that don't really fit elsewhere:
 
  - Mediatek drivers gain more support for MT8192, with new support for
    hw-mutex and mmsys routing, plus support for reset lines in the
    mmsys driver.
 
  - Qualcomm gains a new "sleep stats" driver, and support for
    the "Generic Packet Router" in the APR driver.
 
  - There is a new user interface for routing the UARTS on ASpeed
    BMCs, something that apparently nobody else has needed so far.
 
  - More drivers can now be built as loadable modules, in particular
    for Broadcom and Samsung platforms.
 
  - Lots of improvements to the TI sysc driver for better suspend/resume
    support
 
 Finally, there are lots of minor cleanups and new device IDs for
 amlogic, renesas, tegra, qualcomm, mediateka, samsung, imx, layerscape,
 allwinner, broadcom, and omap.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmGCvKgACgkQmmx57+YA
 GNnNfw/8DDTfMUycVvtaNslYlWri0/2O0nSqhNIIbTAcVuD/x5qo/McDhKuv+ldM
 BoTDMjRYZfQkrNXSEj3MaxB9E0o6Srva5SM8y4+Koe0VVtvEVovjYkXOhXqSEWWl
 aqVIe0S6Y1rF/KxJlvAfGxYHb5d+6aYqzdmhjURpXNGxqpSHb9/hqisY97Q9TpnD
 6lQZOz9d1JNDq0eOh1qjcfuMjg1EHZHDZJyioCvyX38KIl2q7p3ll2z/eqrrDhQZ
 TrvL/YVosTXqBcAfi47Oz+n/CX2i0MrjVO8nfPSGOq5UL4Al3SZD4XYY96IOIQrH
 +XGFigGGAkV2LfKSEPNJWaq7g+SiQUr2jc3p8b4Zxde8/+5M127/gotiPddyG2LX
 1OnFRnPskgRApGqHjGEcEzzJUTag7Hc+YVH82TMEHZhSDMq6i30k9UnyfXsziZDV
 8CrkOpjuSg+YxFv/83bfa1pIoYtFfjGr16mq4muajodnX7+b7My9iv+2Oo2iQM9y
 DwRUKj7+eap23SEUpi4et6HlNpoF6yJMbt5Ae1k+gTK2DvQ4Cx6n4QJz/I7WC1Wp
 BdVhvSH8XVppVLtQqODud+VWvLgLerRxUpGRdbS8r5VsnNUJTvaS4YGMpm9616G7
 TrgUSSvsyu1lLqbWMh+pOCk4l3r64vSUn581hrIw6jtioNGvMdE=
 =tUuj
 -----END PGP SIGNATURE-----

Merge tag 'drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "These are all the driver updates for SoC specific drivers. There are a
  couple of subsystems with individual maintainers picking up their
  patches here:

   - The reset controller subsystem add support for a few new SoC
     variants to existing drivers, along with other minor improvements

   - The OP-TEE subsystem gets a driver for the ARM FF-A transport

   - The memory controller subsystem has improvements for Tegra,
     Mediatek, Renesas, Freescale and Broadcom specific drivers.

   - The tegra cpuidle driver changes get merged through this tree this
     time. There are only minor changes, but they depend on other tegra
     driver updates here.

   - The ep93xx platform finally moves to using the drivers/clk/
     subsystem, moving the code out of arch/arm in the process. This
     depends on a small sound driver change that is included here as
     well.

   - There are some minor updates for Qualcomm and Tegra specific
     firmware drivers.

  The other driver updates are mainly for drivers/soc, which contains a
  mixture of vendor specific drivers that don't really fit elsewhere:

   - Mediatek drivers gain more support for MT8192, with new support for
     hw-mutex and mmsys routing, plus support for reset lines in the
     mmsys driver.

   - Qualcomm gains a new "sleep stats" driver, and support for the
     "Generic Packet Router" in the APR driver.

   - There is a new user interface for routing the UARTS on ASpeed BMCs,
     something that apparently nobody else has needed so far.

   - More drivers can now be built as loadable modules, in particular
     for Broadcom and Samsung platforms.

   - Lots of improvements to the TI sysc driver for better
     suspend/resume support"

  Finally, there are lots of minor cleanups and new device IDs for
  amlogic, renesas, tegra, qualcomm, mediateka, samsung, imx,
  layerscape, allwinner, broadcom, and omap"

* tag 'drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (179 commits)
  optee: Fix spelling mistake "reclain" -> "reclaim"
  Revert "firmware: qcom: scm: Add support for MC boot address API"
  qcom: spm: allow compile-testing
  firmware: arm_ffa: Remove unused 'compat_version' variable
  soc: samsung: exynos-chipid: add exynosautov9 SoC support
  firmware: qcom: scm: Don't break compile test on non-ARM platforms
  soc: qcom: smp2p: Add of_node_put() before goto
  soc: qcom: apr: Add of_node_put() before return
  soc: qcom: qcom_stats: Fix client votes offset
  soc: qcom: rpmhpd: fix sm8350_mxc's peer domain
  dt-bindings: arm: cpus: Document qcom,msm8916-smp enable-method
  ARM: qcom: Add qcom,msm8916-smp enable-method identical to MSM8226
  firmware: qcom: scm: Add support for MC boot address API
  soc: qcom: spm: Add 8916 SPM register data
  dt-bindings: soc: qcom: spm: Document qcom,msm8916-saw2-v3.0-cpu
  soc: qcom: socinfo: Add PM8150C and SMB2351 models
  firmware: qcom_scm: Fix error retval in __qcom_scm_is_call_available()
  soc: aspeed: Add UART routing support
  soc: fsl: dpio: rename the enqueue descriptor variable
  soc: fsl: dpio: use an explicit NULL instead of 0
  ...
 2021-11-03 17:00:52 -07:00
Linus Torvalds
ae45d84fc3 ARM: SoC DT updates for v5.16 
This is a rather large update for the ARM devicetree files, after a few
 quieter releases, with 775 total commits and 47 branches pulled into
 this one. There are 5 new SoC types plus some minor variations, and
 a total of 60 new machines, so I'm limiting the summary to the main
 noteworthy items:
 
  - Apple M1 gain support for PCI and pinctrl, getting a bit
    closer to a usable system out of the box.
 
  - Qualcomm gains support for Snapdragon 690 (aka SM6350) as
    well as SM7225, 11 new smartphones, and three additional
    Chromebooks, and improvements all over the place.
 
  - Samsung gains support for ExynosAutov9, an automotive version
    of their smartphone SoC, but otherwise no major changes.
 
  - Microchip adds the SAMA5D29 SoC in the SAMA5 family, and a
    number of improvements for the recently added SAMA7 family.
    The LAN966 SoC that was added in the platform code does not
    have dts files yet. Two board files are added for the older
    at91sam9g20 SoC
 
  - Aspeed supports two additional server boards using their AST2600
    as BMC, and improves support for qemu models
 
  - Rockchip RK3566/RK3688 gets added, along with six new
    development boards using RK3328/RK3399/RK3566, and one
    Chromebook tablet.
 
  - Two NAS boxes are added using the ARMv4 based Gemini platform
 
  - One new board is added to the Intel Arria SoC FPGA family
 
  - Marvell adds one network switch based on Armada 381 and the
    new MOCHAbin 7040 development board
 
  - NXP adds support for the S32G2 automotive SoC, two imx6 based
    ebook readers, and three additional development boards, which
    is notably less than their usual additions, but they also gain
    improvements to their many existing boards
 
  - STmicroelectronics adds their stm32mp13 SoC family along with
    a reference board
 
  - Renesas adds new versions of their R-Car Gen3 SoCs and many
    updates for their older generations
 
  - Broadcom adds support for a number of Cisco Meraki wireless
    controllers, along with two new boards and other updates for
    BCM53xx/BCM47xx networking SoCs and the Raspberry Pi
    boards
 
  - Mediatek improves support for the MT81xx SoCs used in Chromebooks
    as well as the MT76xx networking SoCs
 
  - NVIDIA adds a number of cleanups and additional support for
    more hardware on the already supported machines
 
  - TI K3 adds support for three new boards along with cleanups
 
  - Toshiba adds one board for the Visconti family
 
  - Xilinx adds five new ZynqMP based machines
 
  - Amlogic support is added for the Radxa Zero and two Jethub
    home automation controllers, along with changes to other
    machines
 
  - Rob Herring continues his work on fixing dtc warnings all over
    the tree.
 
  - Minor updates for TI OMAP, Mstar, Allwinner/sunxi, Hisilicon,
    Ux500, Unisoc
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmGDCJYACgkQmmx57+YA
 GNlIlQ//VOQJeP7Om3Qt3Vai/zvrSWegAagI8quF6m4fTI0D3NVRw4KD7sld1+39
 lIcUTdM4eSXO+vsyWRSb9ESyymGGsTy9o8irIDTH2SSyawMwFwydgoO/riS6/tkG
 37c9OvCNdjhQIgxo20vW8+dr021UNJqQNG7dQzTJrlbe8IzNGkSjVO5i97v8XK2e
 HWtwhOd8W7ptmuTKdq5/DTv0V9LzcJSfWlwYPscHRGHg/t0+frC+G2H3osjgGuux
 gbbrdocy1Qmj1sqeAPBud5O2TTEu4M09HYgVWXoKcgBzTt3hJZ9TmzE4YNfUYmv6
 sYz+BaPesm2hR+zjBz0wxGG+eP27Zv4FUN/VeMGilRbhXVCv6GSf90fDTbaW4Q8F
 IR/BgN0lk2GyNjRyVUcDQI/Aus//TXAI7+rcfXccGBrxs/EBZ3e/hmNNTi9jCMBT
 NGLkXAI574tcfLUYybj87upFTPLHTwq4is9p1RY/l73wlcFDZHai+aE2X5GhYLzy
 XaYuyur1wA+v5938RjjwCYJjqssz+OlJJP1N2KeQT99PVkS0IunXFJGcsve6UOAN
 maRxI4oSU1lz6VaP8tsVJESzObwFCtOdYjgUHpRUJ8JTNTRpy/6JLAX0dnr1LrQV
 Fr6gLtodCOa2Udc5T+VkoodAw2f5Gta8cE1fQB9CjUDklkhUtsg=
 =jp4P
 -----END PGP SIGNATURE-----

Merge tag 'dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC DT updates from Arnd Bergmann:
 "This is a rather large update for the ARM devicetree files, after a
  few quieter releases, with 775 total commits and 47 branches pulled
  into this one.

  There are 5 new SoC types plus some minor variations, and a total of
  60 new machines, so I'm limiting the summary to the main noteworthy
  items:

   - Apple M1 gain support for PCI and pinctrl, getting a bit closer to
     a usable system out of the box.

   - Qualcomm gains support for Snapdragon 690 (aka SM6350) as well as
     SM7225, 11 new smartphones, and three additional Chromebooks, and
     improvements all over the place.

   - Samsung gains support for ExynosAutov9, an automotive version of
     their smartphone SoC, but otherwise no major changes.

   - Microchip adds the SAMA5D29 SoC in the SAMA5 family, and a number
     of improvements for the recently added SAMA7 family. The LAN966 SoC
     that was added in the platform code does not have dts files yet.
     Two board files are added for the older at91sam9g20 SoC

   - Aspeed supports two additional server boards using their AST2600 as
     BMC, and improves support for qemu models

   - Rockchip RK3566/RK3688 gets added, along with six new development
     boards using RK3328/RK3399/RK3566, and one Chromebook tablet.

   - Two NAS boxes are added using the ARMv4 based Gemini platform

   - One new board is added to the Intel Arria SoC FPGA family

   - Marvell adds one network switch based on Armada 381 and the new
     MOCHAbin 7040 development board

   - NXP adds support for the S32G2 automotive SoC, two imx6 based ebook
     readers, and three additional development boards, which is notably
     less than their usual additions, but they also gain improvements to
     their many existing boards

   - STmicroelectronics adds their stm32mp13 SoC family along with a
     reference board

   - Renesas adds new versions of their R-Car Gen3 SoCs and many updates
     for their older generations

   - Broadcom adds support for a number of Cisco Meraki wireless
     controllers, along with two new boards and other updates for
     BCM53xx/BCM47xx networking SoCs and the Raspberry Pi boards

   - Mediatek improves support for the MT81xx SoCs used in Chromebooks
     as well as the MT76xx networking SoCs

   - NVIDIA adds a number of cleanups and additional support for more
     hardware on the already supported machines

   - TI K3 adds support for three new boards along with cleanups

   - Toshiba adds one board for the Visconti family

   - Xilinx adds five new ZynqMP based machines

   - Amlogic support is added for the Radxa Zero and two Jethub home
     automation controllers, along with changes to other machines

   - Rob Herring continues his work on fixing dtc warnings all over the
     tree.

   - Minor updates for TI OMAP, Mstar, Allwinner/sunxi, Hisilicon,
     Ux500, Unisoc"

* tag 'dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (720 commits)
  arm64: dts: apple: j274: Expose PCI node for the Ethernet MAC address
  arm64: dts: apple: t8103: Add root port interrupt routing
  arm64: dts: apple: t8103: Add PCIe DARTs
  arm64: apple: Add PCIe node
  arm64: apple: Add pinctrl nodes
  ARM: dts: arm: Update ICST clock nodes 'reg' and node names
  ARM: dts: arm: Update register-bit-led nodes 'reg' and node names
  arm64: dts: exynos: add chipid node for exynosautov9 SoC
  ARM: dts: qcom: fix typo in IPQ8064 thermal-sensor node
  Revert "arm64: dts: qcom: msm8916-asus-z00l: Add sensors"
  arm64: dts: qcom: ipq6018: Remove unused 'iface_clk' property from dma-controller node
  arm64: dts: qcom: ipq6018: Remove unused 'qcom,config-pipe-trust-reg' property
  arm64: dts: qcom: sm8350: Add CPU topology and idle-states
  arm64: dts: qcom: Drop unneeded extra device-specific includes
  arm64: dts: qcom: msm8916: Drop standalone smem node
  arm64: dts: qcom: Fix node name of rpm-msg-ram device nodes
  arm64: dts: qcom: msm8916-asus-z00l: Add sensors
  arm64: dts: qcom: msm8916-asus-z00l: Add SDCard
  arm64: dts: qcom: msm8916-asus-z00l: Add touchscreen
  arm64: dts: qcom: sdm845-oneplus: remove devinfo-size from ramoops node
  ...
 2021-11-03 16:56:03 -07:00
Arnd Bergmann
bccb5d53e2 Memory controller drivers for v5.16, part two 
1. Convert LPDDR2 bindings to dtschema and extend them with new
    properties.
 2. Tegra 20 EMC: support matching timings by LPDDR2 configuration from
    devicetree.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmFxMrMQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD1zN4EACUUda2z/Ico+Y0J8ygDdHFa9CE2Q0rbWPc
 4cCeQSae+joWSTGxZUGIKd2SDCz2Ai0U2AOe4v9YqbmW4J6izdeUqaJHSorC7g+8
 /Or307HKwOi0kV8kwSC0AABPlkTFDTR5wjG908vAfEU4KfmkHXpKB7EJn2vpM/Km
 JzZ9K+v0Bm6VH5CLQZpcFiffXQJDeN1Cqve45g50BfpFITUche/TR8FRfJPJ90n0
 fJ2kjlMGT87U8tb4JKpYy6UoRCToxJq+uy/0nUAzUXAgBzM1zF9tVFGpw2WNUu1a
 j+PwFAA7eybX53BKFm0LfC/Z3PNJ+GYeDzUv+3VaSL+x5aNWRa1ffBBgWNAnnoWD
 QO0QGnZUxM+JEtTkgeByVblP4Aq4hmlSOJ3ErZ0NyH7iJyREqJEpJkXoSm0QIY4F
 TxiyrHJg0rSF4VTFU1qVBzn1m1VbfWR36RqOW29t8GJoMri8vCW7eyT0Z7xe4x8W
 er9kIGGpRQ2G3mtBRjHSXGjIztG5dVNbp5eEq7roJoQDcEcPnwox+8Au6NkA7JDS
 ednahUQ3qFEzS0vLXNgwvM1z77xPcgVFRRfdySfMUN0R3wBuhBp8EMTUNs2GrGSD
 KhxlK7WYcvwMy++o1M6Lmy7ukh40Tpgsmhg9CNr+eLTjJDs3rO/qdgteRnuQtsFd
 qh0PqiaX1w==
 =cTPK
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmFxwL0ACgkQmmx57+YA
 GNkfPw//ZFrn9+3SKYzXRgWKdPeGO9DfOrooEFe37DMsdCCDkTsZPxnKooidI61t
 g4UlgpPnnDEOas7glALgPwdFGqePzbocXgWtzgc/9kKNVNlJfE4OBVo8WykNSTOB
 Yqv38Z0Fz7XURfxzQCRHi9oMihkp0j9MaMmApO1/1ejYSueKnZ13OESPhmwrJBx0
 0oJCpkpOdxzfBlDaoaymSa0seWl1kAcWX6bya5dgDBGKKXhl69yLrqDSafmc57dx
 fOSgmpHSWPT+VavuGG6+p0daEk4vY3A37A/cVgaXl+Te02/O78luNHj0Wu1kjcxk
 lXhsBbb0iEyCUBRHpxwBm5cszm3yaN1GFnd0kW7vjV1kscnjwcDVJ8r9B/u1jIIj
 RQQq32QJ548c4eqSOT/OqhpI+r/R3z4pdFnaYiz6NDW5WY3UucKwoFCmhGRYk+T6
 Xp+5RreoUisDKg6rDDG6M6H/iTcYQw9W6NvLkf2HghokmcTG9cH1o/Q05COZe7dK
 yyZmb61fxS3SmsiWHrAtz2L8ztFibAjHjRfMV44TXX5JKp//hcMWg6HBMf+zD474
 wLsKGSimeKgSsy2NjqRwh3VSueA4ETrp4Iue2NaRCZ5ROnepCa6WzuUBPNTqXv+8
 HZTAHG7d7TAQ2O+hhShSGMP2tCkssuJ4OkmzbkPKDDe8xECaf9k=
 =NKAR
 -----END PGP SIGNATURE-----

Merge tag 'memory-controller-drv-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers

Memory controller drivers for v5.16, part two

1. Convert LPDDR2 bindings to dtschema and extend them with new
   properties.
2. Tegra 20 EMC: support matching timings by LPDDR2 configuration from
   devicetree.

* tag 'memory-controller-drv-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
  memory: tegra20-emc: Add runtime dependency on devfreq governor module
  memory: tegra20-emc: Support matching timings by LPDDR2 configuration
  memory: Add LPDDR2-info helpers
  dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-node
  dt-bindings: Add vendor prefix for Elpida Memory
  dt-bindings: memory: lpddr2: Document Elpida B8132B2PB-6D-F
  dt-bindings: memory: lpddr2: Add revision-id properties
  dt-bindings: memory: lpddr2: Convert to schema
  dt-bindings: Relocate DDR bindings

Link: https://lore.kernel.org/r/20211021093002.118192-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2021-10-21 21:34:21 +02:00
Dmitry Osipenko
ce004ae6c5 dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-node 
Some Tegra20 boards don't have RAM code stored in NVMEM, which is used for
the memory chip identification and the identity information should be read
out from LPDDR2 chip in this case. Document new sub-node containing generic
LPDDR2 properties that will be used for the memory chip identification if
RAM code isn't available. The identification is done by reading out memory
configuration values from generic LPDDR2 mode registers of SDRAM chip and
comparing them with the values of device-tree 'lpddr2' sub-node.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211006224659.21434-8-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
 2021-10-15 09:52:47 +02:00
Dmitry Osipenko
2782ece0d3 dt-bindings: memory: lpddr2: Document Elpida B8132B2PB-6D-F 
Elpida B8132B2PB-6D-F memory chip is used by ASUS Transformer TF101
tablet, add compatible for it. We need to specify this compatible it
for a device-tree node containing corresponding memory timings in order
to allow software to match the timings with the detected hardware.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211006224659.21434-5-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
 2021-10-15 09:52:47 +02:00
Dmitry Osipenko
3539a2c6c6 dt-bindings: memory: lpddr2: Add revision-id properties 
Add optional revision-id standard LPDDR2 properties which will help to
identify memory chip.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211006224659.21434-4-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
 2021-10-15 09:52:47 +02:00
Dmitry Osipenko
9e17f71e9c dt-bindings: memory: lpddr2: Convert to schema 
Convert LPDDR2 binding to schema. I removed obsolete ti,jedec-lpddr2-*
compatibles since they were never used by device-trees and by the code.
I also changed "Elpida" compatible prefix to lowercase "elpida".

Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211006224659.21434-3-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
 2021-10-15 09:52:46 +02:00
Dmitry Osipenko
a0d245d086 dt-bindings: Relocate DDR bindings 
Move DDR bindings to memory-controllers directory to make them more
discoverable.

Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211006224659.21434-2-digetx@gmail.com
[krzysztof: Correct path in lpddr3.txt and samsung,exynos5422-dmc.yaml]
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
 2021-10-15 09:52:46 +02:00
Sergio Paracuellos
5278e4a181 dt-bindings: memory: add binding for Mediatek's MT7621 SDRAM memory controller 
Add binding documentation for Mediatek's SDRAM memory controller present on
MT7621 SoC.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20211002060910.30613-1-sergio.paracuellos@gmail.com
Signed-off-by: Rob Herring <robh@kernel.org>
 2021-10-11 20:05:47 -05:00
Arnd Bergmann
16667625da Memory controller drivers for v5.16 
1. Renesas RPC: fix unaligned bus access and QSPI data transfers in
    manual modes.
 2. Renesas RPC: select RESET_CONTROLLER as it is necessary for
    operation.
 3. FSL IFC: fix error paths.
 4. Broadcom: allow building as module.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmFjKNoQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD169cEACPgbJcEFgGFO3h8/EMo2pQhEk2VqQ6zO3r
 ngp12fV7vFGYkABWP0DKu/BNEHO+AOqZhsE2y2xjoSsuyxqGw8oUXjYmUUgrj7C6
 e0vzgQmd4xQNAA2TKrbed4RWLwGHx52Cyn4Yl4Kw/yI3MWt2wz2t5DohLLmlCCDE
 3J4S06A1/GCZDoNw0Stt4XWR+7K8RFi9HugA1wcbHcPHlEx5oFk75JQaeItqmN5A
 wnclBB3+G2zbs5hdtVVxXKVqgK5Goi7LPhwjg1jvuvSRLbY5bmJ1GSTUoxDFCbBT
 RRMAVV8A+nu56gFR6kkjx8URZ0D5CvY1su1Ig7p5Ohu5cF8irU6W2RwqC9rfujPs
 o3vY/w7EPeWuI3Uqk7zthWECeqfCuwGRQ/JVs1jtQXa8BvgSHa2O629NlCNMnq7J
 lGh4D0ZRsLkFt9/AVU4hKH4M30qpKakPlltn1pSQtIHLJfLGWwTY7Z3pF0UPiapq
 inw+ihzqDH+94R5KRtHZPYFZSk5kkia713+XhEroOSNh1QmX//QrbdtxNiBy3LPq
 Njm7fBiXGANQ4EEDxA/5w/KODq6KDKhFZPIpv+Dtm1gn4nIYlaHPKLjEm3p6atnH
 K05Yx9MclKF+ACRKH4KVsnCSXblsd9FhRVPdSvnhoUdYGQG33VtKK6BmZQWLV1WN
 2ea6dwqhJw==
 =ZsTv
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmFkDP4ACgkQmmx57+YA
 GNnOzRAAxRm9E9hFwaqKoyEopnuxJRFxxjXFS8hM8GieiwD5upJBBtB7HjGqcfBC
 i5RZV9RRKU2v04tdddkWhS4Pcw52eEmE/T77uMhr8UwaOzzkuVgKdOz432XuVCwf
 2O6oGS2igTTWMKakb+4Zza9q3PXPuUdFgXyOBdeB1PF96RnV9qjSRviwpp+P75fj
 9X0ikocRVo80hCDMsiTtYwzd10CbslVIOv9wWHSa7kKQzuHJbALYL4mjnlvF4bCo
 9iDVu+UJCsAhd16Xtks2VtewYmox+n/+q/ThKDU0IB2I9kdR5tvpkQqPhdn8W0Fj
 LiJDfDexB5rS3o9E/ws6CJGFhMxI9QFyMLXGq8HAXHjRGTIlCKA53DqpH2r10Hlj
 5mzuNRfxyo2mAu2sXzDF2ScVXImsSGN65evdsFFOlohVbivhq5AZzpYnQBT/tR1K
 E4srv07jl7FxI03YavNevq3fqzE+SSZ1cX8PAcKY7qeueci4yPmd9/7SiJLqyHDd
 Q5B2q60bbCF3E7F0UQpKMjq1ZB0jO16PKYZ1BzOtXLQloC6HRR+HuLMpsyLEb09d
 4aAwWl3Xa183t9lTLCuzZuC3b8qZgwcKrVrDO+Rigb8adtlOVAQFoqWZthzhL3Ys
 nIRY2wc83rtJ/uSghFEe1sLZvZ+2K9nEWD0wInejtq+GqhqWn9s=
 =OOXj
 -----END PGP SIGNATURE-----

Merge tag 'memory-controller-drv-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers

Memory controller drivers for v5.16

1. Renesas RPC: fix unaligned bus access and QSPI data transfers in
   manual modes.
2. Renesas RPC: select RESET_CONTROLLER as it is necessary for
   operation.
3. FSL IFC: fix error paths.
4. Broadcom: allow building as module.

* tag 'memory-controller-drv-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
  memory: fsl_ifc: fix leak of irq and nand_irq in fsl_ifc_ctrl_probe
  memory: renesas-rpc-if: RENESAS_RPCIF should select RESET_CONTROLLER
  memory: brcmstb_dpfe: Allow building Broadcom STB DPFE as module
  memory: samsung: describe drivers in KConfig
  memory: renesas-rpc-if: Avoid unaligned bus access for HyperFlash
  memory: renesas-rpc-if: Correct QSPI data transfer in Manual mode
  dt-bindings: rpc: renesas-rpc-if: Add support for the R8A779A0 RPC-IF

Link: https://lore.kernel.org/r/20211010175836.13302-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2021-10-11 12:07:57 +02:00
Roger Quadros
c346eb1c3d dt-bindings: memory-controllers: ti,gpmc: Convert to yaml 
Convert omap-gpmc.txt to ti,gpmc.yaml.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
 2021-10-11 12:31:53 +03:00
Roger Quadros
04f461f35e dt-bindings: memory-controllers: Introduce ti,gpmc-child 
This binding is meant for the child nodes of the TI GPMC node. The node
represents any device connected to the GPMC bus. It may be a Flash chip,
RAM chip or Ethernet controller, etc. These properties are meant for
configuring the GPMC settings/timings and will accompany the bindings
supported by the respective device.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
 2021-10-11 12:31:52 +03:00
Wolfram Sang
797f082738 dt-bindings: rpc: renesas-rpc-if: Add support for the R8A779A0 RPC-IF 
Add bindings for the R8A779A0 (R-Car V3U).

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210922085831.5375-1-wsa+renesas@sang-engineering.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
 2021-09-24 14:00:20 +02:00
Yong Wu
599e681a31 dt-bindings: memory: mediatek: Add mt8195 smi sub common 
Add the binding for smi-sub-common. The SMI block diagram like this:

        IOMMU
         |  |
      smi-common
  ------------------
  |      ....      |
 larb0           larb7   <-max is 8

The smi-common connects with smi-larb and IOMMU. The maximum larbs number
that connects with a smi-common is 8. If the engines number is over 8,
sometimes we use a smi-sub-common which is nearly same with smi-common.
It supports up to 8 input and 1 output(smi-common has 2 output)

Something like:

        IOMMU
         |  |
      smi-common
  ---------------------
  |      |          ...
larb0  sub-common   ...   <-max is 8
      -----------
       |    |    ...   <-max is 8 too.
     larb2 larb5

We don't need extra SW setting for smi-sub-common, only the sub-common has
special clocks need to enable when the engines access dram.

If it is sub-common, it should have a "mediatek,smi" phandle to point to
its smi-common. meanwhile the sub-common only has one gals clock.

Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210914113703.31466-3-yong.wu@mediatek.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
 2021-09-22 08:40:10 +02:00
Yong Wu
b01065eee4 dt-bindings: memory: mediatek: Add mt8195 smi binding 
Add mt8195 smi supporting in the bindings.

In mt8195, there are two smi-common HW, one is for vdo(video output),
the other is for vpp(video processing pipe). They connect with different
smi-larbs, then some setting(bus_sel) is different. Differentiate them
with the compatible string.

Something like this:

    IOMMU(VDO)          IOMMU(VPP)
       |                   |
 SMI_COMMON_VDO      SMI_COMMON_VPP
 ----------------     ----------------
  |      |   ...      |      |     ...
larb0 larb2  ...    larb1 larb3    ...

Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210914113703.31466-2-yong.wu@mediatek.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
 2021-09-22 08:40:10 +02:00
Krzysztof Kozlowski
0e3e0fa766 dt-bindings: memory: fsl: convert DDR controller to dtschema 
Convert Freescale/NXP DDR memory controller bindings to DT schema format
using json-schema.

Previous bindings were not listing all compatibles, so scan through
devicetree sources and drivers to get these.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210826113049.92962-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Rob Herring <robh@kernel.org>
 2021-09-13 08:20:18 -05:00
Linus Torvalds
9e5f3ffcf1 Devicetree updates for v5.15: 
- Refactor arch kdump DT related code to a common implementation
 
 - Add fw_devlink tracking for 'phy-handle', 'leds', 'backlight',
   'resets', and 'pwm' properties
 
 - Various clean-ups to DT FDT code
 
 - Fix a runtime error for !CONFIG_SYSFS
 
 - Convert Synopsys DW PCI and derivative binding docs to schemas. Add
   Toshiba Visconti PCIe binding.
 
 - Convert a bunch of memory controller bindings to schemas
 
 - Covert eeprom-93xx46, Samsung Exynos TRNG, Samsung Exynos IRQ
   combiner, arm-charlcd, img-ascii-lcd, UniPhier eFuse, Xilinx Zynq
   MPSoC FPGA, Xilinx Zynq MPSoC reset, Mediatek mmsys, Gemini boards,
   brcm,iproc-i2c, faraday,ftpci100, and ks8851 net to DT schema.
 
 - Extend nvmem bindings to handle bit offsets in unit-addresses
 
 - Add DT schemas for HiKey 970 PCIe PHY
 
 - Remove unused ZTE, energymicro,efm32-timer, and Exynos SATA bindings
 
 - Enable dtc pci_device_reg warning by default
 
 - Fixes for handling 'unevaluatedProperties' in preparation to enable
   pending support in the tooling for jsonschema 2020-12 draft
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmEuWEsQHHJvYmhAa2Vy
 bmVsLm9yZwAKCRD6+121jbxhw+CtD/45m84GisULb7FFmlo+WY2SbzE8a+MUEXo0
 5ZZoMViSvBchphap9ueFNDdrLMUOHMsFaxHuTCUxXr4tq7EOemM7Br4OLiwiRrM5
 o2CwBvXYu+49c4UKVFMM6RCKFiXvw5NLI4Twpj4Ge8farHvt9Ecwtq+Y+RYWgFk2
 xwXWut7ZK3zBU6B+s4MRBATCFTD5oC4pAJIK3OQUlUPqZEQqdTRBKv5lyg+VUY2k
 eU0Cyzm0dZAmtjAu8ovhVNLfK1pp165QiaFIE1qh5H3ZVZAJlNyqN4jBDx9E4pLj
 BeazrsqfOkC8mZC+T7TgixhwB6D+r6/JW9NiCjYbarXibIsUOKSTKtj8XR8eZF/g
 sLeVDx33U5S+dlj1OB7scwq4Q9sG27ii2rlkvafA5KKBjoR2dzz7o9JesCV1Guha
 goPXmcd08e+KrjINxVc6gk4Y+KG8u+G7qnXnnmSatESJKxiDu1OgU3L16mlTJFaM
 hBmrh5rx1y8EkQnzgceTZIIWh30poSQKKyDB6Ta4Dude5JE+rS30oVURDR7MIrav
 rY70OYOiSq/nCcC7bc0Yu0UxJi+bwH28WvsD0aeCUOBTFsnI4j2uvsPsh3Aq74O0
 UbQmUCMxhpmsDVdIOqlS1IVH8M79I+BrDTPVP6EE96ttoj9FbSi6AgjeGJzVMC99
 EhtWe+gKTQ==
 =28CD
 -----END PGP SIGNATURE-----

Merge tag 'devicetree-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree updates from Rob Herring:

 - Refactor arch kdump DT related code to a common implementation

 - Add fw_devlink tracking for 'phy-handle', 'leds', 'backlight',
   'resets', and 'pwm' properties

 - Various clean-ups to DT FDT code

 - Fix a runtime error for !CONFIG_SYSFS

 - Convert Synopsys DW PCI and derivative binding docs to schemas. Add
   Toshiba Visconti PCIe binding.

 - Convert a bunch of memory controller bindings to schemas

 - Covert eeprom-93xx46, Samsung Exynos TRNG, Samsung Exynos IRQ
   combiner, arm-charlcd, img-ascii-lcd, UniPhier eFuse, Xilinx Zynq
   MPSoC FPGA, Xilinx Zynq MPSoC reset, Mediatek mmsys, Gemini boards,
   brcm,iproc-i2c, faraday,ftpci100, and ks8851 net to DT schema.

 - Extend nvmem bindings to handle bit offsets in unit-addresses

 - Add DT schemas for HiKey 970 PCIe PHY

 - Remove unused ZTE, energymicro,efm32-timer, and Exynos SATA bindings

 - Enable dtc pci_device_reg warning by default

 - Fixes for handling 'unevaluatedProperties' in preparation to enable
   pending support in the tooling for jsonschema 2020-12 draft

* tag 'devicetree-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (78 commits)
  dt-bindings: display: remove zte,vou.txt binding doc
  dt-bindings: hwmon: merge max1619 into trivial devices
  dt-bindings: mtd-physmap: Add 'arm,vexpress-flash' compatible
  dt-bindings: PCI: imx6: convert the imx pcie controller to dtschema
  dt-bindings: Use 'enum' instead of 'oneOf' plus 'const' entries
  dt-bindings: Add vendor prefix for Topic Embedded Systems
  of: fdt: Rename reserve_elfcorehdr() to fdt_reserve_elfcorehdr()
  arm64: kdump: Remove custom linux,usable-memory-range handling
  arm64: kdump: Remove custom linux,elfcorehdr handling
  riscv: Remove non-standard linux,elfcorehdr handling
  of: fdt: Use IS_ENABLED(CONFIG_BLK_DEV_INITRD) instead of #ifdef
  of: fdt: Add generic support for handling usable memory range property
  of: fdt: Add generic support for handling elf core headers property
  crash_dump: Make elfcorehdr address/size symbols always visible
  dt-bindings: memory: convert Samsung Exynos DMC to dtschema
  dt-bindings: devfreq: event: convert Samsung Exynos PPMU to dtschema
  dt-bindings: devfreq: event: convert Samsung Exynos NoCP to dtschema
  kbuild: Enable dtc 'pci_device_reg' warning by default
  dt-bindings: soc: remove obsolete zte zx header
  dt-bindings: clock: remove obsolete zte zx header
  ...
 2021-09-01 18:34:51 -07:00
Krzysztof Kozlowski
0b3813014c dt-bindings: memory: convert Samsung Exynos DMC to dtschema 
Convert Samsung Exynos5422 SoC frequency and voltage scaling for
Dynamic Memory Controller to DT schema format using json-schema.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Lukasz Luba <lukasz.luba@arm.com>
Link: https://lore.kernel.org/r/20210820150353.161161-3-krzysztof.kozlowski@canonical.com
Signed-off-by: Rob Herring <robh@kernel.org>
 2021-08-24 17:09:01 -05:00
Krzysztof Kozlowski
16109b257d dt-bindings: memory: convert H8/300 bus controller to dtschema 
Convert H8/300 bus controller bindings to DT schema format using
json-schema.

The conversion also extends the bindings to match what is really used in
existing devicetree sources (the original file mentions only
"renesas,h8300-bsc" but "renesas,h8300h-bsc" and "renesas,h8s-bsc" are
used with it).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210818202953.16862-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Rob Herring <robh@kernel.org>
 2021-08-23 13:52:09 -05:00
Krzysztof Kozlowski
0a7eb4fe83 dt-bindings: memory: convert TI a8xx DDR2/mDDR memory controller to dtschema 
Convert Texas Instruments da8xx DDR2/mDDR memory controller bindings to
DT schema format using json-schema.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210818113248.85084-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Rob Herring <robh@kernel.org>
 2021-08-18 14:08:42 -05:00
Krzysztof Kozlowski
47e397a575 dt-bindings: memory: convert Synopsys IntelliDDR memory controller to dtschema 
Convert Synopsys IntelliDDR Multi Protocol memory controller (present in
Xilinx Zynq and ZynqMP) bindings to DT schema format using json-schema.

New binding contains copied parts of description from previous binding
document, therefore the license is set as GPL-2.0-only.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210818113139.84869-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Rob Herring <robh@kernel.org>
 2021-08-18 14:08:42 -05:00
Krzysztof Kozlowski
ee05ab92dd dt-bindings: memory: convert Marvell MVEBU SDRAM controller to dtschema 
Convert Marvell MVEBU SDRAM controller bindings to DT schema format
using json-schema.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210817093807.59531-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Rob Herring <robh@kernel.org>
 2021-08-18 14:08:42 -05:00
Krzysztof Kozlowski
a0aca5e3dc dt-bindings: memory: convert Broadcom DPFE to dtschema 
Convert Broadcom DDR PHY Front End (DPFE) bindings to DT schema format
using json-schema.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Markus Mayer <mmayer@broadcom.com>
Link: https://lore.kernel.org/r/20210817080617.14503-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Rob Herring <robh@kernel.org>
 2021-08-18 14:08:42 -05:00
Krzysztof Kozlowski
577f425859 dt-bindings: memory: convert Qualcomm Atheros DDR to dtschema 
Convert Qualcomm Atheros AR7xxx/AR9xxx DDR controller to DT schema
format using json-schema.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210813143537.130310-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Rob Herring <robh@kernel.org>
 2021-08-17 17:14:42 -05:00
Geert Uytterhoeven
dbe60e5d7f dt-bindings: memory: renesas,rpc-if: Miscellaneous improvements 
- Fix rejection of legitimate flash subnodes containing multiple
    compatible values,
  - Add missing list of required properties.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/d81b59a513c2a5204c8378b4a89cd07f97c46797.1627401508.git.geert+renesas@glider.be
Signed-off-by: Rob Herring <robh@kernel.org>
 2021-08-02 14:40:44 -06:00
Rob Herring
e8917266ae dt-bindings: More dropping redundant minItems/maxItems 
Another round of removing redundant minItems/maxItems from new schema in
the recent merge window.

If a property has an 'items' list, then a 'minItems' or 'maxItems' with the
same size as the list is redundant and can be dropped. Note that is DT
schema specific behavior and not standard json-schema behavior. The tooling
will fixup the final schema adding any unspecified minItems/maxItems.

This condition is partially checked with the meta-schema already, but
only if both 'minItems' and 'maxItems' are equal to the 'items' length.
An improved meta-schema is pending.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Joerg Roedel <joro@8bytes.org>
Cc: Will Deacon <will@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Kamal Dasu <kdasu.kdev@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Sebastian Siewior <bigeasy@linutronix.de>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: linux-clk@vger.kernel.org
Cc: iommu@lists.linux-foundation.org
Cc: linux-mtd@lists.infradead.org
Cc: linux-rtc@vger.kernel.org
Cc: linux-usb@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20210713193453.690290-1-robh@kernel.org
 2021-07-15 08:45:27 -06:00
Linus Torvalds
da85e7ed69 MTD core changes: 
* Convert list_for_each to entry variant
 * Use MTD_DEVICE_ATTR_RO/RW() helper macros
 * Remove unnecessary OOM messages
 * Potential NULL dereference in mtd_otp_size()
 * Fix freeing of otp_info buffer
 * Create partname and partid debug files for child MTDs
 * tests:
   - Remove redundant assignment to err
   - Fix error return code in mtd_oobtest_init()
 * Add OTP NVMEM provider support
 * Allow specifying of_node
 * Convert sysfs sprintf/snprintf family to sysfs_emit
 
 Bindings changes:
 * Convert ti,am654-hbmc.txt to YAML schema
 * spi-nor: add otp property
 * Add OTP bindings
 * add YAML schema for the generic MTD bindings
 * Add brcm,trx-magic
 
 MTD device drivers changes:
 * Add support for microchip 48l640 EERAM
 * Remove superfluous "break"
 * sm_ftl:
   - Fix alignment of block comment
 * nftl:
   - Return -ENOMEM when kmalloc failed
 * nftlcore:
   - Remove set but rewrite variables
 * phram:
   - Fix error return code in phram_setup()
 * plat-ram:
   - Remove redundant dev_err call in platram_probe()
 
 MTD parsers changes:
 * Qcom:
   - Fix leaking of partition name
 * Redboot:
   - Fix style issues
   - Seek fis-index-block in the right node
 * trx:
   - Allow to use TRX parser on Mediatek SoCs
   - Allow to specify brcm, trx-magic in DT
 
 Raw NAND core:
 * Allow SDR timings to be nacked
 * Bring support for NV-DDR timings which involved a number of small
   preparation changes to bring new helpers, properly introduce NV-DDR
   structures, fill them, differenciate them and pick the best timing set.
 * Add the necessary infrastructure to parse the new gpio-cs property
   which aims at enlarging the number of available CS when a hardware
   controller is too constrained.
 * Update dead URL
 * Silence static checker warning in nand_setup_interface()
 * BBT:
   - Fix corner case in bad block table handling
 * onfi:
   - Use more recent ONFI specification wording
   - Use the BIT() macro when possible
 
 Raw NAND controller drivers:
 * Atmel:
   - Ensure the data interface is supported.
 * Arasan:
   - Finer grain NV-DDR configuration
   - Rename the data interface register
   - Use the right DMA mask
   - Leverage additional GPIO CS
   - Ensure proper configuration for the asserted target
   - Add support for the NV-DDR interface
   - Fix a macro parameter
 * brcmnand:
   - Convert bindings to json-schema
 * OMAP:
   - Various fixes and style improvements
   - Add larger page NAND chips support
 * PL35X:
   - New driver
 * QCOM:
   - Avoid writing to obsolete register
   - Delete an unneeded bool conversion
   - Allow override of partition parser
 * Marvell:
   - Minor documentation correction
   - Add missing clk_disable_unprepare() on error in marvell_nfc_resume()
 * R852:
   - Use DEVICE_ATTR_RO() helper macro
 * MTK:
   - Remove redundant dev_err call in mtk_ecc_probe()
 * HISI504:
   - Remove redundant dev_err call in probe
 
 SPI-NAND core:
 * Light reorganisation for the introduction of a core resume handler
 * Fix double counting of ECC stats
 
 SPI-NAND manufacturer drivers:
 * Macronix:
   - Add support for serial NAND flash
 
 SPI NOR core changes:
 * Ability to dump SFDP tables via sysfs
 * Support for erasing OTP regions on Winbond and similar flashes
 * Few API doc updates and fixes
 * Locking support for MX25L12805D
 
 SPI NOR controller drivers changes:
 * Use SPI_MODE_X_MASK in nxp-spifi
 * Intel Alder Lake-M SPI serial flash support
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEE9HuaYnbmDhq/XIDIJWrqGEe9VoQFAmDcT+IACgkQJWrqGEe9
 VoT5Sgf/dt92XA5K2SYNh58KPUwemB9DtkukmniGjo9AqSQwuzHxik3ITHBbFvwP
 cSj5PAGoI+zpc+VQz+XuZF1Bsmxaqhy5c0aaJ9TZai2W6keB91in7nJPAhmAI5o2
 4zhtAZ9qKp4pOwhFqn6jTd5+l38ok50go3HB4Ibw4UlLuvbUEv11DUcXGKnaAadH
 tmXZALf65YAJVruPb4yw+cv7BVVgOPQL8C8ILtsrue7Zgya3JT1205Zbfdjo+X0v
 Kl2gh7gGh1YLqzuLLBDUiDnfLIfiu/WTnPqxtqCULR9cLG4oXybXHZe9OsrP8E+P
 T68+K8VvT5LKbGh47/OoUfLvrDguCA==
 =XVaS
 -----END PGP SIGNATURE-----

Merge tag 'mtd/for-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux

Pull MTD updates from Richard Weinberger:
 "MTD core changes:
   - Convert list_for_each to entry variant
   - Use MTD_DEVICE_ATTR_RO/RW() helper macros
   - Remove unnecessary OOM messages
   - Potential NULL dereference in mtd_otp_size()
   - Fix freeing of otp_info buffer
   - Create partname and partid debug files for child MTDs
   - tests:
      - Remove redundant assignment to err
      - Fix error return code in mtd_oobtest_init()
   - Add OTP NVMEM provider support
   - Allow specifying of_node
   - Convert sysfs sprintf/snprintf family to sysfs_emit

  Bindings changes:
   - Convert ti,am654-hbmc.txt to YAML schema
   - spi-nor: add otp property
   - Add OTP bindings
   - add YAML schema for the generic MTD bindings
   - Add brcm,trx-magic

  MTD device drivers changes:
   - Add support for microchip 48l640 EERAM
   - Remove superfluous "break"
   - sm_ftl:
      - Fix alignment of block comment
   - nftl:
      - Return -ENOMEM when kmalloc failed
   - nftlcore:
      - Remove set but rewrite variables
   - phram:
      - Fix error return code in phram_setup()
   - plat-ram:
      - Remove redundant dev_err call in platram_probe()

  MTD parsers changes:
   - Qcom:
      - Fix leaking of partition name
   - Redboot:
      - Fix style issues
      - Seek fis-index-block in the right node
   - trx:
      - Allow to use TRX parser on Mediatek SoCs
      - Allow to specify brcm, trx-magic in DT

  Raw NAND core:
   - Allow SDR timings to be nacked
   - Bring support for NV-DDR timings which involved a number of small
     preparation changes to bring new helpers, properly introduce NV-DDR
     structures, fill them, differenciate them and pick the best timing
     set.
   - Add the necessary infrastructure to parse the new gpio-cs property
     which aims at enlarging the number of available CS when a hardware
     controller is too constrained.
   - Update dead URL
   - Silence static checker warning in nand_setup_interface()
   - BBT:
      - Fix corner case in bad block table handling
   - onfi:
      - Use more recent ONFI specification wording
      - Use the BIT() macro when possible

  Raw NAND controller drivers:
   - Atmel:
      - Ensure the data interface is supported.
   - Arasan:
      - Finer grain NV-DDR configuration
      - Rename the data interface register
      - Use the right DMA mask
      - Leverage additional GPIO CS
      - Ensure proper configuration for the asserted target
      - Add support for the NV-DDR interface
      - Fix a macro parameter
   - brcmnand:
      - Convert bindings to json-schema
   - OMAP:
      - Various fixes and style improvements
      - Add larger page NAND chips support
   - PL35X:
      - New driver
   - QCOM:
      - Avoid writing to obsolete register
      - Delete an unneeded bool conversion
      - Allow override of partition parser
   - Marvell:
      - Minor documentation correction
      - Add missing clk_disable_unprepare() on error in
        marvell_nfc_resume()
   - R852:
      - Use DEVICE_ATTR_RO() helper macro
   - MTK:
      - Remove redundant dev_err call in mtk_ecc_probe()
   - HISI504:
      - Remove redundant dev_err call in probe

  SPI-NAND core:
   - Light reorganisation for the introduction of a core resume handler
   - Fix double counting of ECC stats

  SPI-NAND manufacturer drivers:
   - Macronix:
      - Add support for serial NAND flash

  SPI NOR core changes:
   - Ability to dump SFDP tables via sysfs
   - Support for erasing OTP regions on Winbond and similar flashes
   - Few API doc updates and fixes
   - Locking support for MX25L12805D

  SPI NOR controller drivers changes:
   - Use SPI_MODE_X_MASK in nxp-spifi
   - Intel Alder Lake-M SPI serial flash support"

* tag 'mtd/for-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (125 commits)
  mtd: spi-nor: remove redundant continue statement
  mtd: rawnand: omap: Add larger page NAND chips support
  mtd: rawnand: omap: Various style fixes
  mtd: rawnand: omap: Check return values
  mtd: rawnand: omap: Rename a macro
  mtd: rawnand: omap: Aggregate the HW configuration of the ELM
  mtd: rawnand: pl353: Add support for the ARM PL353 SMC NAND controller
  dt-bindings: mtd: pl353-nand: Describe this hardware controller
  MAINTAINERS: Add PL353 NAND controller entry
  mtd: rawnand: qcom: avoid writing to obsolete register
  mtd: rawnand: marvell: Minor documentation correction
  mtd: rawnand: r852: use DEVICE_ATTR_RO() helper macro
  mtd: spinand: add SPI-NAND MTD resume handler
  mtd: spinand: Add spinand_init_flash() helper
  mtd: spinand: add spinand_read_cfg() helper
  mtd: rawnand: marvell: add missing clk_disable_unprepare() on error in marvell_nfc_resume()
  mtd: rawnand: arasan: Finer grain NV-DDR configuration
  mtd: rawnand: arasan: Rename the data interface register
  mtd: rawnand: onfi: Fix endianness when reading NV-DDR values
  mtd: rawnand: arasan: Use the right DMA mask
  ...
 2021-07-05 11:21:51 -07:00
Rob Herring
972d6a7dce dt-bindings: Drop redundant minItems/maxItems 
If a property has an 'items' list, then a 'minItems' or 'maxItems' with the
same size as the list is redundant and can be dropped. Note that is DT
schema specific behavior and not standard json-schema behavior. The tooling
will fixup the final schema adding any unspecified minItems/maxItems.

This condition is partially checked with the meta-schema already, but
only if both 'minItems' and 'maxItems' are equal to the 'items' length.
An improved meta-schema is pending.

Cc: Jens Axboe <axboe@kernel.dk>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Cc: Kamal Dasu <kdasu.kdev@gmail.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Joerg Roedel <joro@8bytes.org>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Cc: Jakub Kicinski <kuba@kernel.org>
Cc: Wolfgang Grandegger <wg@grandegger.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Vivien Didelot <vivien.didelot@gmail.com>
Cc: Vladimir Oltean <olteanv@gmail.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
Cc: Lee Jones <lee.jones@linaro.org>
Cc: Ohad Ben-Cohen <ohad@wizery.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Albert Ou <aou@eecs.berkeley.edu>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Wim Van Sebroeck <wim@linux-watchdog.org>
Cc: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # for MMC
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
Acked-By: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Wolfram Sang <wsa@kernel.org> # for I2C
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20210615191543.1043414-1-robh@kernel.org
 2021-06-21 13:56:46 -06:00
Miquel Raynal
d3d0e1e857 dt-binding: memory: pl353-smc: Convert to yaml 
Convert this binding file to yaml schema.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-10-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
 2021-06-10 23:09:05 +02:00
Miquel Raynal
9af22e1169 dt-binding: memory: pl353-smc: Fix the NAND controller node in the example 
To be fully valid, the NAND controller node in the example should be
named nand-controller instead of flash, should be at the address @0,0
instead of @e1000000 and should have a couple of:
- #address-cells
- #size-cells
properties.

The label is being renamed nfc0 as well which is more usual than nand_0.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-8-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
 2021-06-10 17:14:36 +02:00
Miquel Raynal
29c6d09f39 dt-binding: memory: pl353-smc: Drop unsupported nodes from the example 
These nodes are given as examples and are not described nor used
anywhere else. There is also no hardware of my knowledge compatible with
these yet. If we want to be backward compatible, then we should avoid
partially describing nodes and their content while there are no users.
Plus, the examples are wrong (the addresses should be updated) so
let's drop them before converting this file to yaml (only the NAND node,
which will be fixed in the example and described somewhere else is
kept).

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-7-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
 2021-06-10 17:14:36 +02:00
Miquel Raynal
540148ce34 dt-binding: memory: pl353-smc: Fix the example syntax and style 
Enhance the spacing, the comment style, add { }, remove (...).

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-6-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
 2021-06-10 17:14:36 +02:00
Miquel Raynal
6c74a55e1d dt-binding: memory: pl353-smc: Describe the child reg property 
Each chil node should have a reg property, no matter the type of
controller (NAND, NOR, SRAM). This should be part of the bindings.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-5-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
 2021-06-10 17:14:36 +02:00
Miquel Raynal
f1d19f7400 dt-binding: memory: pl353-smc: Drop the partitioning section 
This sentence does not belong to this file as this file describes the
bus on which various controllers are wired to.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-4-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
 2021-06-10 17:14:36 +02:00
Miquel Raynal
386783ea6d dt-binding: memory: pl353-smc: Document the range property 
The ranges property is missing in the description while actually used in
the example. This property is actually needed, so mention it.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-3-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
 2021-06-10 17:14:36 +02:00
Miquel Raynal
a70eb9165e dt-binding: memory: pl353-smc: Rephrase the binding 
Reword this document before converting it to yaml.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-2-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
 2021-06-10 17:14:35 +02:00
Dmitry Osipenko
de3d701837 dt-bindings: memory: tegra20: emc: Convert to schema 
Convert Tegra20 External Memory Controller binding to schema.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/20210510212320.3255-1-digetx@gmail.com
Signed-off-by: Rob Herring <robh@kernel.org>
 2021-05-11 11:27:10 -05:00