Fastmap needs next_sqnum(), rename it to ubi_next_sqnum()
and make it non-static.
Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
This patch adds fastmap specific data structures to ubi.h.
It moves also struct ubi_work to ubi.h as it is now needed
for more than one c file.
Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Add the on-flash data structures neeed by fastmap
to ubi-media.h
Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
handling. We used to reserve 2% of the partition, but now we are
more aggressive and we reserve 2% of the entire chip, which is
what actually manufacturers specify in data sheets. We introduced
an option to users to override the default, though.
There are a couple of fixes as well, and a number of cleanups.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJQauyXAAoJECmIfjd9wqK0hLAQAL1tv4BwLUi8NlUristmO7GY
qb4LvfadhYldapXQ/kw9g7DjDQduuerBaIGh7oglRG2HFtNrMD/03umTwb0P4li4
gB/YJxRlU2TdPxn6tmvldGyLUVd8DjGZBvF0l9Mzuc0pGz95UCGcWhwysTFtyxVg
AmKrW55jqSImzH0L2UkVNepV4h3vXivOLlM/SFP1bgAcVfKlj8THnNgO6cAKGuV8
q2qzWmFOakiMFzxgjpfx6QtcmyOUTSgKD+jBEmsUGbCmQmOdXpyXKwP2UugoCltF
j+MwwOsLD0J8WG6j4NPlzbPBSg8zJD2O6MQa0dCy+WG8ho0BloMfjLFv2qavcLYX
dSrWn4Df/mIuAjNqcrgC46nnnrHDQcNzqlfsD/f1tsnDvtLZ6CzEthAqPBBCU8Uq
TaF3kEKwq02JkZFAfkPEVkaFTkgBpa27EdRS+KzsRBIhsMSySC9tJOvl5QIRi9Ad
bnsgXIYZUzi36CGzUHGLeCMw6APC/smBqP/o2zQGpX0DA/WOmRgIuclpap8XSt+h
tBL4v785w8CzOCPSRRagr06wxDdu9vhd4GsTrg7dIIFrZnA0pZWWgSV8xlcjrWt9
VPw/DLvRPIV/b0BzNcA1gfDvo4GLwuY7eQRdBjYjLByKHJDXouH1p1CZcDJvQtio
qbSA1x8NNKvIy1D8gawd
=95SE
-----END PGP SIGNATURE-----
Merge tag 'upstream-3.7-rc1' of git://git.infradead.org/linux-ubi
Pull UBI changes from Artem Bityutskiy:
"The main change is the way we reserve eraseblocks for bad blocks
handling. We used to reserve 2% of the partition, but now we are more
aggressive and we reserve 2% of the entire chip, which is what
actually manufacturers specify in data sheets. We introduced an
option to users to override the default, though.
There are a couple of fixes as well, and a number of cleanups."
* tag 'upstream-3.7-rc1' of git://git.infradead.org/linux-ubi: (24 commits)
UBI: fix trivial typo 'it' => 'is'
UBI: load after mtd device drivers
UBI: print less
UBI: use pr_ helper instead of printk
UBI: comply with coding style
UBI: erase free PEB with bitflip in EC header
UBI: fix autoresize handling in R/O mode
UBI: add max_beb_per1024 to attach ioctl
UBI: allow specifying bad PEBs limit using module parameter
UBI: check max_beb_per1024 value in ubi_attach_mtd_dev
UBI: prepare for max_beb_per1024 module parameter addition
UBI: introduce MTD_PARAM_MAX_COUNT
UBI: separate bad_peb_limit in a function
arm: sam9_l9260_defconfig: correct CONFIG_MTD_UBI_BEB_LIMIT
UBI: use the whole MTD device size to get bad_peb_limit
mtd: mtdparts: introduce mtd_get_device_size
mtd: mark mtd_is_partition argument as constant
arm: sam9_l9260_defconfig: remove non-existing config option
UBI: kill CONFIG_MTD_UBI_BEB_RESERVE
UBI: limit amount of reserved eraseblocks for bad PEB handling
...
Pull workqueue changes from Tejun Heo:
"This is workqueue updates for v3.7-rc1. A lot of activities this
round including considerable API and behavior cleanups.
* delayed_work combines a timer and a work item. The handling of the
timer part has always been a bit clunky leading to confusing
cancelation API with weird corner-case behaviors. delayed_work is
updated to use new IRQ safe timer and cancelation now works as
expected.
* Another deficiency of delayed_work was lack of the counterpart of
mod_timer() which led to cancel+queue combinations or open-coded
timer+work usages. mod_delayed_work[_on]() are added.
These two delayed_work changes make delayed_work provide interface
and behave like timer which is executed with process context.
* A work item could be executed concurrently on multiple CPUs, which
is rather unintuitive and made flush_work() behavior confusing and
half-broken under certain circumstances. This problem doesn't
exist for non-reentrant workqueues. While non-reentrancy check
isn't free, the overhead is incurred only when a work item bounces
across different CPUs and even in simulated pathological scenario
the overhead isn't too high.
All workqueues are made non-reentrant. This removes the
distinction between flush_[delayed_]work() and
flush_[delayed_]_work_sync(). The former is now as strong as the
latter and the specified work item is guaranteed to have finished
execution of any previous queueing on return.
* In addition to the various bug fixes, Lai redid and simplified CPU
hotplug handling significantly.
* Joonsoo introduced system_highpri_wq and used it during CPU
hotplug.
There are two merge commits - one to pull in IRQ safe timer from
tip/timers/core and the other to pull in CPU hotplug fixes from
wq/for-3.6-fixes as Lai's hotplug restructuring depended on them."
Fixed a number of trivial conflicts, but the more interesting conflicts
were silent ones where the deprecated interfaces had been used by new
code in the merge window, and thus didn't cause any real data conflicts.
Tejun pointed out a few of them, I fixed a couple more.
* 'for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/wq: (46 commits)
workqueue: remove spurious WARN_ON_ONCE(in_irq()) from try_to_grab_pending()
workqueue: use cwq_set_max_active() helper for workqueue_set_max_active()
workqueue: introduce cwq_set_max_active() helper for thaw_workqueues()
workqueue: remove @delayed from cwq_dec_nr_in_flight()
workqueue: fix possible stall on try_to_grab_pending() of a delayed work item
workqueue: use hotcpu_notifier() for workqueue_cpu_down_callback()
workqueue: use __cpuinit instead of __devinit for cpu callbacks
workqueue: rename manager_mutex to assoc_mutex
workqueue: WORKER_REBIND is no longer necessary for idle rebinding
workqueue: WORKER_REBIND is no longer necessary for busy rebinding
workqueue: reimplement idle worker rebinding
workqueue: deprecate __cancel_delayed_work()
workqueue: reimplement cancel_delayed_work() using try_to_grab_pending()
workqueue: use mod_delayed_work() instead of __cancel + queue
workqueue: use irqsafe timer for delayed_work
workqueue: clean up delayed_work initializers and add missing one
workqueue: make deferrable delayed_work initializer names consistent
workqueue: cosmetic whitespace updates for macro definitions
workqueue: deprecate system_nrt[_freezable]_wq
workqueue: deprecate flush[_delayed]_work_sync()
...
This is a pretty significant branch. It's the introduction of the
first multiplatform support on ARM, and with this (and the later
branch) merged, it is now possible to build one kernel that contains
support for highbank, vexpress, mvebu, socfpga, and picoxcell. More
platforms will be convered over in the next few releases.
Two critical last things had to be done for this to be practical and
possible:
* Today each platform has its own include directory under
mach-<mach>/include/mach/*, and traditionally that is where a lot of
driver/platform shared definitions have gone, such as platform data
structures. They now need to move out to a common location instead,
and this branch moves a large number of those out to
include/linux/platform_data.
* Each platform used to list the device trees to compile for its
boards in mach-<mach>/Makefile.boot.
Both of the above changes will mean that there are some merge
conflicts to come (and some to resolve here). It's a one-time move and
once it settles in, we should be good for quite a while. Sorry for the
overhead.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJQaO7aAAoJEIwa5zzehBx3bUIP/02U8PhkHJJrrowyIsWRBOql
7LPJ53PRRgrpBdmEGzFD3TO3zaNyrjQRbYgNDvzHMO6NAMNvdRFouuWYjO11/tuB
i32zssXCC+eUOEgbAo/U/lYq+UOvqw9gv6mU+3+i3OcGEhdKOaoT/DSLPQC4hoDm
222TeLfFB3HJXu5n720dEQ9V3fO6TS1+bbh8TU3cjHqzceXsOrffZqOA5CQxUcRr
KWwOjA0nALDwWcqgv45GJNwY3GTyAQ/hPMQavnuWK0voJ+qUYk5HftKocAK7C+py
0T0OFOAHTwtyhvzJBxLC84M6Ox465BYXyeNjIB+2nG/Um9+mDoP0dnWpGy4c7DMU
P5hyqbeLGeqjUXQuYtRmgMMc3UeHKoUGAfXW9eMsjLa6/M4NLGv//7E7LbZPpgMZ
obkjwuesmcaYn/FRyj/yFmC35YlF4oCLziVzEtURZw3eKHHSUlhkTDSMNnkcZ0kZ
Vv7kFxnD2Y46ixiwSJv30ErQnVkgI3MdqDlDxkE8r5+phYuK4gCrNaJtiwRh/oNw
cFhpPxKuA0sJ9b6YRTzjC45eT/XZomEEr/uifCFeRNaCquyjYP00Mm8F0flSqwx9
zi+emzPAwNmk1bvxMUM/idGnaj0V4p+BAYUAvkbSoqU1p1flzyhU88fGTSIyKOt6
K5TCDS2v5hrVykK9TDwl
=Tc6y
-----END PGP SIGNATURE-----
Merge tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM soc multiplatform enablement from Olof Johansson:
"This is a pretty significant branch. It's the introduction of the
first multiplatform support on ARM, and with this (and the later
branch) merged, it is now possible to build one kernel that contains
support for highbank, vexpress, mvebu, socfpga, and picoxcell. More
platforms will be convered over in the next few releases.
Two critical last things had to be done for this to be practical and
possible:
* Today each platform has its own include directory under
mach-<mach>/include/mach/*, and traditionally that is where a lot
of driver/platform shared definitions have gone, such as platform
data structures. They now need to move out to a common location
instead, and this branch moves a large number of those out to
include/linux/platform_data.
* Each platform used to list the device trees to compile for its
boards in mach-<mach>/Makefile.boot.
Both of the above changes will mean that there are some merge
conflicts to come (and some to resolve here). It's a one-time move
and once it settles in, we should be good for quite a while. Sorry
for the overhead."
Fix conflicts as per Olof.
* tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (51 commits)
ARM: add v7 multi-platform defconfig
ARM: msm: Move core.h contents into common.h
ARM: highbank: call highbank_pm_init from .init_machine
ARM: dtb: move all dtb targets to common Makefile
ARM: spear: move platform_data definitions
ARM: samsung: move platform_data definitions
ARM: orion: move platform_data definitions
ARM: vexpress: convert to multi-platform
ARM: initial multiplatform support
ARM: mvebu: move armada-370-xp.h in mach dir
ARM: vexpress: remove dependency on mach/* headers
ARM: picoxcell: remove dependency on mach/* headers
ARM: move all dtb targets out of Makefile.boot
ARM: picoxcell: move debug macros to include/debug
ARM: socfpga: move debug macros to include/debug
ARM: mvebu: move debug macros to include/debug
ARM: vexpress: move debug macros to include/debug
ARM: highbank: move debug macros to include/debug
ARM: move debug macros to common location
ARM: make mach/gpio.h headers optional
...
- A long-coming conversion of various platforms to a common LED
infrastructure
- AT91 is moved over to use the newer MCI driver for MMC
- Pincontrol conversions for samsung platforms
- DT bindings for gscaler on samsung
- i2c driver fixes for tegra, acked by i2c maintainer
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJQaO48AAoJEIwa5zzehBx3excP/ieEkRhvfnWxdYST6ekvGIQr
nEyskOh2rVjgYKmSXUJyKSbvG+7bZ8VIxvPvojeAJ/R84pTFMzbR2F0CaPKzAuSW
inDt6c0Bnx1NZlfUTAoXcz7feyq9zHYNs9BCLoPU0bYNchCCqcWSKzqnpXk2ph/P
LFnmNa0j6a4E3QJYAjM2zFvc3Tgk+MWTq1fWwNFvsWTh2WbQtmB/iGnzT5Xs4XQh
u1SSx5tz0lcF5zQRGmJhXgL5+nnIP4sRwRUBAkpe3Gv5cM6WBVEBRDANa5QpbUL2
RXK5YyCTIln2Me4bPk32zEBLjiZ/WXbmiA2uwoqVgy6XToubemDXd0PtKmjj5tZ1
BkTD1DND7BKBEQnJj/GBECEdvx2FbrKfruoPcJHvXPZ7Svn5Dt/MWYJQIkRFkuhL
zlVNoDGWlU8nScGrgmTM56UvWmGWC3UFsWSgdVQNfW9yEva+G1FvRUwUH02Ip5Ad
4r28JFIn6zyjtM99ZHipU6C6Rze2ordC7fl5X5LBLkVOobioblxCAhIhcqkhfKsk
rFriNsdfYs7SrJA7mK7GzvaMEJgp/5o1noJKXI7ZBcLI8yYagzbQbPu/vGi6G6d3
0xC7NaTEJbtoXoDAtmtilLRxmw0YCXgVBBGua0K2YKpcRwnzCHNbV4gsLMnDuOXS
HP4M96LxLHJlLGCxhEme
=ck7M
-----END PGP SIGNATURE-----
Merge tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM soc driver specific changes from Olof Johansson:
- A long-coming conversion of various platforms to a common LED
infrastructure
- AT91 is moved over to use the newer MCI driver for MMC
- Pincontrol conversions for samsung platforms
- DT bindings for gscaler on samsung
- i2c driver fixes for tegra, acked by i2c maintainer
Fix up conflicts as per Olof.
* tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits)
drivers: bus: omap_l3: use resources instead of hardcoded irqs
pinctrl: exynos: Fix wakeup IRQ domain registration check
pinctrl: samsung: Uninline samsung_pinctrl_get_soc_data
pinctrl: exynos: Correct the detection of wakeup-eint node
pinctrl: exynos: Mark exynos_irq_demux_eint as inline
pinctrl: exynos: Handle only unmasked wakeup interrupts
pinctrl: exynos: Fix typos in gpio/wkup _irq_mask
pinctrl: exynos: Set pin function to EINT in irq_set_type of GPIO EINTa
drivers: bus: Move the OMAP interconnect driver to drivers/bus/
i2c: tegra: dynamically control fast clk
i2c: tegra: I2_M_NOSTART functionality not supported in Tegra20
ARM: tegra: clock: remove unused clock entry for i2c
ARM: tegra: clock: add connection name in i2c clock entry
i2c: tegra: pass proper name for getting clock
ARM: tegra: clock: add i2c fast clock entry in clock table
ARM: EXYNOS: Adds G-Scaler device from Device Tree
ARM: EXYNOS: Add clock support for G-Scaler
ARM: EXYNOS: Enable pinctrl driver support for EXYNOS4 device tree enabled platform
ARM: dts: Add pinctrl node entries for SAMSUNG EXYNOS4210 SoC
ARM: EXYNOS: skip wakeup interrupt setup if pinctrl driver is used
...
Device tree conversion and enablement branch. Mostly a bunch of new
bindings and setup for various platforms, but the Via/Winchip VT8500
platform is also converted over from being 100% legacy to now use
device tree for probing. More of that will come for 3.8.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJQaiKNAAoJEIwa5zzehBx329AP/1TwJk1dTHaAA7vDxyz2mq1E
F0MBL9p32R1SczrFGjbmb9ouVW5tTjbK1zted5zBrGBXDIX9Kdz3Dmm7x6b2/JvZ
8yMrdiBNpF3r8au6IaMuMlOq5yAaN+F4SxbC2rE0a9y3YmMZ6ug5dgoZ4O8orAC4
il3eq1sb+rTTPCf7C5cGlKzdRQi2KYdAycpa7ChQCYSamxJjdM7cXR7pohVv9vhd
9sF+h1I0ArxcVYn/mUOoCin8MyIWXlBQvbUnF+3aYO8CO9erhKH/owPngVBWGKZH
+X6dk0ChUJfjzaWr2HPZIYUqLUnIoO8TsRhQVmLp1rPrSzSXMG3iDq0M4WEwL4Xo
bMbAZ1KWYg53HRqbIOEQk5q9Mg7HUgtbJuOE7WLgBO5ubdKFFWLmDUJ+WVcoWzSW
qyWaWpECSptlQjFyqZJd9MjizIDhuYjog2EWaSWXETQ+1XRmCSsqx8AX6n1MVdhP
6jDLnYHYiJoOtGiaDpYxsXgMXdOVsrTegecNduqH/XhdEL1iwy3fwgK1DjoclYoj
iFbn0/Tw3N5SvJlG4xitl12DQ7MeCCbfzJGRKenVh9/O4U+qrTbFRmsNaaZw5dA1
bt+iEZ3aU8YBaKj02LexunAevpZJ2rfGNX2tBjQrIzzZK6CZibPWg42qfKJfdn7w
etXVVApw5jQjAImY64kh
=q7ZY
-----END PGP SIGNATURE-----
Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM soc device tree updates from Olof Johansson:
"Device tree conversion and enablement branch. Mostly a bunch of new
bindings and setup for various platforms, but the Via/Winchip VT8500
platform is also converted over from being 100% legacy to now use
device tree for probing. More of that will come for 3.8."
Trivial conflicts due to removal of vt8500 files, and one documentation
file that was added with slightly different contents both here and in
the USb tree.
* tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (212 commits)
arm: vt8500: Fixup for missing gpio.h
ARM: LPC32xx: LED fix in PHY3250 DTS file
ARM: dt: mmp-dma: add binding file
arm: vt8500: Update arch-vt8500 to devicetree support.
arm: vt8500: gpio: Devicetree support for arch-vt8500
arm: vt8500: doc: Add device tree bindings for arch-vt8500 devices
arm: vt8500: clk: Add Common Clock Framework support
video: vt8500: Add devicetree support for vt8500-fb and wm8505-fb
serial: vt8500: Add devicetree support for vt8500-serial
rtc: vt8500: Add devicetree support for vt8500-rtc
arm: vt8500: Add device tree files for VIA/Wondermedia SoC's
ARM: tegra: Add Avionic Design Tamonten Evaluation Carrier support
ARM: tegra: Add Avionic Design Medcom-Wide support
ARM: tegra: Add Avionic Design Plutux support
ARM: tegra: Add Avionic Design Tamonten support
ARM: tegra: dts: Add pwm label
ARM: ux500: Fix SSP register address format
ARM: ux500: Apply tc3589x's GPIO/IRQ properties to HREF's DT
ARM: ux500: Remove redundant #gpio-cell properties from Snowball DT
ARM: ux500: Add all encompassing sound node to the HREF Device Tree
...
This is a large branch that contains a handful of different cleanups:
- Fixing up the I/O space remapping on PCI on ARM. This is a series
from Rob Herring that restructures how all pci devices allocate I/O
space, and it's part of the work to allow multiplatform kernels.
- A number of cleanup series for OMAP, moving and removing some
headers, sparse irq rework and in general preparation for
multiplatform.
- Final removal of all non-DT boards for Tegra, it is now
device-tree-only!
- Removal of a stale platform, nxp4008. It's an old mobile chipset
that is no longer in use, and was very likely never really used with
a mainline kernel. We have not been able to find anyone interested
in keeping it around in the kernel.
- Removal of the legacy dmaengine driver on tegra
+ A handful of other things that I haven't described above.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJQaO1fAAoJEIwa5zzehBx3IPgP/jxoO1flVGNVf0reqqyDro/w
prZmp8cNVH9uv8xG9n9vawObrMQ8M6jCJ449fEWuAZ58EXrpIPd0kkm/MOmxp8K1
LNs+q2aXxWpD488+b3RK55g3fksqZutTbn3y6HNuCoLG9l8yT/95KX4IIzfEP2Ch
1TCNHdkTbf37nTBOmKN0x1kahGpWDrOkf9ysHQq+DXAGF4uwNwtR194dqz3HbDND
hZqRq7qCLn9OwGRGNicPFoB6UcxwZ/+/+u5sX7nqPGoiPofg977mhWk1DFO15EM3
S+A6g0dZ+XLsL+fFtOl4snSmrG5Et6qTOP0/ItQJgTG+5YdCS09ohCWJwRCBHbgj
M5arOkyGFdVAlvX7cUux374sMe0AcqUsEmt79mYuBpIE+pBJaRUoCgDcs9FDZeUB
U6WcE4AkxMtW7DtmVW+mF4ls9/K6cRXgWMuHCUmt1o3m3Ly9ITT7j+ntXnD9nuYk
ndoVLR6Vxk2BzlkD0JEtg7FRAS9Wgo2DBix05qM1Qkut2iIZRhFQlqJQpNbeNdii
/3Lg/hqpAVTZKGCd+paegHez61meyFz2PB2IiE0JKANhKHRCWTWRGgKIXkGyCiXk
wJ2iRCOlMEpmpJgCBzfI32ER/hnW4s64iDjgksEwz6pEt7xCbhwgmwrpf0H0KsSF
rLroHOMqyISd/Ha52Vin
=ck1u
-----END PGP SIGNATURE-----
Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM soc general cleanups from Olof Johansson:
"This is a large branch that contains a handful of different cleanups:
- Fixing up the I/O space remapping on PCI on ARM. This is a series
from Rob Herring that restructures how all pci devices allocate I/O
space, and it's part of the work to allow multiplatform kernels.
- A number of cleanup series for OMAP, moving and removing some
headers, sparse irq rework and in general preparation for
multiplatform.
- Final removal of all non-DT boards for Tegra, it is now
device-tree-only!
- Removal of a stale platform, nxp4008. It's an old mobile chipset
that is no longer in use, and was very likely never really used
with a mainline kernel. We have not been able to find anyone
interested in keeping it around in the kernel.
- Removal of the legacy dmaengine driver on tegra
+ A handful of other things that I haven't described above."
Fix up some conflicts with the staging tree (and because nxp4008 was
removed)
* tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (184 commits)
ARM: OMAP2+: serial: Change MAX_HSUART_PORTS to 6
ARM: OMAP4: twl-common: Support for additional devices on i2c1 bus
ARM: mmp: using for_each_set_bit to simplify the code
ARM: tegra: harmony: fix ldo7 regulator-name
ARM: OMAP2+: Make omap4-keypad.h local
ARM: OMAP2+: Make l4_3xxx.h local
ARM: OMAP2+: Make l4_2xxx.h local
ARM: OMAP2+: Make l3_3xxx.h local
ARM: OMAP2+: Make l3_2xxx.h local
ARM: OMAP1: Move irda.h from plat to mach
ARM: OMAP2+: Make hdq1w.h local
ARM: OMAP2+: Make gpmc-smsc911x.h local
ARM: OMAP2+: Make gpmc-smc91x.h local
ARM: OMAP1: Move flash.h from plat to mach
ARM: OMAP2+: Make debug-devices.h local
ARM: OMAP1: Move board-voiceblue.h from plat to mach
ARM: OMAP1: Move board-sx1.h from plat to mach
ARM: OMAP2+: Make omap-wakeupgen.h local
ARM: OMAP2+: Make omap-secure.h local
ARM: OMAP2+: Make ctrl_module_wkup_44xx.h local
...
Datasheets for the following Samsung NAND parts (both MLC and SLC) describe
extensions to the Samsung 6-byte extended ID decoding table:
K9GBG08U0A (MLC, 6-byte ID)
K9GAG08U0F (MLC, 6-byte ID)
K9FAG08U0M (SLC, 6-byte ID)
The table found in K9GAG08U0F, p.44, contains a superset of the information
found in other previous datasheets.
This patch adds support for all of these chips, with 512B and 640B OOB sizes.
It also changes the detection pattern such that this table applies to all
Samsung 6-byte ID NAND, not just MLC. This is safe, according to the NAND
parameter data I have collected:
Note that nand_base.c does not yet support the bad block marker scheme defined
for these chips (i.e., scan 1st and last page for BB markers).
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Hynix has introduced a new ID decoding scheme for their newer MLC, some of
which don't support ONFI. The following devices all follow the pattern given in
the datasheet for Hynix H27UBG8T2B, p.22:
Hynix H27UAG8T2A
Hynix H27UBG8T2A
Hynix H27UBG8T2B
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
When decoding the extended ID bytes of a NAND chip, we have to calculate the ID
length according to some heuristic patterns (e.g., Does the ID wrap around?
Does it end in trailing zeros?). Currently, these heuristics are built into
complicated if/else blocks that can be hard to understand.
Now, these checks can be done generically in a function, making them more
robust and reusable. In fact, this sort of calculation is needed in future
additions to nand_base.c. And with this advancement, we get the added benefit
of a more readable "extended ID decode".
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
When detecting NAND parameters, the code gets a little ugly so that the
logic is obscured. Try to remedy that by moving code to separate functions
that have well-defined purposes.
This patch splits out the simple ID decode functionality, where all the
information regarding NAND size/blocksize/pagesize/oobsize/busw is encoded in
the first two bytes of the ID string.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
When detecting NAND parameters, the code gets a little ugly so that the
logic is obscured. Try to remedy that by moving code to separate functions
that have well-defined purposes.
This patch splits out the extended ID decode functionality, which handles
decoding the 3rd-8th ID bytes to determine NAND device parameters.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
When detecting NAND parameters, the code gets a little ugly so that the
logic is obscured. Try to remedy that by moving code to separate functions
that have well-defined purposes.
This patch splits the bad block marker options detection into its own function,
away from the other parameters (e.g., chip size, page size, etc.).
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Instead of reading 2 bytes then later 8 bytes, we can simply read all 8
bytes from the start.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
We don't actually use the 'ret' variable; we set it, test it, and then it dies.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
While building an allyesconfig for UML I received this error message(s):
drivers/mtd/nand/docg4.c: In function 'probe_docg4':
drivers/mtd/nand/docg4.c:1272:2: error: implicit declaration of function
'ioremap' [-Werror=implicit-function-declaration]
drivers/mtd/nand/docg4.c:1272:10: warning: assignment makes pointer from
integer without a cast [enabled by default]
drivers/mtd/nand/docg4.c:1327:2: error: implicit declaration of function
'iounmap' [-Werror=implicit-function-declaration]
which is caused by the missing implementations on UML.
This patch adds this missing HAS_IOMEM dependency and prevents the driver from
being build on platforms with no HAS_IOMEM
Signed-off-by: Peter Huewe <peterhuewe@gmx.de>
Acked-by: Mike Dunn <mikedunn@newsguy.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
The current code initializes the timing registers at very time
we call the gpmi_begin(). This really wastes the cpu cycles.
Add a new flag to let the gpmi driver initializes the timing registers
only one time.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
When the frequency on the nand chip pins is above 33MHz,
the nand EDO(extended Data Out) timing could be applied.
The GPMI implements a Feedback read strobe to sample the read data in
the EDO timing mode.
This patch adds the EDO feature for the gpmi-nand driver.
For some onfi nand chips, the mode 4 is the fastest;
while for other onfi nand chips, the mode 5 is the fastest.
This patch only adds the support for the fastest asynchronous timing mode.
So this patch only supports the mode 4 and mode 5.
I tested several Micron's ONFI nand chips with EDO enabled,
take Micron MT29F32G08MAA for example (in mode 5, 100MHz):
1) The test result BEFORE we add the EDO feature:
=================================================
mtd_speedtest: MTD device: 2
mtd_speedtest: MTD device size 209715200, eraseblock size 524288,
page size 4096, count of eraseblocks 400,
pages per eraseblock 128, OOB size 218
.......................................
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 3632 KiB/s
.......................................
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 3554 KiB/s
.......................................
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 3592 KiB/s
.......................................
=================================================
2) The test result AFTER we add the EDO feature:
=================================================
mtd_speedtest: MTD device: 2
mtd_speedtest: MTD device size 209715200, eraseblock size 524288,
page size 4096, count of eraseblocks 400,
pages per eraseblock 128, OOB size 218
.......................................
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 19555 KiB/s
.......................................
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 17319 KiB/s
.......................................
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 18339 KiB/s
.......................................
=================================================
3) The read data performance is much improved by more then 5 times.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
The default frequencies of the extra clocks are 200MHz.
The current code sets the extra clocks to 44.5MHz.
When i add the EDO feature to gpmi, i have to revert the extra clocks
to 200MHz.
So it is better that we do not set the default values for the extra
clocks. The driver runs well even when we do not set the default values for
extra clocks.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
The setting DLL code is a little mess.
Just simplify the code and the comments.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
add the WRN_DLY_SEL field for HW_GPMI_CTRL1.
This field is used as delay for gpmi write strobe.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
The current code will gets the clock frequency which is used by
gpmi_nfc_compute_hardware_timing(). It makes the code a little mess.
So move the `get clock frequency` code to the
gpmi_nfc_compute_hardware_timing() itself. This makes the code tidy
and clean.
This patch also uses the macro NSEC_PER_SEC to replace the `1000000000`.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
The gpmi_nfc_compute_hardware_timing{} should contains all the
fields setting for gpmi timing registers. It already contains the fields
for HW_GPMI_TIMING0 and HW_GPMI_CTRL1.
So it is better to add a new field setting for HW_GPMI_TIMING1 in
this data structure. This makes the code more clear in logic.
This patch also changes some comments to make the code more readable.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Add the set-features(0xef)/get-features(0xee) helpers for ONFI nand.
Also add the necessary macros.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
If override size is too big, the module was actually loaded instead of
failing, because retval was not set.
This lead to memory corruption with the use of the freed structs nandsim
and nand_chip.
Cc: stable@vger.kernel.org
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Currently the docg4's ecc.read_page() method returns -EBADMSG when
uncorrectable bitflips occur. This is wrong; 0 should be returned in
this case. An error code should only be returned by this method in the
case of a hardware error (probably -EIO).
Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
In nand_bbt.c, a hardcoded value was used instead of the define meant
for that, so we use the define.
There's no functional change.
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This driver is being removed as part of the cleanup of the bcmring
SoC from mainline as it is no longer maintained.
Signed-off-by: Christian Daudt <csd@broadcom.com>
Reviewed-by: Jiandong Zheng <jdzheng@broadcom.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
As a first step towards migrating davinci platforms to use common clock
framework, replace all instances of clk_enable() with clk_prepare_enable()
and clk_disable() with clk_disable_unprepare(). Until the platform is
switched to use the CONFIG_HAVE_CLK_PREPARE Kconfig variable, this just
adds a might_sleep() call and would work without any issues.
This will make it easy later to switch to common clk based implementation
of clk driver from DaVinci specific driver.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This adds the double bit error detection test cases listed below:
* Prepare data block with double bit error and ECC data without
corruption, and verify that the uncorrectable error is detected by
__nand_correct_data().
* Prepare data block with single bit error and ECC data with single bit
error, and verify that the uncorrectable error is detected.
* Prepare data block without corruption and ECC data with double bit
error, and verify that the uncorrectable error is detected.
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This adds the single bit error correction test case listed below:
Prepare data block without corruption and ECC data with single bit error,
and verify that the data block is preserved by __nand_correct_data().
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This adds no corruptin test case listed below:
Prepare data block and ECC data with no corruption, and verify that
the data block is preserved by __nand_correct_data()
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This rewrites the entire test routine in order to make it easy to add more
tests by later changes and minimize duplication of each tests as much as
possible.
Now that each test is described by the members of struct nand_ecc_test:
- name: descriptive testname
- prepare: function to prepare data block and ecc with artifical corruption
- verify: function to verify the result of correcting data block
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Currently inject_single_bit_error() is used to inject single bit error
into randomly selected bit position of the 256 or 512 bytes data block.
Later change will add tests which inject bit errors into the ecc code.
Unfortunately, inject_single_bit_error() doesn't work for the ecc code
which is not a multiple of sizeof(unsigned long).
Because bit fliping at random position is done by __change_bit().
For example, flipping bit position 0 by __change_bit(0, addr) modifies
3rd byte (32bit) or 7th byte (64bit) on big-endian systems.
Using little-endian version of bitops can fix this issue. But
little-endian version of __change_bit is not yet available.
So this defines __change_bit_le() locally in a similar fashion to
asm-generic/bitops/le.h and use it.
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This tests ECC biterror recovery on a single NAND page. Mostly intended
to test ECC hardware and low-level NAND driver.
There are two test modes:
0 - artificially inserting bit errors until the ECC fails
This is the default method and fairly quick. It should
be independent of the quality of the FLASH.
1 - re-writing the same pattern repeatedly until the ECC fails.
This method relies on the physics of NAND FLASH to eventually
generate '0' bits if '1' has been written sufficient times. Depending
on the NAND, the first bit errors will appear after 1000 or
more writes and then will usually snowball, reaching the limits
of the ECC quickly.
The test stops after 10000 cycles, should your FLASH be exceptionally
good and not generate bit errors before that. Try a different page
offset in that case.
Please note that neither of these tests will significantly 'use up' any FLASH
endurance. Only a maximum of two erase operations will be performed.
Signed-off-by: Iwo Mergler <Iwo.Mergler@netcommwireless.com.au>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Huang Shijie <shijie8@gmail.com> explains:
Assume we have a 1GiB(8Gib) NAND chip, and we set the partitions
in the command line like this:
#gpmi-nand:100m(boot),100m(kernel),1g(rootfs)
In this case, the partition truncating occurs. The current code will
get the following result:
----------------------------------
root@freescale ~$ cat /proc/mtd
dev: size erasesize name
mtd0: 06400000 00040000 "boot"
mtd1: 06400000 00040000 "kernel"
----------------------------------
It is obvious that we lost the truncated partition `rootfs` which should
be 824MiB in this case.
Also, forbid 0-sized partitions.
Signed-off-by: Shmulik Ladkani <shmulik.ladkani@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
With the new i.mx clock framework the mxc_nand clock is registered as:
clk_register_clkdev(clk[nfc_gate], NULL, "mxc_nand");0")
So we do not need to pass "nfc" string and can use NULL instead.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Using module_platform_driver() makes the code smaller and cleaner.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Using module_platform_driver() makes the code smaller and cleaner.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Quoting from the datasheet for S25FL064P, rev. 05, Nov 18 2011, § 9.17:
"A 64 kB[sic] sector erase (D8h) command issued on 4 kB or 8 kB erase
sectors will erase all sectors in the specified 64 kB region. However,
please note that a 4 kB sector erase (20h) or 8 kB sector erase (40h)
command will not work on a 64 kB sector."
Referring further to Table 8.1 and Table 8.2, it is clearly seen
that most of the sectors are 64KiB; therefore disable this 4KiB
erase support since it's valid only on first/last sectors.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This registers MTD driver for serial flash platform device. Right now it
supports reading only, writing still has to be implemented.
Artem: minor amendments.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Currently the data blocks which is used to test single bit error
correction is allocated statically and injecting single bit error is
implemented by using __change_bit() which must operate on the memory
aligned to the size of an "unsigned long". But there is no such
guarantee for statically allocated array.
This fix the issue by allocating the data block dynamically by
kmalloc(). It also allocate the ecc code dynamically instead of
allocating statically on stack.
The reason to allocate the ecc code dynamically is that later change
will add tests which inject bit errors into the ecc code by bitops.
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This includes the message related changes:
- Use pr_* instead of printk
- Print hexdump of ECC code if test fails
- Change log level for hexdump of data from KERN_DEBUG to KERN_INFO
- Factor out the hexdump code into a separate function
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Return -EINVAL instead of -1 (-EPERM) when test fails.
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Including linux/jiffies.h was required for calling srandom32(jiffies)
that has already been removed.
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
devm free functions should not have to be explicitly used.
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Clean-up the driver a bit to make it easier to read and amend the coding style.
Mostly these are changes like:
if (a)
{
}
=>
if (a) {
}
Some extra blank lines were added.
Indentation was changed to use tabs instead of spaces.
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This patch revises and fixes error handling in the command line mtd
partitions parser. Namely:
1. we ignored return code of 'mtdpart_setup_real()'.
2. instead of returning 0 for failure and 1 for success, teach
'mtdpart_setup_real()' to return real error codes.
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This driver provides parser detecting partitions on BCM47XX flash
memories. It has many differences in comparison to BCM63XX, like:
1) Different CFE with no more trivial MAGICs
2) More partitions types (board_data, ML, POT)
3) Supporting more than 1 flash on a device
which resulted in decision of writing new parser.
It uses generic mtd interface and was successfully tested with Netgear
WNDR4500 router which has 2 flash memories: serial one and NAND one.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
We do not have to initialize variables for .bss to 0 in Linux.
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Unloading the omap2 nand driver missed to release the memory region which will
result in not being able to request it again if one want to load the driver
later on.
This patch fixes following error when loading omap2 module after unloading:
---8<---
~ $ rmmod omap2
~ $ modprobe omap2
[ 37.420928] omap2-nand: probe of omap2-nand.0 failed with error -16
~ $
--->8---
This error was introduced in 67ce04bf27 which
was the first commit of this driver.
Signed-off-by: Andreas Bießmann <andreas@biessmann.de>
Cc: stable@vger.kernel.org
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Unlocking may take up to 1.4 seconds on some Intel flashes. So
lets use a max. of 1.5 seconds (1500ms) as timeout.
See "Clear Block Lock-Bits Time" on page 40 in
"3 Volt Intel StrataFlash Memory" 28F128J3,28F640J3,28F320J3 manual
from February 2003
This patch also fixes some other problems with this timeout:
- Don't use HZ in timeout "calculation"!
While testing we noticed that an unlocking timeout occured with
HZ=1000 and didn't occur with HZ=300. This was because the
timeout parameter was calculated differently depending on the
HZ value. Now a fixed value of 1500ms is used.
- The last parameter of WAIT_TIMEOUT (defined to
inval_cache_and_wait_for_operation) has to be passed in
micro-seconds. So multiply the ms value with 1000 and not 100
to calculate this value.
- Use variable name "mdelay" instead of misleading "udelay".
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Stephan Gatzka <stephan@gatzka.org>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Added a NAND device flag for subpage read support. Previously this was
hard coded based on large page and soft ECC.
Updated base NAND driver to use the new subpage read flag if the NAND is
large page and soft ECC.
Signed-off-by: Jeff Westfahl <jeff.westfahl@ni.com>
Reviewed-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Commit abcda1dc ('arm: plat-orion: introduce PLAT_ORION_LEGACY hidden
config option') currently pending in linux-next will make the ARCH_MVEBU
platform select PLAT_ORION, which means that now all Orion drivers can
be enabled on ARCH_MVEBU. This works fine for most drivers, except for
orion_nand, because it includes <mach/hardware.h>, but mach-mvebu does
not have a mach/hardware.h header (it is considered as a deprecated
practice).
It turns out that the <mach/hardware.h> include in orion_nand is not
necessary: the driver builds perfectly fine without it, so we simply
get rid of it.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Return an error code if test fails in order to detect a test case failure
by invoking tests repeatedly like this:
while sudo modprobe mtd_nandecctest; do
sudo modprobe -r mtd_nandecctest
done
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
It is unnecessary for this driver to call srandom32() in module_init.
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
The LPC32xx's DT-only conversion of the MLC NAND driver makes NAND config via
platform_data obsolete. Dropped by this patch.
Further, the driver really needs CONFIG_OF, which is already reflected by the
dependency on ARCH_LPC32XX which depends on CONFIG_OF. So also dropping
CONFIG_OF ifdefs.
There is still platform_data necessary to supply the dma_filter callback for
the dma engine. This is a completely different data structure than the old
platform_data for NAND config, so renaming some old "pdata" variable to "ncfg"
to prevent confusion with the new platform data.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
The LPC32xx's DT-only conversion of the SLC NAND driver makes NAND config via
platform_data obsolete. Dropped by this patch.
Further, the driver really needs CONFIG_OF, which is already reflected by the
dependency on ARCH_LPC32XX which depends on CONFIG_OF. So also dropping
CONFIG_OF ifdefs.
There is still platform_data necessary to supply the dma_filter callback for
the dma engine. This is a completely different data structure than the old
platform_data for NAND config, so renaming some old "pdata" variable to "ncfg"
to prevent confusion with the new platform data.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Allow MTD_NAND_GPMI_NAND to be built as module.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
When building MTD_NAND_GPMI_NAND as module, the following error shows up:
ERROR: "nand_update_bbt" [drivers/mtd/nand/gpmi-nand/gpmi_nand.ko] undefined!
Export nand_update_bbt to fix it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Rename 'len' variable of create_bbt/scan_block_fast/scan_block_full to
'numpages', since it really means number of pages to scan when
searching for the BBM (and not the byte length of the scan).
Signed-off-by: Shmulik Ladkani <shmulik.ladkani@gmail.com>
Reviewed-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Fixes the following warnings:
‘s3c2410_nand_correct_data’ defined but not used [-Wunused-function]
‘s3c2410_nand_enable_hwecc’ defined but not used [-Wunused-function]
‘s3c2412_nand_enable_hwecc’ defined but not used [-Wunused-function]
‘s3c2440_nand_enable_hwecc’ defined but not used [-Wunused-function]
‘s3c2410_nand_calculate_ecc’ defined but not used [-Wunused-function]
‘s3c2412_nand_calculate_ecc’ defined but not used [-Wunused-function]
‘s3c2440_nand_calculate_ecc’ defined but not used [-Wunused-function]
The above functions are called only when CONFIG_MTD_NAND_S3C2410_HWECC
is defined. Thus making them conditional.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
devm_* functions are device managed functions and make cleanup code
simpler and smaller.
devm_kzalloc, devm_clk_get and devm_request_and_ioremap functions
are used.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Err has only been initialized to 0 at this, so it is not possible that this
test can be true.
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
We may cause a memory leak when the @types has more then one parser.
Take the `default_mtd_part_types` for example. The default_mtd_part_types has
two parsers now: `cmdlinepart` and `ofpart`.
Assume the following case:
The kernel command line sets the partitions like:
#gpmi-nand:20m(boot),20m(kernel),1g(rootfs),-(user)
But the devicetree file(such as arch/arm/boot/dts/imx28-evk.dts) also sets
the same partitions as the kernel command line does.
In the current code, the partitions parsed out by the `ofpart` will
overwrite the @pparts which has already set by the `cmdlinepart` parser,
and the the partitions parsed out by the `cmdlinepart` is missed.
A memory leak occurs.
So we should break the code as soon as we parse out the partitions,
In actually, this patch makes a priority order between the parsers.
If one parser has already parsed out the partitions successfully,
it's no need to use another parser anymore.
Signed-off-by: Huang Shijie <shijie8@gmail.com>
Cc: stable@vger.kernel.org
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
On some platforms (e.g. MPC5200) a direct 1:1 mapping may cause
problems with JFFS2 usage, as the local bus (LPB) doesn't support
unaligned accesses as implemented in the JFFS2 code via memcpy().
By defining "no-unaligned-direct-access", the flash will not be
exposed directly to the MTD users (e.g. JFFS2) any more.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Use devm_kzalloc for all calls to kzalloc and not just the first. Use devm
functions for other allocations as well.
Move the call to platform_get_resource(pdev, IORESOURCE_MEM, 0) closer to
where its result is passed to devm_request_and_ioremap to make the lack of
need for a NULL test more evident.
The semantic match that finds the inconsistency is as follows:
(http://coccinelle.lip6.fr/)
// <smpl>
@@
@@
*devm_kzalloc(...)
...
*kzalloc(...)
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
The driver uses plat_nand. As the platform_device is loaded from DT, we need
to lookup the node and attach our xway specific "struct platform_nand_data"
to it.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
If plat_nand loads and the platform_data is not properly set it will segfault.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Just as Artem suggested:
"Both UBI and JFFS2 are able to read verify what they wrote already.
There are also MTD tests which do this verification. So I think there
is no reason to keep this in the NAND layer, let alone wasting RAM in
the driver to support this feature. Besides, it does not work for sub-pages
and many drivers have it broken. It hurts more than it provides benefits."
So kill MTD_NAND_VERIFY_WRITE entirely.
Signed-off-by: Huang Shijie <shijie8@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
The manufacturer datasheet can be found on the Micron website,
under the name n25q_256mb_3v_65nm.pdf:
http://www.micron.com/search?source=ps&q=n25q_256mb_3v_65nm
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Removes disabled printk (which should be dev_dbg these days) as well
as #if 0 blocks (which are trivial to reimplement if ever needed) to
meet basic CodingStyle guidelines.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
There is new format specified that helps to dump small buffers. It makes the
code simpler and nicer.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Jiandong Zheng <jdzheng@broadcom.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
add OF support for the davinci nand controller.
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
The uclinux.c map driver has traditionally been used only on non-MMU based
systems. But there is no fundamental reason it can't be used on systems
running with virtual memory.
Some ColdFire CPU based systems now have full paged MMU hardware and can use
the uclinux.c mapping driver, so making the uclinux.c driver configuration
depend on !CONFIG_MMU doesn't make sense now. Allow the CONFIG_MTD_UCLINUX
option to be enabled if CONFIG_COLDFIRE is enabled. (I have chosen not to
just more generally allow uclinux.c for any MMU type to keep this option
hidden for most systems that are not interested in setting it).
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
The uclinux.c mapping driver uses ioremap_nocache() to map its physical
mapping address to a system virtual address. Problem is that the region
it is mapping is not device memory. It is ordinary system RAM. On most
non-MMU systems this doesn't matter, and the mapping is always a 1:1
translation of the address. On paged memory systems on some architectures
the page table mappings are not compatible between normal RAM and device
memory.
If we want to use the uclinux.c mapping driver on real MMU enabled systems
we should be using the kernel virtual address that the mapping is at. For
architectures that support the traditional initrd they use phys_to_virt or
__va to convert the physical start initrd address to a kernel usable virtual
address. The uclinux filesystem mapping is even more restrictive than the
typical initrd, it always follows the kernels own bss section (so always in
directly mapped memory). Therefore we can use the usual phys_to_virt to
translate the physical start address to a virtual address.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Fixes the following checkpatch warnings:
WARNING: line over 80 characters
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Fixes checkpatch warnings and errors related to whitespaces.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Fixes the following checkpatch errors:
ERROR: do not initialise statics to 0 or NULL
+static int hardware_ecc = 0;
ERROR: do not initialise statics to 0 or NULL
+static const int clock_stop = 0;
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Fixes the following checkpatch warning:
WARNING: Use #include <linux/io.h> instead of <asm/io.h>
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This makes the code simpler by eliminating module_init() and
module_exit().
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Include IMX6 in the list of supported SoCs.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Because we can have a single kernel to support multiple machines, we
need to make loading specific drivers for the target platform only.
For this, driver is converted to the platform driver.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Update driver autcpu12-nvram.c so it compiles; map_read32/map_write32
no longer exist in the kernel so the driver is totally broken.
Additionally, map_info name passed to simple_map_init is incorrect.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Cc: stable@vger.kernel.org
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
The NAND_CHIPOPTIONS_MSK has limited utility and is causing real bugs. It
silently masks off at least one flag that might be set by the driver
(NAND_NO_SUBPAGE_WRITE). This breaks the GPMI NAND driver and possibly
others.
Really, as long as driver writers exercise a small amount of care with
NAND_* options, this mask is not necessary at all; it was only here to
prevent certain options from accidentally being set by the driver. But the
original thought turns out to be a bad idea occasionally. Thus, kill it.
Note, this patch fixes some major gpmi-nand breakage.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Tested-by: Huang Shijie <shijie8@gmail.com>
Cc: stable@vger.kernel.org
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
without this the gpio will not be muxed as a gpio by the current custom pinmux
or later by the pinctrl
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This patch does two closely related things:
(1) Currently the ecc.read_page() method does not fill the nand->oob_poi buffer
with the oob data, but instead reads oob into a local buffer. Fix this by
filling the oob_poi buffer instead of a local buffer. The 'oob_required'
argument is quietly ignored; the device must always read oob after the page
data, and it is presumed that there's no harm in filling oob_poi, even when not
explicitly requested.
(2) Always read oob from the device in ecc.read_oob(), instead of copying it
from a local buffer under some circumstances.
Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
drivers/mtd/devices/spear_smi.c: In function 'spear_smi_probe':
drivers/mtd/devices/spear_smi.c:984:2: warning: comparison of unsigned expression < 0 is always false [-Wtype-limits]
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
dev_get_platdata returns a pointer, so the failure value would be NULL
rather than a negative integer.
The semantic match that finds this problem is: (http://coccinelle.lip6.fr/)
// <smpl>
@@
expression x,e;
statement S1,S2;
@@
*x = dev_get_platdata(...)
... when != x = e
*if (x < 0) S1 else S2
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
