Commit Graph

161 Commits

Author SHA1 Message Date
Dave Airlie
9f4ef05bcd Merge branch 'drm-next-4.9' of git://people.freedesktop.org/~agd5f/linux into drm-next
Last set of radeon and amdgpu changes for 4.9.  This is
mostly just the powerplay cleanup for dGPUs.  Beyond that,
just misc code cleanups and bug fixes.

* 'drm-next-4.9' of git://people.freedesktop.org/~agd5f/linux: (49 commits)
  drm/amd/amdgpu: Clean up afmt allocation in DCEv6. (v2)
  drm/amd/amdgpu: Remove division from vblank_wait
  drm/radeon/atif: Send a hotplug event when we get dgpu display request
  drm/radeon/atpx: check for ATIF dGPU wake for display events support
  drm/amdgpu/atif: Send a hotplug event when we get dgpu display request
  drm/amdgpu/atpx: check for ATIF dGPU wake for display events support
  drm/amdgpu: bump version for new vce packet support
  drm/amdgpu/vce: allow the clock table packet
  drm/amdgpu:cleanup virt related define
  drm/amdgpu: use powerplay module for dgpu in Vi.
  drm/amdgpu: set gfx clock gating for tonga/polaris.
  drm/amdgpu: set system clock gating for tonga/polaris.
  drm/amd/powerplay: export function to help to set cg by smu.
  drm/amdgpu: avoid out of bounds access on array interrupt_status_offsets
  drm/amdgpu: mark symbols static where possible
  drm/amdgpu: remove unused functions
  drm/amd/powerplay:  Replace per-asic print_performance with generic
  drm/radeon: narrow asic_init for virtualization
  drm/amdgpu:add fw version entry to info
  drm/amdgpu:determine if vPost is needed indeed
  ...
2016-09-28 11:27:05 +10:00
Rex Zhu
a8ca341364 drm/amdgpu: set gfx clock gating for tonga/polaris.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-22 10:24:19 -04:00
Dave Airlie
bd4a68da19 Merge branch 'drm-next-4.9' of git://people.freedesktop.org/~agd5f/linux into drm-next
More radeon and amdgpu changes for 4.9. Highlights:
- Initial SI support for amdgpu (controlled by a Kconfig option)
- misc ttm cleanups
- runtimepm fixes
- S3/S4 fixes
- power improvements
- lots of code cleanups and optimizations

* 'drm-next-4.9' of git://people.freedesktop.org/~agd5f/linux: (151 commits)
  drm/ttm: remove cpu_address member from ttm_tt
  drm/radeon/radeon_device: remove unused function
  drm/amdgpu: clean function declarations in amdgpu_ttm.c up
  drm/amdgpu: use the new ring ib and dma frame size callbacks (v2)
  drm/amdgpu/vce3: add ring callbacks for ib and dma frame size
  drm/amdgpu/vce2: add ring callbacks for ib and dma frame size
  drm/amdgpu/vce: add common ring callbacks for ib and dma frame size
  drm/amdgpu/uvd6: add ring callbacks for ib and dma frame size
  drm/amdgpu/uvd5: add ring callbacks for ib and dma frame size
  drm/amdgpu/uvd4.2: add ring callbacks for ib and dma frame size
  drm/amdgpu/sdma3: add ring callbacks for ib and dma frame size
  drm/amdgpu/sdma2.4: add ring callbacks for ib and dma frame size
  drm/amdgpu/cik_sdma: add ring callbacks for ib and dma frame size
  drm/amdgpu/si_dma: add ring callbacks for ib and dma frame size
  drm/amdgpu/gfx8: add ring callbacks for ib and dma frame size
  drm/amdgpu/gfx7: add ring callbacks for ib and dma frame size
  drm/amdgpu/gfx6: add ring callbacks for ib and dma frame size
  drm/amdgpu/ring: add an interface to get dma frame and ib size
  drm/amdgpu/sdma3: drop unused functions
  drm/amdgpu/gfx6: drop gds_switch callback
  ...
2016-09-20 06:17:38 +10:00
Huang Rui
167ac5733c drm/amdgpu: implement raster configuration for gfx v8
This patch is to implement the raster configuration and harvested
configuration of gfx v8.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-19 14:38:25 -04:00
Alex Deucher
7512ad16b5 drm/amdgpu/gfx8: add ring callbacks for ib and dma frame size
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-16 15:52:57 -04:00
Baoyou Xie
761c2e8205 drm/amdgpu: mark symbols static where possible
We get a few warnings when building kernel with W=1:
drivers/gpu/drm/amd/amdgpu/cz_smc.c:51:5: warning: no previous prototype for 'cz_send_msg_to_smc_async' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/cz_smc.c:143:5: warning: no previous prototype for 'cz_write_smc_sram_dword' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/iceland_smc.c:124:6: warning: no previous prototype for 'iceland_start_smc' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c:3926:6: warning: no previous prototype for 'gfx_v8_0_rlc_stop' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c:94:6: warning: no previous prototype for 'amdgpu_job_free_cb' [-Wmissing-prototypes]
....

In fact, these functions are only used in the file in which they are
declared and don't need a declaration, but can be made static.
So this patch marks these functions with 'static'.

Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-14 15:10:37 -04:00
Monk Liu
753ad49c9f drm/amdgpu:implement CONTEXT_CONTROL (v5)
v1:
for gfx8, use CONTEXT_CONTROL package to dynamically
skip preamble CEIB and other load_xxx command in sequence.

v2:
support GFX7 as well.
remove cntxcntl in compute ring funcs because CPC doesn't
support this packet.

v3: fix reduntant judgement in cntxcntl.
v4: some cleanups, don't change cs_submit()
v5: keep old MESA supported & bump up KMS version.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Ack-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-14 15:10:29 -04:00
Junwei Zhang
8640faed5a drm/amdgpu: free the BO in kernel by helper amdgpu_bo_free_kernel()
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-14 15:10:27 -04:00
Monk Liu
d4946ccfd0 drm/amdgpu: new method to sync ce&de
sync switch buffer scheme with windows kmd for gfx v8,
step2:
Insert 128NOP after&before VM flush to prevent CE vm fault.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-12 18:12:17 -04:00
Tom St Denis
e7706b422c drm/amd/amdgpu: Merge get_rptr functions in gfx8
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-02 11:33:15 -04:00
Monk Liu
c2167a659c drm/amdgpu:add switch buffer to end of CS (v2)
sync switch buffer scheme with windows kmd for gfx v8,
step1: append a switch_buffer to the end of CS

v2:rebase on latest staging

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-30 17:55:45 -04:00
Dave Airlie
e9c3ddee6a Merge branch 'drm-next-4.9' of git://people.freedesktop.org/~agd5f/linux into drm-next
First drm-next pull for radeon and amdgpu for 4.9.  Highlights:
- powerplay support for iceland asics
- improved GPU reset (both full asic and per block)
- UVD and VCE powergating for CZ and ST
- VCE clockgating for CZ and ST
- Support for pre-initialized (e.g., zeroed) vram buffers
- ttm cleanups
- virtual display support
- core and radeon/amdgpu support for page_flip_target
- lots of bug fixes and clean ups

* 'drm-next-4.9' of git://people.freedesktop.org/~agd5f/linux: (171 commits)
  drm/amdgpu: use memcpy_toio for VCE firmware upload
  drm/amdgpu: use memcpy_to/fromio for UVD fw upload
  drm/amd/powerplay: delete useless code in iceland_hwmgr.c.
  drm/radeon: switch UVD code to use UVD_NO_OP for padding
  drm/amdgpu: switch UVD code to use UVD_NO_OP for padding
  drm/radeon: add support for UVD_NO_OP register
  drm/amdgpu: add support for UVD_NO_OP register
  drm/amdgpu: fix VCE ib alignment value
  drm/amdgpu: fix IB alignment for UVD
  drm/amd/amdgpu: Print ring name in amdgpu_ib_schedule()
  drm/radeon: remove dead code, si_mc_load_microcode (v2)
  drm/radeon/cik: remove dead code (v2)
  drm/amd/powerplay: avoid NULL dereference, cz_hwmgr.c
  drm/amd/powerplay: avoid NULL pointer dereference
  drm/amdgpu/gmc8: remove dead code (v2)
  drm/amdgpu/gmc7: remove dead code (v2)
  drm/amdgpu: Fix indentation in dce_v8_0_audio_write_sad_regs()
  drm/amdgpu: Use correct mask in dce_v8_0_afmt_setmode() and fix comment typos.
  drm/amdgpu: cleanup amdgpu_vm_bo_update params
  drm/amdgpu: stop adding dummy entry in amdgpu_ttm_placement_init
  ...
2016-08-25 12:59:50 +10:00
Tom St Denis
61cb8cef52 drm/amd/amdgpu: Simplify bitfield operations in gfx v8
This patch introduces a new macro WREG32_FIELD which is used
to write to a register with a new value in a field.  It's designed
to replace the pattern:

tmp = RREG32(mmFoo);
tmp &= ~REG__FIELD_MASK;
tmp |= new_value << REG__FIELD__SHIFT;
WREG32(mmFoo, tmp)

with:

WREG32_FIELD(Foo, FIELD, new_value);

Unlike WREG32_P() it understands offsets/masks and doesn't
require the caller to shift the value (or mask properly).

It's applied where suitable in the gfx_v8_0.c driver to start
with.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-10 14:05:08 -04:00
Tom St Denis
5003f2785a drm/amd/amdgpu: Simplify various gfx v8 functions
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-10 14:04:58 -04:00
Tom St Denis
62d2ce4b09 drm/amd/amdgpu: Correct whitespace in GFX v8
Fix various whitespace issues in gfx v8 driver.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-10 14:04:48 -04:00
Rex Zhu
5765a36d4c drm/amdgpu: AMD SW workaround for certain partner boards
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-08 11:33:04 -04:00
Christian König
78bbbd9c0f drm/amdgpu: pin shared GWS, GDS and OA resources
They can't move anyway, but just to be clean here.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-08 11:32:16 -04:00
Chunming Zhou
e4ae0fc336 drm/amdgpu: implement gfx8 post_soft_reset
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-08 11:32:06 -04:00
Chunming Zhou
1057f20c22 drm/amdgpu: add gfx8 pre soft reset
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-08 11:32:04 -04:00
Chunming Zhou
3d7c638490 drm/amdgpu: implement gfx8 check_soft_reset
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-08 11:32:01 -04:00
Huang Rui
a5a5e3084e drm/amdgpu: update golden setting of polaris10
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-02 16:09:09 -04:00
Huang Rui
9761bc53c8 drm/amdgpu: update golden setting of polaris11
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-02 16:08:47 -04:00
Huang Rui
3a494b588f drm/amdgpu: update golden setting of carrizo
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-02 16:08:38 -04:00
Huang Rui
fe85f07f58 drm/amdgpu: update golden setting of iceland
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-02 16:08:27 -04:00
Christian König
bbec97aae6 drm/amdgpu: add a fence timeout for the IB tests v2
10ms should be enough for now.

v2: fix some typos in CIK code

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-29 14:37:04 -04:00
Dave Airlie
162b20d2f9 Merge branch 'drm-next-4.8' of git://people.freedesktop.org/~agd5f/linux into drm-next
A few more patches for 4.8.  Mostly bug fixes and some prep work
for iceland powerplay support.  I have a couple polaris patches and
Edward's misc cleanups that require a merge with Linus'.  I don't know
if you are planning a merge anytime soon.

[airlied: fixed up endian vs 32-bit change in ppatomctrl]

* 'drm-next-4.8' of git://people.freedesktop.org/~agd5f/linux: (26 commits)
  drm/amdgpu: comment out unused defaults_bonaire_pro static const structures to fix the build
  drm/amdgpu: temporary comment out unused static const structures to fix the build
  drm/amdgpu: S3 resume fail on Polaris10
  drm/amd/powerplay: add pp_tables_get_response_times function in process pptables
  drm/amd/powerplay: fix the incorrect return value
  drm/amd/powerplay: add atomctrl_get_voltage_evv function in ppatomctrl
  drm/amdgpu: add new definitions into ppsmc.h for iceland
  drm/amd/powerplay: add SMU register macro for future use
  drm/amdgpu: add ucode_start_address into cgs_firmware_info
  drm/amdgpu: no need load microcode at sdma if powerplay is enabled
  drm/amdgpu: rename smumgr to smum for dpm
  drm/amdgpu: disable GFX PG on CZ/BR/ST
  drivers: gpu: drm: amd: powerplay: hwmgr: Remove unused variable
  drm/amdgpu: return -ENOSPC when running out of UVD handles
  drm/amdgpu: trace need_flush in grab_vm as well
  drm/amdgpu: always signal all fences
  drm/amdgpu: check flush fence context instead of same ring v2
  drm/radeon: support backlight control for UNIPHY3
  drm/amdgpu: support backlight control for UNIPHY3
  drm/amdgpu: remove usec timeout loop from IB tests
  ...
2016-07-28 05:51:39 +10:00
Dave Airlie
5e580523d9 Linux 4.7
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Backmerge tag 'v4.7' into drm-next

Linux 4.7

As requested by Daniel Vetter as the conflicts were getting messy.
2016-07-26 17:26:29 +10:00
Christian König
6d44565d53 drm/amdgpu: remove usec timeout loop from IB tests
We already waited for the fence, so waiting for the registers
is completely pointless and just copy & pasted from the ring test.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-14 16:46:05 -04:00
Christian König
22a77cf6d8 drm/amdgpu: cleanup hw reference handling in the IB tests
Reference should be taken when we make the assignment, not anywhere else.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-14 16:46:05 -04:00
Ken Wang
eeade25ad0 drm/amdgpu: fix power distribution issue for Polaris10 XT
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-14 16:39:35 -04:00
Ken Wang
795c2109c2 drm/amdgpu: Add a missing register to Polaris golden setting
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-14 16:39:30 -04:00
Alex Deucher
33b7ed0122 drm/amdgpu: remove more of the ring backup code
Not used anymore.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:19 -04:00
Tom St Denis
9559ef5b12 drm/amd/gfx: add instance field to select_se_sh (v3)
Add ability to specify instance in select_se_sh callback.
Defaults to 0xffffffff all over the driver.

(v2) Don't enable INSTANCE_BROADCAST by default
(v3) Style changes

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:07 -04:00
Alex Deucher
05fb7291fd drm/amdgpu: move select_se_sh into the gfx struct
It's gfx IP specific, not asic specific, so move to a
gfx callback.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:01:57 -04:00
Alex Deucher
b95e31fdda drm/amdgpu: move get_gpu_clock_counter into the gfx struct
It's gfx IP specific, not asic specific, so move to a
gfx callback.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:01:42 -04:00
Nicolai Hähnle
9de06de80e drm/amdgpu/gfx8: set USER_SHADER_ARRAY_CONFIG based on disable_cu parameter
v2: do not overwrite register when bitmap is zero

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:46 -04:00
Alex Deucher
07cf1a0b95 drm/amdgpu/gfx8: fix CP jump table size
Align to the jump table offset. Fixes hangs on some
systems with GFX PG enabled.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:29 -04:00
Tom St Denis
78f73bf03c drm/amdgpu/gfx80: Add QUICK_PG bit to GFX header and use it.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:19 -04:00
Tom St Denis
dad4acc896 drm/amdgpu/gfx8: Tidy up various PG helpers
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:18 -04:00
Tom St Denis
6ab3886c2c drm/amdgpu/gfx8: Switch Stoney to share CZ's RLC functions
According to the bringup code ST/CZ share the RLC
ENTER/EXIT logic.

Tested on my ST board.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:16 -04:00
Tom St Denis
7894745abb drm/amdgpu/gfx8: Add serdes wait for idle in CGCG en/disable
Must wait for SERDES idle before exiting RLC SAFEMODE

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:58 -04:00
Alex Deucher
7ba0eb6df9 drm/amdgpu/gfx8: clean up polaris11 PG enable
Fix the logic for enabling/disabling.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:46 -04:00
Alex Deucher
2c54716563 drm/amdgpu/gfx8: add powergating support for CZ/ST
This implements powergating support for CZ/ST asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:45 -04:00
Alex Deucher
c2546f55dd drm/amdgpu/gfx8: rename some pg functions
So they can be shared with other asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:44 -04:00
Alex Deucher
fb16007bf0 drm/amdgpu/gfx8: add state setup for CZ/ST GFX power gating
This sets up the CP jump table and GDS buffer and sets the
PG state registers.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:44 -04:00
Ken Wang
d9d533c148 drm/amdgpu: add ACLK_CNTL setting for polaris10
This is a temporary workaround for early boards.

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-29 12:10:31 -04:00
Rex Zhu
92d1576859 drm/amdgpu/gfx8: update golden setting for polaris10
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-21 10:22:42 -04:00
Monk Liu
13331ac384 drm/amdgpu: fix gfx8 ucode mem leak
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-09 10:49:06 -04:00
Ken Wang
d1a7f7aadc drm/amdgpu/iceland: Set SC_PA_RASTER_CONFIG according to different RB enabled
fix the raster config setting for different iceland configs.

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-09 10:48:52 -04:00
Flora Cui
b9934878fd drm/amdgpu: update Polaris11 golden setting
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-18 09:22:29 -04:00