The SoC has a built-in wireless MAC. Register a platform
device for that to make it usable with the ath9k driver.
Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4956/
Signed-off-by: John Crispin <blogic@openwrt.org>
Similarly to the preceding SoCs, the QCA955X SoCs
also have a built-in NS16650 compatible UART.
Register the platform device for that to make
it usable.
Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4949/
Signed-off-by: John Crispin <blogic@openwrt.org>
The ath79_device_reset_* are causing BUG when
those are used on the QCA955x SoCs. The patch
adds the required code to avoid that.
Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4948/
Signed-off-by: John Crispin <blogic@openwrt.org>
The existing code can handle the GPIO controller of
the QCA955x SoCs. Add a minimal glue code to make it
working.
Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4947/
Signed-off-by: John Crispin <blogic@openwrt.org>
The IRQ routing in the QCA955x SoCs is slightly
different from the routing implemented in the
already supported SoCs.
Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4955/
Signed-off-by: John Crispin <blogic@openwrt.org>
The patch adds code to get various clock frequencies
from the PLLs used in the QCA955x SoCs.
Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4945/
Signed-off-by: John Crispin <blogic@openwrt.org>
Also add 'soc_is_qca955[68x]' helper functions
and a Kconfig symbol for the SoC family.
Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4943/
Signed-off-by: John Crispin <blogic@openwrt.org>
The patch allows to see kernel messages on the
QCA955X SoCs in early boot stage.
Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4944/
Signed-off-by: John Crispin <blogic@openwrt.org>
The '.start' field of the IRQ resource assigned twice
in ar934x_wmac_setup(). The second assignment must
set the '.end' field. Fix it.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4954/
Signed-off-by: John Crispin <blogic@openwrt.org>
The current code uses static resources and static platform
device instances for the possible USB controllers in the
system. These static variables contains initial values which
leads to data segment pollution.
Remove the static variables and use dynamically allocated
structures instead.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4933/
Signed-off-by: John Crispin <blogic@openwrt.org>
Use the ATH79_MISC_IRQ() macro instead.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4930/
Signed-off-by: John Crispin <blogic@openwrt.org>
Remove the individual ATH79_CPU_IRQ_* constants and
use the new macro instead of those.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4929/
Signed-off-by: John Crispin <blogic@openwrt.org>
The command register of the PCI controller is
not initialized correctly by the bootloader on
some boards and this leads to non working PCI
bus.
Add code to initialize the command register
from the Linux code to avoid this.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4916/
Signed-off-by: John Crispin <blogic@openwrt.org>
Static resources become impractical when multiple
PCI controllers are present. Move the resources
into the platform device registration code and
change the probe routine to get those from there
platform device's resources.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4914/
Signed-off-by: John Crispin <blogic@openwrt.org>
This is needed for multiple PCI bus support.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4913/
Signed-off-by: John Crispin <blogic@openwrt.org>
The functions are unused now, so remove them.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4909/
Signed-off-by: John Crispin <blogic@openwrt.org>
The pci-ar71xx and pci-ar724x drivers were converted
into platform drivers. Register the corresponding
platform devices for the PCI controllers instead
of using the ar7{1x,24}x_pcibios_init functions.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4908/
Signed-off-by: John Crispin <blogic@openwrt.org>
The current code uses multiple if statements for
demultiplexing the different interrupt sources.
Additionally, the MISC interrupt controller has
32 interrupt sources and the current code does not
handles all of them.
Get rid of the if statements and process all interrupt
sources in a loop to fix these issues.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4874/
Signed-off-by: John Crispin <blogic@openwrt.org>
Make ath79_gpio_function_{en,dis}able to be wrappers
around ath79_gpio_function_setup.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4871/
Signed-off-by: John Crispin <blogic@openwrt.org>
GPIO function selection is not working on the AR934x
SoCs because the offset of the function selection
register is different on those.
Add a helper routine which returns the correct
register address based on the SoC type, and use
that in the 'ath79_gpio_function_*' routines.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4870/
Signed-off-by: John Crispin <blogic@openwrt.org>
This patch (as1623) removes the ehci_port_power() routine and all the
places that call it. There's no reason for ehci-hcd to change the
port power settings; the hub driver takes care of all that stuff.
There is one exception: When the controller is resumed from
hibernation or following a loss of power, the ports that are supposed
to be handed over to a companion controller must be powered on first.
Otherwise the handover won't work. This process is not visible to the
hub driver, so it has to be handled in ehci-hcd.
Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Besides the CPU and DDR PLLs, the CPU and DDR frequencies
can be derived from other PLLs in the SRIF block on the
AR934x SoCs. The current code does not checks if the SRIF
PLLs are used and this can lead to incorrectly calculated
CPU/DDR frequencies.
Fix it by calculating the frequencies from SRIF PLLs if
those are used on a given board.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: <stable@vger.kernel.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4324/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The current dividers in the code are wrong and this
leads to broken CPU frequency calculation on boards
where the fractional part is used.
For example, if the SoC is running from a 40MHz
reference clock, refdiv=1, nint=14, outdiv=0 and
nfrac=31 the real frequency is 579.375MHz but the
current code calculates 569.687MHz instead.
Because the system time is indirectly related to
the CPU frequency the broken computation causes
drift in the system time.
The correct divider is 2^6 for the CPU PLL and 2^10
for the DDR PLL. Use the correct values to fix the
issue.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: stable@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4305/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This improves code readability, and ensures that
all resource fields will be initialized correctly.
Additionally, it helps to reduce the size of the
kernel image by using uninitialized resource
variables.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4171/
Signed-off-by: John Crispin <blogic@openwrt.org>
The currently assigned IRQ number to the OHCI controller is incorrect for
the AR7240 SoC, and that leads to the following error message from the
OHCI driver:
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
ath79-ohci ath79-ohci: Atheros built-in OHCI controller
ath79-ohci ath79-ohci: new USB bus registered, assigned bus number 1
ath79-ohci ath79-ohci: irq 14, io mem 0x1b000000
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
usb 1-1: new full-speed USB device number 2 using ath79-ohci
ath79-ohci ath79-ohci: Unlink after no-IRQ? Controller is probably using the wrong IRQ.
Fix this by using the correct IRQ number.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4168/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The AR724X specific PCI code can be used for the
AR934X SoCs, however it can be selected only if
SOC_AR724X is set.
Introduce a new Kconfig symbol in order to be able
to use the code for AR934X as well.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3514/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The current implementation assumes that flushing the
DDR writeback buffer is required for IP2/IP3 interrupts,
however this is not true for all SoCs.
Use SoC specific IP2/IP3 handlers instead of flushing
the buffers in the dispatcher code.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3509/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Add copyright records according to the recent changes in
the PCI code. Also fix up the descriptions.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3503/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The PB44 reference board has two miniPCI slots. Register
the PCI controller to make those usable.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3502/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The variables set by this function are not used anymore.
Remove the function and the relevant variables as well.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3501/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The PCI controllers in the AR71XX and in the
AR724X SoCs are different, and both of them
uses different IRQ wiring.
The patch modifies the 'pcibios_map_irq' function
in order to allow to use different IRQ maps for
the different SoCs. The patch also adds a function,
which lets the board setup code to override the
default IRQ map.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3500/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The Atheros AR71XX SoCs have a built-in PCI Host Controller.
This patch adds a driver for that, and modifies the relevant
files in order to allow to register the PCI controller from
board specific setup.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3498/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Th current implementation causes NULL pointer dereference
if 'pci_data' is not set:
pci 0000:00:00.0: BAR 0: assigned [mem 0x10000000-0x1000ffff 64bit]
pci 0000:00:00.0: BAR 0: set to [mem 0x10000000-0x1000ffff 64bit] (PCI
address [0x10000000-0x1000ffff])
CPU 0 Unable to handle kernel paging request at virtual address 00000000, epc == 802daca0, ra == 802e78a4
Oops[#1]:
Cpu 0
$ 0 : 00000000 80420000 00000000 00000000
$ 4 : 00000000 00000000 00000001 00000001
$ 8 : 00000001 0000032c 81c54700 00000001
$12 : 0000032d 0000000f 00000000 ffffffff
$16 : 81c14c00 00000001 802dac74 80195f98
$20 : 802ea050 00000000 00000000 00000000
$24 : 00000003 800617f0
$28 : 81c20000 81c21e70 00000000 802e78a4
Hi : 00000000
Lo : 4190ab00
epc : 802daca0 0x802daca0
Not tainted
ra : 802e78a4 0x802e78a4
Status: 1000c003 KERNEL EXL IE
Cause : 00800008
BadVA : 00000000
PrId : 00019374 (MIPS 24Kc)
Modules linked in:
Process swapper (pid: 1, threadinfo=81c20000, task=81c18000, tls=00000000)
Stack : 00000000 8027d5d8 802e8ae0 00000000 01000000 802e8b5c 81c50600 00000000
802ff290 00000000 80420000 802ea0bc 00000000 00000000 80420000 802ff290
80420000 80060930 33390000 00000000 00002308 80140a80 00000028 802d0000
00000000 800ba024 802ff004 802ff0c8 802ff290 00000000 00000000 00000000
00000000 802d897c 01234567 7f827068 00000000 0045f798 00460000 00000000
This can be avoided by calling the 'ar724x_pci_add_data'
function from the board specific setup code. However it
makes no sense to use that function for every board,
especially when the board does not needs to set the
platform_data field of any PCI device.
The patch allows the board setup code to specify a board
specific function if that is required.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3499/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Remove a superfluous ifdef around an include. Also
reorganize the board setup code a bit, so another
ifdef can be removed.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3497/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The PCI Host Controller of the AR724x SoC has a
built-in IRQ controller. The current code does
not supports that, so the IRQ lines wired to this
controller are not usable. This leads to failed
'request_irq' calls:
ath9k 0000:00:00.0: request_irq failed
ath9k: probe of 0000:00:00.0 failed with error -89
This patch adds support for the IRQ controller
in order to make PCI IRQs work.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3496/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
