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145 Commits

Author SHA1 Message Date
Tom St Denis
61cb8cef52 drm/amd/amdgpu: Simplify bitfield operations in gfx v8 
This patch introduces a new macro WREG32_FIELD which is used
to write to a register with a new value in a field.  It's designed
to replace the pattern:

tmp = RREG32(mmFoo);
tmp &= ~REG__FIELD_MASK;
tmp |= new_value << REG__FIELD__SHIFT;
WREG32(mmFoo, tmp)

with:

WREG32_FIELD(Foo, FIELD, new_value);

Unlike WREG32_P() it understands offsets/masks and doesn't
require the caller to shift the value (or mask properly).

It's applied where suitable in the gfx_v8_0.c driver to start
with.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-10 14:05:08 -04:00
Tom St Denis
5003f2785a drm/amd/amdgpu: Simplify various gfx v8 functions 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-10 14:04:58 -04:00
Tom St Denis
62d2ce4b09 drm/amd/amdgpu: Correct whitespace in GFX v8 
Fix various whitespace issues in gfx v8 driver.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-10 14:04:48 -04:00
Rex Zhu
5765a36d4c drm/amdgpu: AMD SW workaround for certain partner boards 
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:33:04 -04:00
Christian König
78bbbd9c0f drm/amdgpu: pin shared GWS, GDS and OA resources 
They can't move anyway, but just to be clean here.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:16 -04:00
Chunming Zhou
e4ae0fc336 drm/amdgpu: implement gfx8 post_soft_reset 
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:06 -04:00
Chunming Zhou
1057f20c22 drm/amdgpu: add gfx8 pre soft reset 
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:04 -04:00
Chunming Zhou
3d7c638490 drm/amdgpu: implement gfx8 check_soft_reset 
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:01 -04:00
Christian König
bbec97aae6 drm/amdgpu: add a fence timeout for the IB tests v2 
10ms should be enough for now.

v2: fix some typos in CIK code

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-29 14:37:04 -04:00
Dave Airlie
162b20d2f9 Merge branch 'drm-next-4.8' of git://people.freedesktop.org/~agd5f/linux into drm-next 
A few more patches for 4.8.  Mostly bug fixes and some prep work
for iceland powerplay support.  I have a couple polaris patches and
Edward's misc cleanups that require a merge with Linus'.  I don't know
if you are planning a merge anytime soon.

[airlied: fixed up endian vs 32-bit change in ppatomctrl]

* 'drm-next-4.8' of git://people.freedesktop.org/~agd5f/linux: (26 commits)
  drm/amdgpu: comment out unused defaults_bonaire_pro static const structures to fix the build
  drm/amdgpu: temporary comment out unused static const structures to fix the build
  drm/amdgpu: S3 resume fail on Polaris10
  drm/amd/powerplay: add pp_tables_get_response_times function in process pptables
  drm/amd/powerplay: fix the incorrect return value
  drm/amd/powerplay: add atomctrl_get_voltage_evv function in ppatomctrl
  drm/amdgpu: add new definitions into ppsmc.h for iceland
  drm/amd/powerplay: add SMU register macro for future use
  drm/amdgpu: add ucode_start_address into cgs_firmware_info
  drm/amdgpu: no need load microcode at sdma if powerplay is enabled
  drm/amdgpu: rename smumgr to smum for dpm
  drm/amdgpu: disable GFX PG on CZ/BR/ST
  drivers: gpu: drm: amd: powerplay: hwmgr: Remove unused variable
  drm/amdgpu: return -ENOSPC when running out of UVD handles
  drm/amdgpu: trace need_flush in grab_vm as well
  drm/amdgpu: always signal all fences
  drm/amdgpu: check flush fence context instead of same ring v2
  drm/radeon: support backlight control for UNIPHY3
  drm/amdgpu: support backlight control for UNIPHY3
  drm/amdgpu: remove usec timeout loop from IB tests
  ...
 2016-07-28 05:51:39 +10:00
Dave Airlie
5e580523d9 Backmerge tag 'v4.7' into drm-next 
Linux 4.7

As requested by Daniel Vetter as the conflicts were getting messy.
 2016-07-26 17:26:29 +10:00
Christian König
6d44565d53 drm/amdgpu: remove usec timeout loop from IB tests 
We already waited for the fence, so waiting for the registers
is completely pointless and just copy & pasted from the ring test.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-14 16:46:05 -04:00
Christian König
22a77cf6d8 drm/amdgpu: cleanup hw reference handling in the IB tests 
Reference should be taken when we make the assignment, not anywhere else.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-14 16:46:05 -04:00
Ken Wang
eeade25ad0 drm/amdgpu: fix power distribution issue for Polaris10 XT 
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-14 16:39:35 -04:00
Ken Wang
795c2109c2 drm/amdgpu: Add a missing register to Polaris golden setting 
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-14 16:39:30 -04:00
Alex Deucher
33b7ed0122 drm/amdgpu: remove more of the ring backup code 
Not used anymore.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 15:06:19 -04:00
Tom St Denis
9559ef5b12 drm/amd/gfx: add instance field to select_se_sh (v3) 
Add ability to specify instance in select_se_sh callback.
Defaults to 0xffffffff all over the driver.

(v2) Don't enable INSTANCE_BROADCAST by default
(v3) Style changes

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 15:06:07 -04:00
Alex Deucher
05fb7291fd drm/amdgpu: move select_se_sh into the gfx struct 
It's gfx IP specific, not asic specific, so move to a
gfx callback.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 15:01:57 -04:00
Alex Deucher
b95e31fdda drm/amdgpu: move get_gpu_clock_counter into the gfx struct 
It's gfx IP specific, not asic specific, so move to a
gfx callback.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 15:01:42 -04:00
Nicolai Hähnle
9de06de80e drm/amdgpu/gfx8: set USER_SHADER_ARRAY_CONFIG based on disable_cu parameter 
v2: do not overwrite register when bitmap is zero

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:54:46 -04:00
Alex Deucher
07cf1a0b95 drm/amdgpu/gfx8: fix CP jump table size 
Align to the jump table offset. Fixes hangs on some
systems with GFX PG enabled.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:51:29 -04:00
Tom St Denis
78f73bf03c drm/amdgpu/gfx80: Add QUICK_PG bit to GFX header and use it. 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:51:19 -04:00
Tom St Denis
dad4acc896 drm/amdgpu/gfx8: Tidy up various PG helpers 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:51:18 -04:00
Tom St Denis
6ab3886c2c drm/amdgpu/gfx8: Switch Stoney to share CZ's RLC functions 
According to the bringup code ST/CZ share the RLC
ENTER/EXIT logic.

Tested on my ST board.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:51:16 -04:00
Tom St Denis
7894745abb drm/amdgpu/gfx8: Add serdes wait for idle in CGCG en/disable 
Must wait for SERDES idle before exiting RLC SAFEMODE

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:58 -04:00
Alex Deucher
7ba0eb6df9 drm/amdgpu/gfx8: clean up polaris11 PG enable 
Fix the logic for enabling/disabling.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:46 -04:00
Alex Deucher
2c54716563 drm/amdgpu/gfx8: add powergating support for CZ/ST 
This implements powergating support for CZ/ST asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:45 -04:00
Alex Deucher
c2546f55dd drm/amdgpu/gfx8: rename some pg functions 
So they can be shared with other asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:44 -04:00
Alex Deucher
fb16007bf0 drm/amdgpu/gfx8: add state setup for CZ/ST GFX power gating 
This sets up the CP jump table and GDS buffer and sets the
PG state registers.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:44 -04:00
Ken Wang
d9d533c148 drm/amdgpu: add ACLK_CNTL setting for polaris10 
This is a temporary workaround for early boards.

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-06-29 12:10:31 -04:00
Rex Zhu
92d1576859 drm/amdgpu/gfx8: update golden setting for polaris10 
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-06-21 10:22:42 -04:00
Monk Liu
13331ac384 drm/amdgpu: fix gfx8 ucode mem leak 
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-06-09 10:49:06 -04:00
Ken Wang
d1a7f7aadc drm/amdgpu/iceland: Set SC_PA_RASTER_CONFIG according to different RB enabled 
fix the raster config setting for different iceland configs.

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-06-09 10:48:52 -04:00
Flora Cui
b9934878fd drm/amdgpu: update Polaris11 golden setting 
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-18 09:22:29 -04:00
Flora Cui
d4ab989fc3 drm/amdgpu: update Polaris10 golden setting 
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-18 09:22:28 -04:00
Marek Olšák
f84e63f2ff drm/amdgpu: fix TC cache flushing 
TC_WB_ACTION must be set according to the docs

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-11 13:51:15 -04:00
Christian König
d88bf583bd drm/amdgpu: move VM fields into job 
They are the same for all IBs.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-11 13:30:31 -04:00
Christian König
f153d2867b drm/amdgpu: move context switch handling into common code v2 
It was a source of bugs to repeat that in each IP version.

v2: rename parameter

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-11 13:30:30 -04:00
Christian König
9f8fb5a2b3 drm/amdgpu: move preamble IB handling into common code 
This fixes the handling which was completely broken when you
ad more than one preamble IB.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-11 13:30:30 -04:00
Tom St Denis
88a907d67c drm/amd/amdgpu: Add name field to amd_ip_funcs (v2) 
Add name that we can print out in kernel messages
to aid in debugging.

v2: drop DAL changes for upstream

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-11 12:31:26 -04:00
Alex Deucher
7dae69a290 drm/amdgpu: fetch cu_info once at init 
Fetch this info once at init and just store the results
for future requests.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-11 12:31:21 -04:00
Christian König
edf600dac6 drm/amd: cleanup remaining spaces and tabs v2 
This is the result of running the following commands:
find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/[ \t]\+$//' {} \;
find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/[ \t]\+$//' {} \;
find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/ \+\t/\t/' {} \;
find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/ \+\t/\t/' {} \;

v2: drop changes to DAL and internal headers

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-11 12:31:20 -04:00
Monk Liu
c5637837ba drm/amdgpu: keep vm in job instead of ib (v2) 
ib.vm is a legacy way to get vm, after scheduler
implemented vm should be get from job, and all ibs
from one job share the same vm, no need to keep ib.vm
just move vm field to job.

this patch as well add job as paramter to ib_schedule
so it can get vm from job->vm.

v2: agd: sqaush in:
drm/amdgpu: check if ring emit_vm_flush exists in vm flush

No vm flush on engines that don't support VM.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=95195

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-11 12:31:16 -04:00
Tom St Denis
16a7989ac6 drm/amd/amdgpu: Drop print_status callbacks. 
First patch in series to move to user mode
debug tools we're removing the print_status callbacks.

These functions were unused at the moment anyway.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:30:06 -04:00
Slava Grigorev
ae17c999f0 drm/amd/amdgpu: fix 64-bit division 
Signed-off-by: Slava Grigorev <slava.grigorev@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:28:37 -04:00
Flora Cui
2cc0c0b5cd drm/amdgpu: change ELM/BAF to Polaris10/Polaris11 
Adjust to preferred code names.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:27:57 -04:00
Eric Huang
f4bfffddd7 drm/amd/amdgpu: add power gating init for Baffin 
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:27:34 -04:00
Eric Huang
2b6cd97797 drm/amd/amdgpu: add power gating initialization support for GFX8.0 
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:27:28 -04:00
Eric Huang
62a86fc234 drm/amd/amdgpu: add medium grain powergating support for Baffin 
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:27:16 -04:00
Flora Cui
68182d909b drm/amdgpu: add GFX support for ELM/BAF 
V2: use gfx_8_0_*.h instead of gfx_8_1_*.h
v3: agd: integrate support for gfx info table

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:25:11 -04:00