Chris Wilson
ec450576f8
drm/i915/gt: Remove a bonus newline
...
Trailing newlines before closing the function are best forgotten, or
else checkpatch moans.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20210122192913.4518-5-chris@chris-wilson.co.uk
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch >
2021-03-24 19:30:35 +01:00
Chris Wilson
24f90d6688
drm/i915/gt: SPDX cleanup
...
Clean up the SPDX licence declarations to comply with checkpatch.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20210122192913.4518-1-chris@chris-wilson.co.uk
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch >
2021-03-24 19:30:34 +01:00
Jani Nikula
35bb28ece9
Merge drm/drm-next into drm-intel-next
...
Sync up with upstream.
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2021-03-11 08:52:53 +02:00
Thomas Zimmermann
e322551f47
drm/i915/gt: Remove references to struct drm_device.pdev
...
Using struct drm_device.pdev is deprecated. Convert i915 to struct
drm_device.dev. No functional changes.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de >
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Jani Nikula <jani.nikula@linux.intel.com >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20210128133127.2311-3-tzimmermann@suse.de
2021-02-02 13:58:43 +02:00
Chris Wilson
9834dfef55
drm/i915/gt: Prune inlines
...
Remove all the manual inlines from non-critical sections in gt/
add/remove: 2/0 grow/shrink: 0/3 up/down: 762/-1473 (-711)
Function old new delta
mi_set_context.isra - 602 +602
write_dma_entry - 160 +160
__set_pd_entry 214 69 -145
clear_pd_entry 190 42 -148
ring_request_alloc 2021 841 -1180
Total: Before=1605086, After=1604375, chg -0.04%
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20210113152224.29794-1-chris@chris-wilson.co.uk
2021-01-14 15:40:57 +00:00
Rodrigo Vivi
85a12d7eb8
drm/i915/tgl: Fix Media power gate sequence.
...
Some media power gates are disabled by default. commit 5d86923060
("drm/i915/tgl: Enable VD HCP/MFX sub-pipe power gating")
tried to enable it, but it duplicated an existent register.
So, the main PG setup sequences ended up overwriting it.
So, let's now merge this to the main PG setup sequence.
v2: (Chris): s/BIT/REG_BIT, remove useless comment,
remove useless =0, use the right gt,
remove rc6 sequence doubt from commit message.
Fixes: 5d86923060 ("drm/i915/tgl: Enable VD HCP/MFX sub-pipe power gating")
Cc: Lucas De Marchi <lucas.demarchi@intel.com >
Cc: stable@vger.kernel.org #v5.5+
Cc: Dale B Stimson <dale.b.stimson@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Cc: Chris Wilson <chris@chris-wilson.co.uk >
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk >
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Link: https://patchwork.freedesktop.org/patch/msgid/20201111072859.1186070-1-rodrigo.vivi@intel.com
(cherry picked from commit 695dc55b57 )
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
2020-11-16 18:06:21 -05:00
Rodrigo Vivi
695dc55b57
drm/i915/tgl: Fix Media power gate sequence.
...
Some media power gates are disabled by default. commit 5d86923060
("drm/i915/tgl: Enable VD HCP/MFX sub-pipe power gating")
tried to enable it, but it duplicated an existent register.
So, the main PG setup sequences ended up overwriting it.
So, let's now merge this to the main PG setup sequence.
v2: (Chris): s/BIT/REG_BIT, remove useless comment,
remove useless =0, use the right gt,
remove rc6 sequence doubt from commit message.
Fixes: 5d86923060 ("drm/i915/tgl: Enable VD HCP/MFX sub-pipe power gating")
Cc: Lucas De Marchi <lucas.demarchi@intel.com >
Cc: stable@vger.kernel.org #v5.5+
Cc: Dale B Stimson <dale.b.stimson@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Cc: Chris Wilson <chris@chris-wilson.co.uk >
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk >
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Link: https://patchwork.freedesktop.org/patch/msgid/20201111072859.1186070-1-rodrigo.vivi@intel.com
2020-11-11 15:07:10 +00:00
Ville Syrjälä
dab3aff7b1
drm/i915: Remove cnl pre-prod workarounds
...
Remove all the stepping dependent cnl workarounds. Bspec lists
more steppings than this so presumably these are classed as
pre-production. And this is cnl after all so no one should
really care anyway.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20200430125822.21985-2-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk >
2020-05-04 18:44:52 +03:00
Jani Nikula
dc483ba501
drm/i915/gt: prefer struct drm_device based logging
...
Prefer struct drm_device based logging over struct device based logging.
No functional changes.
Cc: Wambui Karuga <wambui.karugax@gmail.com >
Reviewed-by: Wambui Karuga <wambui.karugax@gmail.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20200402114819.17232-16-jani.nikula@intel.com
2020-04-08 13:49:35 +03:00
Chris Wilson
13c5a577b3
drm/i915/gt: Select the deepest available parking mode for rc6
...
On Ivybridge, we can go lower than rc6 to rc6p. And this is required for
Ivybridge to hit the same minimum power consumption as rc6 on other
platforms, so make it so.
v2: Update selftest to include all rc6 residency counters
Note that Andi did mention that we should be converting the magic
numbers into opaque magic macros, so if they ever get reused (unlikely
given only Ivybridge used the extra modes) we'll need to pay back the
technical debt.
Closes: https://gitlab.freedesktop.org/drm/intel/issues/1518
Fixes: 730eaeb524 ("drm/i915/gt: Manual rc6 entry upon parking")
Testcase: igt/i915_pm_rc6_residency/rc6-idle
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Andi Shyti <andi.shyti@intel.com >
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Cc: Imre Deak <imre.deak@intel.com >
Reviewed-by: Andi Shyti <andi.shyti@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20200324134232.8773-1-chris@chris-wilson.co.uk
2020-03-24 15:53:51 +00:00
Wambui Karuga
1ca6ce9332
drm/i915/rc6: convert to struct drm_device based logging macros.
...
Converts various instances of the printk based drm logging macros to use
the struct drm_device logging macros. This also involves extracting the
drm_i915_private device from intel types in some cases.
Note that this converts DRM_DEBUG_DRIVER() to drm_dbg().
References: https://lists.freedesktop.org/archives/dri-devel/2020-January/253381.html
Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20200314183344.17603-4-wambui.karugax@gmail.com
2020-03-19 11:34:16 +02:00
Matthew Auld
520f835036
drm/i915: properly sanity check batch_start_offset
...
Check the edge case where batch_start_offset sits exactly on the batch
size.
v2: add new range_overflows variant to capture the special case where
the size is permitted to be zero, like with batch_len.
v3: other way around. the common case is the exclusive one which should
just be >=, with that we then just need to convert the three odd ball
cases that don't apply to use the new inclusive _end version.
Testcase: igt/gem_exec_params/invalid-batch-start-offset
Fixes: 0b5372727b ("drm/i915/cmdparser: Use cached vmappings")
Signed-off-by: Matthew Auld <matthew.auld@intel.com >
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Cc: Chris Wilson <chris@chris-wilson.co.uk >
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Link: https://patchwork.freedesktop.org/patch/msgid/20200306094735.258285-1-matthew.auld@intel.com
2020-03-06 13:15:49 +00:00
Jani Nikula
9e859eb9d0
drm/i915/vgpu: improve vgpu abstractions
...
Add intel_vgpu_register() abstraction, rename i915_detect_vgpu() to
intel_vgpu_detect() to match other function naming, un-inline
intel_vgpu_active(), intel_vgpu_has_full_ppgtt() and
intel_vgpu_has_huge_gtt() to reduce header interdependencies.
The i915_vgpu.[ch] filename and intel_vgpu_ prefix discrepancy remains.
Cc: Chris Wilson <chris@chris-wilson.co.uk >
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20200227144408.24345-1-jani.nikula@intel.com
2020-03-03 17:46:54 +02:00
Chris Wilson
9c4ce97d80
drm/i915/display: Be explicit in handling the preallocated vma
...
As only the display codes tries to pin its preallocated framebuffer into
an exact location in the GGTT, remove the convenience function and make
the pin management explicit in the display code. Then throughout the
display management, we track the framebuffer and its plane->vma; with
less single purpose code and ready for first class i915_vma.
In doing so, this should fix the BUG_ON(vma->pages) on fi-kbl-soraka.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20200204094801.877288-2-chris@chris-wilson.co.uk
2020-02-05 09:20:39 +00:00
Chris Wilson
816cc4d6c6
drm/i915/gt: Fix rc6 on Ivybridge
...
The current rc6 threshold is larger than the evaluation interval on
Ivybridge; it never enters rc6. Remove the special casing so it behaves
like the other gen6/gen7, and we see rc6 residencies before we manually
park the system.
Closes: https://gitlab.freedesktop.org/drm/intel/issues/1114
Testcase: igt/i915_pm_rc6_residency/rc6-idle #ivb
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Andi Shyti <andi.shyti@intel.com >
Reviewed-by: Andi Shyti <andi.shyti@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20200203202110.670209-1-chris@chris-wilson.co.uk
2020-02-04 22:54:36 +00:00
Pankaj Bharadiya
0d4c351a0f
drm/i915/gt: Make WARN* drm specific where drm_priv ptr is available
...
drm specific WARN* calls include device information in the
backtrace, so we know what device the warnings originate from.
Covert all the calls of WARN* with device specific drm_WARN*
variants in functions where drm_i915_private struct pointer is readily
available.
The conversion was done automatically with below coccinelle semantic
patch. checkpatch errors/warnings are fixed manually.
@rule1@
identifier func, T;
@@
func(...) {
...
struct drm_i915_private *T = ...;
<+...
(
-WARN(
+drm_WARN(&T->drm,
...)
|
-WARN_ON(
+drm_WARN_ON(&T->drm,
...)
|
-WARN_ONCE(
+drm_WARN_ONCE(&T->drm,
...)
|
-WARN_ON_ONCE(
+drm_WARN_ON_ONCE(&T->drm,
...)
)
...+>
}
@rule2@
identifier func, T;
@@
func(struct drm_i915_private *T,...) {
<+...
(
-WARN(
+drm_WARN(&T->drm,
...)
|
-WARN_ON(
+drm_WARN_ON(&T->drm,
...)
|
-WARN_ONCE(
+drm_WARN_ONCE(&T->drm,
...)
|
-WARN_ON_ONCE(
+drm_WARN_ON_ONCE(&T->drm,
...)
)
...+>
}
command: spatch --sp-file <script> --dir drivers/gpu/drm/i915/gt \
--linux-spacing --in-place
Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20200115034455.17658-7-pankaj.laxminarayan.bharadiya@intel.com
2020-01-22 17:53:37 +02:00
Chris Wilson
e88e9f8ea4
drm/i915/gt: Clear rc6 residency trackers across suspend
...
On suspend, the rc6 residency counters (stored in HW registers) will be
lost and cleared. However, we keep track of the rc6 residency to provide
a continuous 64b sampling, and if we see the HW value go backwards, we
assume it overflowed and add on 32b/40b -- an interesting artifact when
sampling across suspend.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20200114105648.2172026-2-chris@chris-wilson.co.uk
2020-01-14 12:55:13 +00:00
Chris Wilson
7d929989bb
drm/i915/gt: Only ignore rc6 parking for PCU on byt/bsw
...
An oversight in that we use rc6->ctl_enable to disable rc6 on gen9 and
so it does not simply indicate indirect control via a PCU. Switch the
rc6->ctl_enable check for a platform-based check.
Fixes: 972745fd57 ("drm/i915/gt: Disable manual rc6 for Braswell/Baytrail")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Acked-by: Andi Shyti <andi.shyti@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20191212072737.884335-2-chris@chris-wilson.co.uk
2019-12-12 08:35:48 +00:00
Chris Wilson
972745fd57
drm/i915/gt: Disable manual rc6 for Braswell/Baytrail
...
The initial investigated showed that while the PCU on Braswell/Baytrail
controlled RC6 itself. setting the software RC6 request made no
difference. Further testing reveals though that it causes a delay in the
PCU on enabling RC6.
Closes: https://gitlab.freedesktop.org/drm/intel/issues/763
Fixes: 730eaeb524 ("drm/i915/gt: Manual rc6 entry upon parking")
Testcase: igt/perf/rc6-disable
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Andi Shyti <andi.shyti@intel.com >
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Cc: Imre Deak <imre.deak@intel.com >
Acked-by: Andi Shyti <andi.shyti@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20191210180111.3958558-1-chris@chris-wilson.co.uk
2019-12-11 21:34:35 +00:00
Chris Wilson
65f6d12c6b
drm/i915/gt: Simplify rc6 w/a application
...
Quite simply we only need to check for prior corruption on enabling rc6
on module load and resume, so by hooking into the common entry points.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Acked-by: Andi Shyti <andi.shyti@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20191202110836.2342685-2-chris@chris-wilson.co.uk
2019-12-02 21:57:22 +00:00
Chris Wilson
61e258ee33
drm/i915/gt: Use soft-rc6 for w/a protection
...
Now that we have soft-rc6 in place, we can use that instead of the
forcewake to disable rc6 while active; preferred by a few
microbenchmarks.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Acked-by: Andi Shyti <andi.shyti@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20191202110836.2342685-1-chris@chris-wilson.co.uk
2019-12-02 21:57:22 +00:00
Chris Wilson
730eaeb524
drm/i915/gt: Manual rc6 entry upon parking
...
Now that we rapidly park the GT when the GPU idles, we often find
ourselves idling faster than the RC6 promotion timer. Thus if we tell
the GPU to enter RC6 manually as we park, we can do so quicker (by
around 50ms, half an EI on average) and marginally increase our
powersaving across all execlists platforms.
v2: Now with a selftest to check we can enter RC6 manually
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Andi Shyti <andi.shyti@intel.com >
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Cc: Imre Deak <imre.deak@intel.com >
Acked-by: Imre Deak <imre.deak@intel.com >
Reviewed-by: Andi Shyti <andi.shyti@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20191127095657.3209854-1-chris@chris-wilson.co.uk
2019-11-27 12:53:27 +00:00
Chris Wilson
ba446f7460
drm/i915/selftests: Exercise rc6 w/a handling
...
Reading from CTX_INFO upsets rc6, requiring us to detect and prevent
possible rc6 context corruption. Poke at the bear!
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Imre Deak <imre.deak@intel.com >
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Reviewed-by: Andi Shyti <andi.shyti@intel.com >
Tested-by: Andi Shyti <andi.shyti@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20191119154723.3311814-1-chris@chris-wilson.co.uk
2019-11-19 20:05:01 +00:00
Chris Wilson
3c1fe1eb92
drm/i915/gt: Mention which device failed
...
When telling the user that device power management is disabled, it is
helpful to say which device that was.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Cc: Imre Deak <imre.deak@intel.com >
Reviewed-by: Imre Deak <imre.deak@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20191115122343.821331-1-chris@chris-wilson.co.uk
2019-11-15 21:31:58 +00:00
Jani Nikula
e205ceeb25
Merge drm/drm-next into drm-intel-next-queued
...
Backmerge to get dfce90259d ("Backmerge i915 security patches from
commit 'ea0b163b13ff' into drm-next") and thus 100d46bd72 ("Merge
Intel Gen8/Gen9 graphics fixes from Jon Bloomfield.").
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2019-11-15 13:17:39 +02:00
Imre Deak
980f87a2ed
drm/i915: Restore GT coarse power gating workaround
...
The workaround to disable coarse power gating is still needed on SKL
GT3/GT4 machines and since the RC6 context corruption was discovered by
the hardware team also on all GEN9 machines. Restore applying the
workaround.
Fixes: c113236718 ("drm/i915: Extract GT render sleep (rc6) management")
Testcase: igt/intel_gt_pm_late_selftests/live_rc6_ctx
Cc: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Andi Shyti <andi.shyti@intel.com >
Signed-off-by: Imre Deak <imre.deak@intel.com >
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk >
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Link: https://patchwork.freedesktop.org/patch/msgid/20191114152621.7235-1-imre.deak@intel.com
2019-11-14 18:08:45 +00:00
Imre Deak
2248a28384
drm/i915/gen8+: Add RC6 CTX corruption WA
...
In some circumstances the RC6 context can get corrupted. We can detect
this and take the required action, that is disable RC6 and runtime PM.
The HW recovers from the corrupted state after a system suspend/resume
cycle, so detect the recovery and re-enable RC6 and runtime PM.
v2: rebase (Mika)
v3:
- Move intel_suspend_gt_powersave() to the end of the GEM suspend
sequence.
- Add commit message.
v4:
- Rebased on intel_uncore_forcewake_put(i915->uncore, ...) API
change.
v5:
- Rebased on latest upstream gt_pm refactoring.
v6:
- s/i915_rc6_/intel_rc6_/
- Don't return a value from i915_rc6_ctx_wa_check().
v7:
- Rebased on latest gt rc6 refactoring.
Signed-off-by: Imre Deak <imre.deak@intel.com >
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com >
[airlied: pull this later version of this patch into drm-next
to make resolving the conflict mess easier.]
Signed-off-by: Dave Airlie <airlied@redhat.com >
2019-11-14 10:51:54 +10:00
Chris Wilson
028a7a989c
drm/i915/icl: Refine PG_HYSTERESIS
...
After doing some measuring, Icelake behaves on a par with Broadwell, and
without having to compromise for low power cores with long latencies, we
can reduce the powergating hysteresis so that the powersaving is enabled
faster. No impact observed on client side throughput measures (so
negligible increase in extra switching), and inspection from high
frequency polling using igt/gem_exec_nop/sequential, provided an estimate
for the upper bound before we can measure a substantial impact on
latency.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20191110185806.17413-9-chris@chris-wilson.co.uk
2019-11-11 11:06:59 +00:00
Chris Wilson
a70a9e998e
drm/i915: Defer rc6 shutdown to suspend_late
...
Currently we shutdown rc6 during i915_gem_resume() but this is called
during the preparation phase (i915_drm_prepare) for all suspend paths,
but we only want to shutdown rc6 for S3+. Move the actual shutdown to
i915_gem_suspend_late().
We then need to differentiate between suspend targets, to distinguish S0
(s2idle) where the device is kept awake but needs to be in a low power
mode (the same as runtime suspend) from the device suspend levels where
we lose control of HW and so must disable any HW access to dangling
memory.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111909
Fixes: c113236718 ("drm/i915: Extract GT render sleep (rc6) management")
Testcase: igt/gem_exec_suspend/power-S0
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Andi Shyti <andi.shyti@intel.com >
Acked-by: Andi Shyti <andi.shyti@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20191101141009.15581-4-chris@chris-wilson.co.uk
(cherry picked from commit c601cb2135 )
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
2019-11-05 16:05:42 +02:00
Chris Wilson
c601cb2135
drm/i915: Defer rc6 shutdown to suspend_late
...
Currently we shutdown rc6 during i915_gem_resume() but this is called
during the preparation phase (i915_drm_prepare) for all suspend paths,
but we only want to shutdown rc6 for S3+. Move the actual shutdown to
i915_gem_suspend_late().
We then need to differentiate between suspend targets, to distinguish S0
(s2idle) where the device is kept awake but needs to be in a low power
mode (the same as runtime suspend) from the device suspend levels where
we lose control of HW and so must disable any HW access to dangling
memory.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111909
Fixes: c113236718 ("drm/i915: Extract GT render sleep (rc6) management")
Testcase: igt/gem_exec_suspend/power-S0
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Andi Shyti <andi.shyti@intel.com >
Acked-by: Andi Shyti <andi.shyti@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20191101141009.15581-4-chris@chris-wilson.co.uk
2019-11-01 14:47:36 +00:00
Chris Wilson
c6e07ada8e
drm/i915/gt: Convert the leftover for_each_engine(gt)
...
Use the local gt for iterating over the available set of engines.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20191018115331.8980-1-chris@chris-wilson.co.uk
2019-10-18 14:53:48 +01:00
CQ Tang
0e5493cab5
drm/i915/stolen: make the object creation interface consistent
...
Our other backends return an actual error value upon failure. Do the
same for stolen objects, which currently just return NULL on failure.
Signed-off-by: CQ Tang <cq.tang@intel.com >
Signed-off-by: Matthew Auld <matthew.auld@intel.com >
Cc: Chris Wilson <chris@chris-wilson.co.uk >
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk >
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Link: https://patchwork.freedesktop.org/patch/msgid/20191004170452.15410-2-matthew.auld@intel.com
2019-10-04 19:27:41 +01:00
Andi Shyti
c113236718
drm/i915: Extract GT render sleep (rc6) management
...
Continuing the theme of breaking intel_pm.c up in a reasonable chunk of
powermanagement utilities, pull out the rc6 setup into its GT handler.
Based on a patch by Chris Wilson.
Signed-off-by: Andi Shyti <andi.shyti@intel.com >
Cc: Chris Wilson <chris@chris-wilson.co.uk >
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk >
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Link: https://patchwork.freedesktop.org/patch/msgid/20190919143840.20384-1-andi.shyti@intel.com
Link: https://patchwork.freedesktop.org/patch/msgid/20190927110849.28734-1-chris@chris-wilson.co.uk
2019-09-27 13:01:57 +01:00