Rex Zhu
ac06b4cfd7
drm/amdgpu: Add SOC15_WAIT_ON_RREG macro define
...
Add new macro to wait on a register field to be a specific
value.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-05-24 00:18:02 -05:00
Alex Deucher
bf383fb64e
drm/amdgpu: convert nbio to use callbacks (v2)
...
Cleans up and consolidates all of the per-asic logic.
v2: squash in "drm/amdgpu: fix NULL err for sriov detect" (Chunming)
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-13 17:28:07 -05:00
Shaoyun Liu
cd29253f65
drm/amdgpu: Change SOC15_REG_OFFSET to use dynamic register offset
...
Acked-by: Christian Konig <christian.koenig@amd.com >
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-08 11:32:24 -05:00
Shaoyun Liu
946a4d5b30
drm/amdgpu: Avoid use SOC15_REG_OFFSET in static const array
...
Handle dynamic offsets correctly in static arrays.
Acked-by: Christian Konig <christian.koenig@amd.com >
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-08 11:18:51 -05:00
Shaoyun Liu
b466107e8b
drm/amdgpu: Use dynamic IP offset for register access on SOC15
...
Update the register access macros and functions to take into
account the new dynamic IP base offsets.
Acked-by: Christian Konig <christian.koenig@amd.com >
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-08 11:17:56 -05:00
Shaoyun Liu
c708535e9c
drm/amdgpu: Add WREG32_SOC15_NO_KIQ macro define
...
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-07-14 11:06:10 -04:00
Tom St Denis
496828e786
drm/amd/amdgpu: Add offset variant to SOC15 macros
...
Allows reading/writing via SOC15 macros with offset for
various register banks.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
2017-06-15 11:50:30 -04:00
Tom St Denis
b1bb8c0118
drm/amd/amdgpu: Introduce new read/write macros for SOC15
...
Signed-off-by: Tom St Denis <tom.stdenis@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-04-28 16:37:59 -04:00
Ken Wang
8e3153ba3f
drm/amdgpu: add common soc15 headers
...
These are used by various IP modules.
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:31 -04:00
