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79 Commits

Author SHA1 Message Date
Feifei Xu
7eb32a7012 drm/amdgpu/sdma4: Add clockgating support for vega20 
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-05-17 10:13:14 -05:00
Feifei Xu
84f50e9c80 drm/amdgpu/sdma4: Add vega20 golden settings (v3) 
v2: squash in updates (Alex)
v3: squash in more updates (Alex)

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-05-17 10:13:14 -05:00
Feifei Xu
54a29ef758 drm/amdgpu/sdma4: Specify vega20 firmware 
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-05-17 10:13:14 -05:00
Alex Deucher
4dfe7d7b4e drm/amdgpu/sdma4: add emit_reg_write_reg_wait ring callback (v2) 
This adds support for writing and reading back in a single
oneshot packet.  This is needed to send a tlb invalidation
and wait for ack in a single operation.

v2: squash sdma hang fix into this patch

Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Emily Deng <Emily.Deng@amd.com>
 2018-05-15 13:43:14 -05:00
Alex Deucher
2b816a1d77 drm/amdgpu/sdma4: use a helper for SDMA_OP_POLL_REGMEM 
Rather than opencoding it in a bunch of functions.

Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-04-11 13:07:53 -05:00
Alex Deucher
4a8e06f7aa drm/amdgpu/sdma: fix mask in emit_pipeline_sync 
Needs to be a 32 bit mask.

Acked-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
 2018-04-03 12:52:58 -05:00
Feifei Xu
f06a32e4d2 drm/amdgpu/sdma4: Update vega12 sdma golden setting. 
Update vega12 sdma golden setting.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Ken Wang <ken.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-03-21 14:36:49 -05:00
Hawking Zhang
9acdc00c24 drm/amdgpu/sdma4: add sdma4_0_1 support for vega12 (v3) 
Add sdma golden setting for vega12.

v2: switch to soc15_program_register_sequence for
golden register programming
v3: squash in unused declaration fix

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-03-21 14:36:48 -05:00
Alex Deucher
900bad3fe9 drm/amdgpu/sdma4: add clockgating support for vega12 
Same as vega10 for now.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
 2018-03-21 14:36:48 -05:00
Alex Deucher
607c26a0ea drm/amdgpu/sdma4: Add placeholder for vega12 golden settings 
Fill these in when we get them.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
 2018-03-21 14:36:47 -05:00
Alex Deucher
2e24ada2fc drm/amdgpu/sdma4: specify vega12 firmware 
Declare the firmware and fetch the proper file.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
 2018-03-21 14:36:47 -05:00
Feifei Xu
2f51d6e8e4 drm/amdgpu/sdma4: Remove unused header file from sdma_v4_0.c 
Remove mmhub header files inclusion which not used.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-03-14 16:01:19 -05:00
Alex Deucher
fcb7d51571 drm/amdgpu/sdma4: use num_instances for clock/powergating config 
Rather then relying on the asic type for the second instance.
Makes it more consistent with the rest of the code.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
 2018-03-14 16:01:18 -05:00
Oak Zeng
3760f76cbe drm/amdgpu: Move IH clientid defs to separate file 
This is preparation for sharing client ID definitions
between amdgpu and amdkfd

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-03-14 15:16:35 -05:00
Christian König
57adc4cef6 drm/amdgpu: change amdgpu_ttm_set_active_vram_size 
Instead of setting the active VRAM size directly provide a the info if
we can use the buffer functions or not.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-03-05 15:37:12 -05:00
Emily Deng
6f31fe6ec6 drm/amdgpu: Correct sdma_v4 get_wptr(v2) 
the original method will change the wptr value in wb.
v2:
furthur cleanup

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-28 14:18:07 -05:00
Christian König
c633c00bf0 drm/amdgpu: separate PASID mapping from VM flush v2 
Stuffing the PASID mapping into the VM flush isn't flexible enough since
the PASID mapping changes not as often as we need a VM flush.

v2: add missing use of gmc_v7_0_emit_pasid_mapping

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:20:18 -05:00
Christian König
f732b6b3c0 drm/amdgpu: move waiting for VM flush into gmc_v9_0_emit_flush_gpu_tlb 
Keep that at a common place instead of spread over all engines.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:19:12 -05:00
Christian König
5ad68ee4ca drm/amdgpu: implement sdma_v4_0_ring_emit_reg_wait 
Add emit_reg_wait implementation for SDMA v4.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:19:09 -05:00
Christian König
44e1baeb63 drm/amdgpu: revert "Add support for filling a buffer with 64 bit value" 
This reverts commit 7bdc53f925 and commit
330df03b3a.

Neither are needed any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:55 -05:00
Christian König
2ee150cda7 drm/amdgpu: remove now superflous *_hdp operation 
All HDP invalidation and most flush can now be replaced by the generic
ASIC function.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:22 -05:00
Christian König
9096d6e51a drm/amdgpu: implement gmc_v9_0_emit_flush_gpu_tlb 
Unify tlb flushing for gmc v9.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:09 -05:00
Christian König
4ca54b358b drm/amdgpu: wire up emit_wreg for SDMA v4 
Needed for vm_flush unification.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:04 -05:00
Christian König
5a4633c4b8 drm/amdgpu: forward pasid to backend flush implementations 
rd the pasid from the VM code to the emit_vm_flush function and update
all implementations with the new parameter.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:17:47 -05:00
Christian König
132f34e4b5 drm/amdgpu: move struct gart_funcs into amdgpu_gmc.h 
And rename it to struct gmc_funcs.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Samuel Li <Samuel.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:17:44 -05:00
Christian König
770d13b19f drm/amdgpu: move struct amdgpu_mc into amdgpu_gmc.h 
And rename it to amdgpu_gmc as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Samuel Li <Samuel.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:17:43 -05:00
Christian König
c4f46f22c4 drm/amdgpu: rename vm_id to vmid 
sed -i "s/vm_id/vmid/g" drivers/gpu/drm/amd/amdgpu/*.c
sed -i "s/vm_id/vmid/g" drivers/gpu/drm/amd/amdgpu/*.h

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-27 11:34:02 -05:00
Alex Deucher
131b4b3686 drm/amdgpu: rename amdgpu_wb_* functions 
add device for consistency.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-18 10:59:07 -05:00
Alex Deucher
bf383fb64e drm/amdgpu: convert nbio to use callbacks (v2) 
Cleans up and consolidates all of the per-asic logic.

v2: squash in "drm/amdgpu: fix NULL err for sriov detect" (Chunming)

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-13 17:28:07 -05:00
Christian König
3de676d8e7 drm/amdgpu: allow get_vm_pde to change flags as well 
And also provide the level for which we need a PDE.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-12 14:46:19 -05:00
Shaoyun Liu
4fd09a19a6 drm/admgpu: Reduce the usage of soc15ip.h 
Remove the header where it's not used.

Acked-by: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-08 11:35:19 -05:00
Shaoyun Liu
cd29253f65 drm/amdgpu: Change SOC15_REG_OFFSET to use dynamic register offset 
Acked-by: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-08 11:32:24 -05:00
Shaoyun Liu
946a4d5b30 drm/amdgpu: Avoid use SOC15_REG_OFFSET in static const array 
Handle dynamic offsets correctly in static arrays.

Acked-by: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-08 11:18:51 -05:00
Shaoyun Liu
b466107e8b drm/amdgpu: Use dynamic IP offset for register access on SOC15 
Update the register access macros and functions to take into
account the new dynamic IP base offsets.

Acked-by: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-08 11:17:56 -05:00
Feifei Xu
02cf8837d0 drm/amd/include:cleanup raven1 sdma header files. 
Cleanup asic_reg/raven1/SDMA0 folder.Remove unused sdma0_4_1_sh_mask.h.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:48:23 -05:00
Feifei Xu
fb960bd283 drm/amd/include:cleanup vega10 header files. 
Remove asic_reg/vega10 folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:48:22 -05:00
Feifei Xu
65417d9f55 drm/amd/include:cleanup vega10 mmhub header files. 
Cleanup asic_reg/vega10/MMHUB folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:48:20 -05:00
Feifei Xu
75199b8c7f drm/amd/include:cleanup vega10 hdp header files. 
Cleanup asic_reg/vega10/HDP folder, remove hdp_4_0_default.h

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:48:16 -05:00
Feifei Xu
812f77b749 drm/amd/include:cleanup vega10 sdma0/1 header files. 
To remove include/asic_reg/vega10 folder,create IP folders sdma0/1.
This patch cleanup asic_reg/vega10/SDMA folders.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:48:16 -05:00
Christian König
c47b41a79a drm/amdgpu: remove nonsense const u32 cast on ARRAY_SIZE result 
Not sure what that should originally been good for, but it doesn't seem
to make any sense any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:21 -05:00
pding
9953b72f9c drm/amdgpu: change redundant init logs to debug level 
When this VF stays in exclusive mode for long, other VFs will be
impacted.

The redundant messages causes exclusive mode timeout when they're
redirected. That is a normal use case for cloud service to redirect
guest log to virtual serial port.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: pding <Pixel.Ding@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:33:12 -05:00
Dave Airlie
c6622f3afc amdgpu/nbio: use constant nbio_hdp_flush_reg structs. 
This removes the init path as well, since the init path
just did some constant init of some structs.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-29 12:24:39 -04:00
Monk Liu
c833d8aa4d drm/amdgpu:fix firmware memoryleak(v2) 
this fix memory leak due to request_firmware after driver
unloaded

v2:
release gmc firmware for gmc6/7/8 as well

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 15:14:25 -04:00
Yong Zhao
e6d921974a drm/amdgpu: Add copy_pte_num_dw member in amdgpu_vm_pte_funcs 
Use it to replace the hard coded value in amdgpu_vm_bo_update_mapping().

Signed-off-by: Yong Zhao <yong.zhao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 15:14:22 -04:00
Yong Zhao
7bdc53f925 drm/amdgpu: Fix a bug in amdgpu_fill_buffer() 
When max_bytes is not 8 bytes aligned and bo size is larger than
max_bytes, the last 8 bytes in a ttm node may be left unchanged.
For example, on pre SDMA 4.0, max_bytes = 0x1fffff, and the bo size
is 0x200000, the problem will happen.

In order to fix the problem, we separately store the max nums of
PTEs/PDEs a single operation can set in amdgpu_vm_pte_funcs
structure, rather than inferring it from bytes limit of SDMA
constant fill, i.e. fill_max_bytes.

Together with the fix, we replace the hard code value "10" in
amdgpu_vm_bo_update_mapping() with the corresponding values from
structure amdgpu_vm_pte_funcs.

Signed-off-by: Yong Zhao <yong.zhao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 15:14:21 -04:00
Evan Quan
a49ccdbd1d drm/amd/amgpu: update vega10 sdma golden setting 
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 15:14:15 -04:00
Evan Quan
6fe8542957 drm/amd/amgpu: update raven sdma golden setting 
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 15:14:14 -04:00
Monk Liu
6e2e216fad drm/amdgpu:use formal register to trigger hdp invalidate 
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 15:14:10 -04:00
Hawking Zhang
b416bf14bd drm/amdgpu: ignore digest_size when loading sdma fw for raven 
digest_size has been retired from sdma v4 fw

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-15 14:46:20 -04:00
Alex Deucher
68c3c67fe6 drm/amdgpu/sdma4: move wptr polling setup 
Move it up before ring enablement with all of the other
engine setup and explicitly disable it for bare metal.

Cc: Frank Min <Frank.Min@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-15 14:46:04 -04:00