Before we fixed up the interrupt hierarchy for the SSBI
GPIO controller, we had to use the PM8058 directly to pick
interrupts. After making the interrupt controller work properly,
we can reference the real interrupt parent.
Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add interrupt controller properties now that ssbi-gpio is a proper
hierarchical IRQ chip. The interrupts property is no longer needed so
remove it.
Note that the IRQs started at 24 instead of 192 like all of the other
PMICs. This is the same IRQs as the MPP for this board. qcom-pm8xxx.c
doesn't set the shared IRQs so this is highly likely to be a copy and
paste error.
Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add interrupt controller properties now that ssbi-gpio is a proper
hierarchical IRQ chip. The interrupts property is no longer needed so
remove it.
This change was tested on an APQ8060 DragonBoard.
Signed-off-by: Brian Masney <masneyb@onstation.org>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add interrupt controller properties now that ssbi-gpio is a proper
hierarchical IRQ chip. The interrupts property is no longer needed so
remove it.
This change was not tested on any hardware but the same change was
tested on an APQ8060 DragonBoard with no issues.
Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the PHY as a new node. The PCI-e controller node gains a
phandle property that points to it.
There isn't yet any code in the kernel that uses this device's
registers, but it will be added for a PCIe PLL erratum workaround.
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
The lcd display of the gta04 has a backlight but the backlight
was not referenced in the lcd node, so screen blanking did
not turn off the backlight. Fix that.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Tested-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The Bosch Guardian is a TI am335x based device.
It's hardware specifications are as follows:
* 256 MB DDR3 memory
* 512 MB NAND Flash
* USB OTG
* RS232
* MicroSD external storage
* LCD Display interface
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
[tony@atomide.com: updated to use #include]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Most of the legacy "gpio-key,wakeup" boolean property is already
replaced with "wakeup-source". However few occurrences of old property
has popped up again, probably from the remnants in downstream trees.
Replace the legacy properties with the unified "wakeup-source"
property introduced in the commit 700a38b27e ("Input: gpio_keys -
switch to using generic device properties")
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The EVM consists of a system on module (SOM) and baseboard, and LCD.
This patch adds a DTSI file for the SOM and baseboard separately,
then a wrapper to combine them and specify processor type and a
LCD information.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Now that all sensors supplied by reg_sensors have supported
regulator control, reg_sensors does NOT need to be always ON,
remove "regulator-always-on" to save power.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The mma8451 sensor driver has supported regulators control,
assign the power supplies for mma8451 to enable the control.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The mag3110 sensor driver has supported regulators control,
assign the power supplies for mag3110 to enable the control.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The isl29023 light sensor driver has supported regulator control,
assign the power supply for isl29023 to enable the control.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the Zodiac Digital Tapping Unit, a VF610 based network device with
5 Ethernet ports. One of these ports supports 1000Base-T2.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The pfla02 SoM has a Micrel KSZ9031RNX ethernet phy connected to the FEC,
which needs RX and TX clock skew settings to compensate for differences
in line length. The skew values are taken from barebox commit
4c65c20f1071 ("ARM: pfla02: Set new ethernet phy tx timings"), which
is based on patches originally provided by Phytec:
TX_CLK line is approx. 54mm longer than other TX lines which adds
a delay of 0.36ns. RGMII need a delay of min. 1.0ns. This mean we
have to add a delay of 0.64ns. We choose 0.78 to have a little gap.
This can be done by setting GTX pad skew value to 11100
Also add a delay for the RX delay lines, needed for the Duallite
variant. => Set register 2.8 (RGMII Clock Pad Skew) to 0x039F.
Cc: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The DA9063 device need the required "interrupt-controller" property as
documented by the bindings [1].
[1] Documentation/devicetree/bindings/mfd/da9063.txt
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds the GPIO line names from the schematics to get them displayed
in the debugfs output of each GPIO controller.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
USB_VBUS is a controlled by a Silergy SY6288CCAC-GP 2A Power
Distribution Switch. The name of it's enable GPIO signal is USB_PWR_EN.
VCC5V is supplied by the main power input called PWR_5V_STB. The name of
it's enable GPIO signal is 3V3_5V_EN.
VCC3V3, VCC_DDR3_1V5 and VCCK (the CPU power supply) each use a separate
Silergy SY8089AAC-GP 2A step down regulator. They are all supplied by the
board's main 5V. VCC3V3 and VCC_DDR3_1V5 are fixed regulators while the
voltage of VCCK can be changed by changing it's feedback voltage via
PWM_C.
VCC1V8 is an ABLIC S-1339D18-M5001-GP fixed voltage regulator which is
supplied by VCC3V3.
VCC_RTC is a Global Mixed-mode Technology Inc. G918T12U-GP LDO which. It
is supplied by either VCC3V3 (when the board is powered) or the RTC coin
cell battery.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The INTR32 pin of the IP101GR Ethernet PHY is routed to the GPIOH_3 pad
on the SoC.
Enable the interrupt function of the PHY's INTR32 pin to switch it from
it's default "receive error" mode to "interrupt pin" mode.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
SAR ADC enabled channel 8 can be used to measure the chip temperature.
This can be made available to the hwmon subsystem by using iio-hwmon.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
SAR ADC enabled channel 8 can be used to measure the chip temperature.
This can be made available to the hwmon subsystem by using iio-hwmon.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
SAR ADC enabled channel 8 can be used to measure the chip temperature.
This can be made available to the hwmon subsystem by using iio-hwmon.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The SAR ADC can measure the chip temperature of the SoC. This only
works if the chip is calibrated and if the calibration data is written
to the correct registers. The calibration data is stored in the upper
two bytes of eFuse offset 0x1f4.
This adds the eFuse cell for the temperature calibration data and
passes it to the SAR ADC. We also need to pass the HHI sysctrl node to
the SAR ADC because the 4th TSC (temperature sensor calibration
coefficient) bit is stored in the HHI region (unlike bits [3:0] which
are stored directly inside the SAR ADC's register area).
On boards that have the SAR ADC enabled channel 8 can be used to
measure the chip temperature.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The SAR ADC can measure the chip temperature of the SoC. This only
works if the chip is calibrated and if the calibration data is written
to the correct registers. The calibration data is stored in the upper
two bytes of eFuse offset 0x1f4.
This adds the eFuse cell for the temperature calibration data and
passes it to the SAR ADC. We also need to pass the HHI sysctrl node to
the SAR ADC because the 4th TSC (temperature sensor calibration
coefficient) bit is stored in the HHI region (unlike bits [3:0] which
are stored directly inside the SAR ADC's register area).
On boards that have the SAR ADC enabled channel 8 can be used to
measure the chip temperature.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The SAR ADC on Meson8m2 is slightly different compared to Meson8. The
ADC functionality is identical but the calibration of the internal
thermal sensor is different.
Use the Meson8m2 specific compatible so the temperature sensor is
calibrated correctly on boards using the Meson8m2 SoC.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The clock controller on Meson8/Meson8m2 and Meson8b is part of a
register region called "HHI". This register area contains more
functionality than just a clock controller:
- the clock controller
- some reset controller bits
- temperature sensor calibration data (on Meson8b and Meson8m2 only)
- HDMI controller
Allow access to this HHI register area as "system controller". Also
migrate the Meson8 and Meson8b clock controllers to this new node.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
According to the Odroid-C1+ schematics the Ethernet TXD1 signal is
routed to GPIOH_5 and the TXD0 signal is routed to GPIOH_6.
The public S805 datasheet shows that TXD0 can be routed to DIF_2_P and
TXD1 can be routed to DIF_2_N instead.
The pin groups eth_txd0_0 (GPIOH_6) and eth_txd0_1 (DIF_2_P) are both
configured as Ethernet TXD0 and TXD1 data lines in meson8b.dtsi. At the
same time eth_txd1_0 (GPIOH_5) and eth_txd1_1 (DIF_2_N) are configured
as TXD0 and TXD1 data lines as well.
This results in a bad Ethernet receive performance. Presumably this is
due to the eth_txd0 and eth_txd1 signal being routed to the wrong pins.
As a result of that data can only be transmitted on eth_txd2 and
eth_txd3. However, I have no scope to fully confirm this assumption.
The vendor u-boot sources for Odroid-C1 use the following Ethernet
pinmux configuration:
SET_CBUS_REG_MASK(PERIPHS_PIN_MUX_6, 0x3f4f);
SET_CBUS_REG_MASK(PERIPHS_PIN_MUX_7, 0xf00000);
This translates to the following pin groups in the mainline kernel:
- register 6 bit 0: eth_rxd1 (DIF_0_P)
- register 6 bit 1: eth_rxd0 (DIF_0_N)
- register 6 bit 2: eth_rx_dv (DIF_1_P)
- register 6 bit 3: eth_rx_clk (DIF_1_N)
- register 6 bit 6: eth_tx_en (DIF_3_P)
- register 6 bit 8: eth_ref_clk (DIF_3_N)
- register 6 bit 9: eth_mdc (DIF_4_P)
- register 6 bit 10: eth_mdio_en (DIF_4_N)
- register 6 bit 11: eth_tx_clk (GPIOH_9)
- register 6 bit 12: eth_txd2 (GPIOH_8)
- register 6 bit 13: eth_txd3 (GPIOH_7)
- register 7 bit 20: eth_txd0_0 (GPIOH_6)
- register 7 bit 21: eth_txd1_0 (GPIOH_5)
- register 7 bit 22: eth_rxd3 (DIF_2_P)
- register 7 bit 23: eth_rxd2 (DIF_2_N)
Drop the eth_txd0_1 and eth_txd1_1 groups from eth_rgmii_pins to fix the
Ethernet transmit performance on Odroid-C1. Also add the eth_rxd2 and
eth_rxd3 groups so we don't rely on the bootloader to set them up.
iperf3 statistics before this change:
- transmitting from Odroid-C1: 741 Mbits/sec (0 retries)
- receiving on Odroid-C1: 199 Mbits/sec (1713 retries)
iperf3 statistics after this change:
- transmitting from Odroid-C1: 667 Mbits/sec (0 retries)
- receiving on Odroid-C1: 750 Mbits/sec (0 retries)
Fixes: b96446541d ("ARM: dts: meson8b: extend ethernet controller description")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: Emiliano Ingrassia <ingrassia@epigenesys.com>
Cc: Linus Lüssing <linus.luessing@c0d3.blue>
Tested-by: Emiliano Ingrassia <ingrassia@epigenesys.com>
Reviewed-by: Emiliano Ingrassia <ingrassia@epigenesys.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the stmpe-adc DT node as found on Toradex iMX6 modules
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
A valid WEIM range configuration must specify range entries for
all four chip selects. This fixes an error on boot:
imx-weim: probe of 21b8000.weim failed with error -22
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Phytec phyBOARD Segin is i.MX6 based SBC, available with either an
i.MX6UL or i.MX6ULL SOM and various add-on boards.
The following adds support for the "Full Featured" version of the Segin,
which is provided with the i.MX6UL SOM and the PEB-EVAL-01 evaluation
module.
Its hardware specifications are:
* 512MB DDR3 memory
* 512MB NAND flash
* Dual 10/100 Ethernet
* USB Host and USB OTG
* RS232
* MicroSD external storage
* Audio, RS232, I2C, SPI, CAN headers
* Further I/O options via A/V and Expansion headers
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Since commit d2d0ad2aec ("i2c: imx: use open drain for recovery
GPIO") GPIO lib expects this GPIO to be configured as open drain.
Make sure we define this GPIO as open drain in the device tree.
This gets rid of the following warning:
gpio-81 (scl): enforced open drain please flag it properly in DT/ACPI DSDT/board file
Note that currently the i.MX pinctrl driver does not support
enabling open drain directly, so this patch has no effect in
practice. Open drain is enabled by the fixed pinmux entry.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
esdhc0 is connected to an eMMC, so it is safe to pass the "no-sdio"/"no-sd"
properties.
esdhc1 is wired to a standard SD socket, so pass the "no-sdio" property.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX6ULL has errata ERR010450, there is I/O timing limitation,
for SDR mode, SD card clock can't exceed 150MHz, for DDR mode,
SD card clock can't exceed 45MHz. This patch change to use the
new compatible "fsl,imx6ull-usdhc" to follow this limitation.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Since imx6ulz.dtsi includes imx6ull.dtsi, we only need to fix the compatible
string here to achieve the correct OTP size for both SoCs.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This was implemented in the driver but not actually defined and
referenced in dts. This makes it always on.
From reference manual in section "10.4.1.4.1 Power Distribution":
"Display domain - The DISPLAY domain contains GIS, CSI, PXP, LCDIF,
PCIe, DCIC, and LDB. It is supplied by internal regulator."
The current pd_pcie is actually only for PCIE_PHY, the PCIE ip block is
actually inside the DISPLAY domain. Handle this by adding the pcie node
in both power domains.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The reset signal of the SSD1306 OLED display is actually active-low.
Adapt the DT to reflect the real world.
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Maxime Ripard <maxime.ripard@bootlin.com>,
Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
These have been disable since the change to probe Marvell Ethernet
switches as MDIO devices. Remove the properties now that the code to
suppport them will also be removed soon.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Add du node to r8a7744 SoC DT. Boards that want to enable the DU
need to specify the output topology.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the comphy settings for the Ethernet interfaces.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add the DT description for the Armada 38x common phy.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
The GTA04 has a w2sg0004 or w2sg0084 gps chip. Not detectable
which one is mounted so use the compatibility entry for w2sg0004
for all which will work for both.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Reviewed-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Required for completeness sake to be able to specify
a regulator for devices having a non-optional regulator
property. It corresponds to the "3V3" net in the
schematics.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Reviewed-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
There is one button and a notifier for incoming phone
calls/text messages for which we should wakeup from
suspend.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
There's no need to use an external link when the file is already here.
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
On the Bananapi M3 and Cubietruck Plus, the DC input jacks are wired to
the ACIN pins, which is represented by the AC power supply. Both boards
have connectors for LiPo batteries, which are represented by the battery
power supply.
The H8 Homlet is a set-top box design. The DC input jack is wired to the
ACIN pins, but there are no battery connectors.
Enable these power supplies in the device tree.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The Cubieboard4 has a Realtek RTL8211E ethernet PHY which uses RGMII to
talk to the MAC. The PHY is powered by 2 regulators: cldo1 for the PHY's
core logic and gpio1-ldo for I/O. The latter also powers the SoC side
pins. As there is no binding to model a second regulator supply for the
PHY, it is omitted. It is however properly modeled for the PIO.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The A80 Optimus has a Realtek RTL8211E ethernet PHY which uses RGMII to
talk to the MAC. The PHY is powered by 2 regulators: cldo1 for the PHY's
core logic and gpio1-ldo for I/O. The latter also powers the SoC side
pins. As there is no binding to model a second regulator supply for the
PHY, it is omitted. It is however properly modeled for the PIO.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The GMAC (gigabit ethernet controller) supports RGMII to connect to
the ethernet PHY, for gigabit network speeds.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The A80 has the same GMAC found on the A31 SoC.
Add a device node, and an alias for it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The A80 has the same DWMAC hardware as on earlier Allwinner SoCs. The
accompanying GMAC clock register has been moved into the "System
Control" area.
Add a clock node for it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The Cubieboard 4 has the PMIC providing voltage to all the pin-bank
supply rails from its various regulator outputs. All pin-banks that
have supply rails are accounted for. PN pin-bank does not have a
supply rail.
Also remove any "regulator-always-on" properties from regulators that
were only marked to provide pin-bank power.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The A80 Optimus has the PMIC providing voltage to all the pin-bank
supply rails from its various regulator outputs. All pin-banks that
have supply rails are accounted for. PN pin-bank does not have a
supply rail.
Also remove any "regulator-always-on" properties from regulators that
were only marked to provide pin-bank power.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The DC1SW output from the AXP809 is unused. Unused regulators should
still be listed so as to be considered to be fully constrained.
Fixes: aa4a27bc81 ("ARM: dts: sun9i: a80-optimus: Add AXP809 PMIC device node and regulators")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The databook clearly states that the MSI IRQ (msi_ctrl_int) is a level
triggered interrupt.
The msi_ctrl_int will be high for as long as any MSI status bit is set,
thus the IRQ type should be set to IRQ_TYPE_LEVEL_HIGH, causing the
IRQ handler to keep getting called, as long as any MSI status bit is set.
A git grep shows that ipq4019 is the only SoC using snps,dw-pcie that has
configured this IRQ incorrectly.
Not having the correct IRQ type defined will cause us to lose interrupts,
which in turn causes timeouts in the PCIe endpoint drivers.
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Starting with commit 8947e396a8 ("Documentation: dt: mtd: replace
"nor-jedec" binding with "jedec, spi-nor"") we have "jedec,spi-nor"
binding indicating support for JEDEC identification.
Use it for all flashes that are supposed to support READ ID op according
to the datasheets.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Regarding the 'gpio_keys' device node a dtc reports a couple of
warnings:
Warning (avoid_unnecessary_addr_size): /gpio_keys: unnecessary
#address-cells/#size-cells without "ranges" or child "reg" property
Warning (unit_address_vs_reg): /gpio_keys/button@21: node has
a unit name, but no reg property
The change fixes these issues and adds empty lines between adjacent
children device nodes. The device node itself is renamed by substituting
an underscore by hyphen to follow the standard naming convention
of device tree nodes.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
The change adds a unit address to memory device node, the issue was
reported as a unit_address_vs_reg warning by dtc.
Root device node properties #address-cells and #size-cells were
removed as inherited from lpc32xx.dtsi.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
The change adds a unit address to memory device node, the issue was
reported as a unit_address_vs_reg warning by dtc.
Root device node properties #address-cells and #size-cells were
removed as inherited from lpc32xx.dtsi.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
The change adds description of Sharp LQ035Q7DB03 3.5" 320x240 TFT panel,
which is connected to Phytec phyCORE-LPC3250 board, ARM PrimeCell PL111
LCD controller on NXP LPC3250 SoC gets its configuration appropriately
to support graphics output to the panel.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
The originally added 'regulators' device node has a number of flaws,
to name a few its children has unit addresses but no reg properties,
the regulators are not captured by a device driver due to a missing
'simple-bus' compatible, the regulator names are selected by killing
either alphabetical order or device node grouping property.
The change removes 'regulators' device node and renames the regulators
and labels.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
The fixed voltage regulator on Phytec phyCORE-LPC3250 board, which
supplies SD/MMC card's power, has a constant output voltage level
of either 3.15V or 3.3V, the actual value depends on JP4 position,
the power rail is referenced as VCC_SDIO in the board hardware manual.
Fixes: d06670e962 ("arm: dts: phy3250: add SD fixed regulator")
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
The originally added ARM PrimeCell PL111 clocks property misses
the required "clcdclk" clock, which is the same as a clock to enable
the LCD controller on NXP LPC3230 and NXP LPC3250 SoCs.
Fixes: 93898eb775 ("arm: dts: lpc32xx: add clock properties to device nodes")
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
ARM PrimeCell PL111 LCD controller is found on On NXP LPC3230
and LPC3250 SoCs variants, the original reference in compatible
property to an older one ARM PrimeCell PL110 is invalid.
Fixes: e04920d9ef ("ARM: LPC32xx: DTS files for device tree conversion")
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
After switching to a new interrupt controller scheme by separating SIC1
and SIC2 from MIC interrupt controller just one SoC keypad controller
was not taken into account, fix it now:
WARNING: CPU: 0 PID: 1 at kernel/irq/irqdomain.c:524 irq_domain_associate+0x50/0x1b0
error: hwirq 0x36 is too large for interrupt-controller@40008000
...
lpc32xx_keys 40050000.key: failed to get platform irq
lpc32xx_keys: probe of 40050000.key failed with error -22
Fixes: 9b8ad3fb81 ("ARM: dts: lpc32xx: reparent SIC1 and SIC2 interrupts from MIC")
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
NXP LPC32xx keypad controller requires a clock property to be defined.
The change fixes the driver initialization problem:
lpc32xx_keys 40050000.key: failed to get clock
lpc32xx_keys: probe of 40050000.key failed with error -2
Fixes: 93898eb775 ("arm: dts: lpc32xx: add clock properties to device nodes")
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Add support for MYIR Tech MYD-LPC4357 Development Board and
MY-LCD70TP-C 7" TFT LCD module with Innolux AT070TN82 panel.
The board contains quite rich periferals, the list features
NXP LPC4357 SoC, 32 MB SDRAM, 4 MB SPI Flash, audio input/output
interface, LCD panel, micro SD card slot, USB, USB OTG, Ethernet,
2 CAN ports, 4 UARTs, I2C and SPI interfaces routed to external
interface.
More information can be found on http://www.myirtech.com/list.asp?id=422
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Improve the DTS files by removing all the leading "0x" and zeros to fix
the following dtc warnings:
Warning (unit_address_format): Node /XXX unit name should not have leading "0x"
and
Warning (unit_address_format): Node /XXX unit name should not have leading 0s
Converted using the following command:
find . -type f \( -iname *.dts -o -iname *.dtsi \) -exec sed -i -e "s/@\([0-9a-fA-FxX\.;:#]+\)\s*{/@\L\1 {/g" -e "s/@0x\(.*\) {/@\1 {/g" -e "s/@0+\(.*\) {/@\1 {/g" {} +
For simplicity, two sed expressions were used to solve each warnings
separately.
To make the regex expression more robust a few other issues were resolved,
namely setting unit-address to lower case, and adding a whitespace before
the opening curly brace:
https://elinux.org/Device_Tree_Linux#Linux_conventions
This will solve as a side effect warning:
Warning (simple_bus_reg): Node /XXX@<UPPER> simple-bus unit address format error, expected "<lower>"
This is a follow up to commit 4c9847b737 ("dt-bindings: Remove leading 0x from bindings notation")
Reported-by: David Daney <ddaney@caviumnetworks.com>
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mathieu Malaterre <malat@debian.org>
[vzapolskiy: fixed commit message to pass checkpatch.pl test]
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
The following properties:
- regulator-state-enabled
- regulator-state-disabled
- regulator-state-uv
are not valid ones as per
Documentation/devicetree/bindings/regulator/regulator.txt
Fix it by using the correct properties as per the dt bindings.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The following properties:
- regulator-state-enabled
- regulator-state-disabled
- regulator-state-uv
are not valid ones as per
Documentation/devicetree/bindings/regulator/regulator.txt
Fix it by using the correct properties as per the dt bindings.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
On rv1108-elgin-r1 board the RK805 VCC5 and VCC6 supplies come from
the BUCK2 regulator at 2.2V, so fix the representation in the
device tree.
While at it, rename it from vdd_cam to vdd_buck2, which is a better
name for the regulator label.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
the missing GPIO labels for RPi 2/3. Additionally it contains
some minor DT fixes.
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Merge tag 'tags/bcm2835-dt-next-2019-02-01' into devicetree/next
This pull request adds support for the new Raspberry Pi 3 A+ and
the missing GPIO labels for RPi 2/3. Additionally it contains
some minor DT fixes.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
There is no need to specify a pinctrl for the reset GPIO. So we better
remove this avoid a potential conflict between pinctrl and pwrseq
after the pinmux driver has been changed to strict:
pinctrl-bcm2835 20200000.gpio: pin gpio41 already requested by wifi-pwrseq;
cannot claim for pinctrl-bcm2835:499
pinctrl-bcm2835 20200000.gpio: pin-41 (pinctrl-bcm2835:499) status -22
pwrseq_simple: probe of wifi-pwrseq failed with error -22
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
The GPIO sysfs is deprecated and disabled in the defconfig files.
So in order to motivate the usage of the new GPIO character device API
add the missing GPIO line names for Raspberry Pi 2 and 3. In the lack
of full schematics i would leave all undocumented pins as unnamed.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
The RPI 3 B+ provides control to both LEDs (PWR and ACT). So append
the first letter of the LED color (like in the schematics) in order
to clarify this.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
This make the GPIO label for HDMI hotplug more consistent to the other
boards.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
According to the schematics for all RPis with a 40 pin header,
the GPIOs 0 and 1 are labeled as ID_SD and ID_SC. In order to
clarify that is a I2C bus, append the third letter.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Compiling the bcm2835-rpi.dtsi with W=1 leads to the following warning:
Warning (avoid_unnecessary_addr_size): /soc/firmware: unnecessary
#address-cells/#size-cells without "ranges" or child "reg" property
Fix this by removing these unnecessary properties.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Compiling the bcm283x DTS with W=1 leads to the following warning:
Warning (unit_address_vs_reg): /memory: node has a reg or ranges property,
but no unit name
Fix this by adding the unit address.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
The Raspberry Pi 3 A+ is similar to the Pi 3 B+ but has only 512 MB RAM,
1 USB 2.0 port and no Ethernet.
Compared to the Raspberry Pi 3 B it isn't possible to control BT_ON and
WL_ON separately.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Acked-by: Eric Anholt <eric@anholt.net>
This patch adds all SPI instances of the STM32F429 SoC.
Signed-off-by: Cezary Gapinski <cezary.gapinski@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
The GRAFX domain only contains V3D, and this driver should be the only
accessor of V3D (firmware usage gets disabled when V3D is in the DT),
so we can safely make Linux control the GRAFX and GRAFX_V3D power
domains.
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
It was covering part of the PM block's range, up to the WDT regs. To
support the rest of the PM block's functionality, we need the full
register range plus the AXI Async Bridge regs for PM sequencing.
This doesn't convert any of the consumers over to the new binding yet,
since we will need to be careful in coordinating our usage of firmware
services that might power domains on and off versus the bcm2835-pm
driver's access of those same domains.
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
This router has BCM4709C0 SoC, 128 MiB NAND flash (MX30LF1G18AC-TI),
512 MiB memory and 3 x LAN and 1 x WAN ports. WiFi chips are
BCM4366C0 x 2. The router has a small LCD and 3 capactive keys driven by
a PIC microcontroller, which is in turn wired to UART1 of main board.
Signed-off-by: Hao Dong <halbertdong@gmail.com>
[rmilecki: drop chosen { }, fix whitespaces, update commit message]
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Couple of simple changes to add dynamic-power-coefficient information
for CPUs on TC2 and fix tuple used for uart and mmci interrupts with
lists.
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Merge tag 'vexpress-updates-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt
ARMv7 Vexpress updates for v5.1
Couple of simple changes to add dynamic-power-coefficient information
for CPUs on TC2 and fix tuple used for uart and mmci interrupts with
lists.
* tag 'vexpress-updates-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm: dts: vexpress-v2p-ca15_a7: Add cpu dynamic-power-coefficient information
ARM: dts: vexpress: use list instead of tuple for mmci interrupts
ARM: dts: mps2: use list instead of tuple for uart interrupts
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
As usual, this is a random assortment of changes:
- ARM PMU is enabled on the A10
- The first usage of the PIO pinbank regulator supplies added,
for the Bananapi
- Broadcom-based Bluetooth enabled on the Bananapi M2 Magic and M2
Ultra, using the serdev bindings
- Video codec added for the A10
- Display pipeline for the A23 added and enabled for the generic Q8
tablets
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Merge tag 'sunxi-dt-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
Allwinner DT changes for 5.1
As usual, this is a random assortment of changes:
- ARM PMU is enabled on the A10
- The first usage of the PIO pinbank regulator supplies added,
for the Bananapi
- Broadcom-based Bluetooth enabled on the Bananapi M2 Magic and M2
Ultra, using the serdev bindings
- Video codec added for the A10
- Display pipeline for the A23 added and enabled for the generic Q8
tablets
* tag 'sunxi-dt-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sun8i-a23-q8: Set compatible string for LCD panel
ARM: dts: sun8i-q8-common: Enable display pipeline with RGB LCD panel
ARM: dts: sun8i-a23: Add compatible strings to display pipeline device nodes
ARM: dts: sun8i-a33: Move display pipeline nodes to a23/a33 common dtsi
ARM: dts: sun8i-a23-a33: Move NAND controller device node to sort by address
ARM: dts: sun4i-a10: Add Video Engine and reserved memory nodes
ARM: dts: sun4i: Add support for the C1 SRAM region with the SRAM controller
ARM: dts: sunxi: bananapi-m2-plus: Add Bluetooth device node
ARM: dts: sun8i: r40: bananapi-m2-ultra: Add Bluetooth device node
ARM: dts: sun8i: r40: bananapi-m2-ultra: Fix WiFi regulator definitions
ARM: dts: sun8i: r40: Add pinmux setting for CLK_OUT_A
ARM: dts: sun8i: r40: Add pinmux settings for UART3 on PG pingroup
ARM: dts: sun7i: bananapi: Add GPIO banks regulators
ARM: dts: sun4i-a10: Add PMU node
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
tree nodes required by the DRM driver.
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Merge tag 'integrator-dts-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into arm/dt
This updates the Integrator DTS files with the device
tree nodes required by the DRM driver.
* tag 'integrator-dts-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: dts: Augment panel setting for Integrator/CP
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
nodes to the Nomadik NHK8815.
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Merge tag 'nomadik-dts-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt
This add the new display driver and DRM driver device
nodes to the Nomadik NHK8815.
* tag 'nomadik-dts-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: nomadik: Augment NHK15 panel setting
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Remove the usage of skeleton.dtsi in the remaining dts files. It was
deprecated since commit 9c0da3cc61 ("ARM: dts: explicitly mark
skeleton.dtsi as deprecated"). This will make adding a unit-address to
memory nodes easier.
The main tricky part to removing skeleton.dtsi is we could end up with
no /memory node at all when a bootloader depends on one being present. I
hacked up dtc to check for this condition.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Antoine Tenart <antoine.tenart@bootlin.com>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Tested-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Highlights:
----------
-MPU STM32MP157 platform update:
-Declare DMAs for timers
-Add sleep support for CAN
-Split CAN RAM mapping between the 2 FDCAN instances
-Add support of thermal sensor (DTS)
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Merge tag 'stm32-dt-for-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT updates for v4.21, round 1
Highlights:
----------
-MPU STM32MP157 platform update:
-Declare DMAs for timers
-Add sleep support for CAN
-Split CAN RAM mapping between the 2 FDCAN instances
-Add support of thermal sensor (DTS)
* tag 'stm32-dt-for-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
ARM: dts: stm32: add thermal sensor support on STM32MP157c
ARM: dts: stm32: add can1 sleep pins muxing on stm32mp157c-ev1 board
ARM: dts: stm32: add can1 sleep pins muxing
ARM: dts: stm32: change CAN RAM mapping on stm32mp157c
ARM: dts: stm32: don't use timers dmas on stm32mp157c-ev1
ARM: dts: stm32: don't use timers dmas on stm32mp157c-ed1
ARM: dts: stm32: Add dmas to timer on stm32mp157c
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Convert to new LVDS DT bindings fixing a regression introduced in v4.17
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Merge tag 'renesas-fixes3-for-v5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into arm/fixes
Third Round of Renesas ARM Based SoC Fixes for v5.0
* Convert to new LVDS DT bindings fixing a regression introduced in v4.17
* tag 'renesas-fixes3-for-v5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: dts: r8a7743: Convert to new LVDS DT bindings
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
A couple of device tree fixes for the 5.0 cycle:
- Add missing clock-output-names for the osc24M clock on sun6i/A31
The Linux clock driver uses the device node as the clock name if
the property is missing. The node name was changed in 5.0-rc1,
breaking a subtle dependency in the sunxi-ng clock driver, and
renders Linux unable to completely boot up.
- Add alias for Ethernet controller on Beelink X2
This allows the bootloader to assign a deterministically generated
MAC address to it.
- Add property to enable USB VBUS regulator on OrangePi Win
The board had defined the constraints for the regulator, but was
missing the property to actually enable it.
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Merge tag 'sunxi-fixes-for-5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes
Allwinner Fixes for 5.0
A couple of device tree fixes for the 5.0 cycle:
- Add missing clock-output-names for the osc24M clock on sun6i/A31
The Linux clock driver uses the device node as the clock name if
the property is missing. The node name was changed in 5.0-rc1,
breaking a subtle dependency in the sunxi-ng clock driver, and
renders Linux unable to completely boot up.
- Add alias for Ethernet controller on Beelink X2
This allows the bootloader to assign a deterministically generated
MAC address to it.
- Add property to enable USB VBUS regulator on OrangePi Win
The board had defined the constraints for the regulator, but was
missing the property to actually enable it.
* tag 'sunxi-fixes-for-5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: a64: Fix USB OTG regulator
ARM: dts: sun8i: h3: Add ethernet0 alias to Beelink X2
ARM: dts: sun6i: Add clock-output-names to osc24M clock
arm64: dts: allwinner: a64: Fix the video engine compatible
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Amlogic fixes for v5.0-rc, round 2
- several fixups for the GPIO cd-inverted change
- IRQ trigger fixes for MAC IRQ
* tag 'amlogic-fixes-2.1' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
arm64: dts: meson: Fix mmc cd-gpios polarity
ARM: dts: meson8m2: mxiii-plus: mark the SD card detection GPIO active-low
ARM: dts: meson8b: ec100: mark the SD card detection GPIO active-low
ARM: dts: meson8b: odroidc1: mark the SD card detection GPIO active-low
arm: dts: meson: Fix IRQ trigger type for macirq
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Device tree fixes for omaps for v5.0-rc cycle
This series of dts fixes for omap devices fixes several device specific
regressions:
- The onenand timings for n950/n9 have been wrong for a while since
we moved to dts based timings
- A typo for the cpcap pmic is now producing erors during boot as the
level should be 0 for unconfigurable triggering instead of 1
- Changes for ti-sysc for omap5 left uart3 with debug flags that should
not be set
- Fix a new dtc warning started showing up for omap3-gta04 grap_port
- With the generic MMC card detection code we need to fix the gpio
in dts for n900 and am335x-shc
* tag 'omap-for-v5.0/fixes-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x-shc.dts: fix wrong cd pin level
ARM: dts: n900: fix mmc1 card detect gpio polarity
ARM: dts: omap3-gta04: Fix graph_port warning
ARM: dts: Remove unnecessary idle flags for omap5 uart3
ARM: dts: omap4-droid4: Fix typo in cpcap IRQ flags
ARM: OMAP: dts: N950/N9: fix onenand timings
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This fixes a long standing typo in device-tree for DA850 in interrupt
number for timer. It did not affect us so far because we use non-DT
timer driver within mach-davinci. This was caught while migrating to
clocksource driver.
* tag 'davinci-fixes-for-v5.0-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: dts: da850: fix interrupt numbers for clocksource
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Fix spi_bus_bridge DTC warning by correcting '#address-cells' of
dspi3 node on vf610-bk4 board, as it's being used a SPI slave
controller there.
- Replace deprecated gpio-key,wakeup property with wakeup-source for
board imx6q-pistachio and imx6sll-evk, into which the deprecated
property sneaked during the merge window.
- Correct the backward compatible for i.MX6SX GPT device, as it's
actually compatible with i.MX6DL GPT rather than i.MX31 one.
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Merge tag 'imx-fixes-5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.0:
- Fix spi_bus_bridge DTC warning by correcting '#address-cells' of
dspi3 node on vf610-bk4 board, as it's being used a SPI slave
controller there.
- Replace deprecated gpio-key,wakeup property with wakeup-source for
board imx6q-pistachio and imx6sll-evk, into which the deprecated
property sneaked during the merge window.
- Correct the backward compatible for i.MX6SX GPT device, as it's
actually compatible with i.MX6DL GPT rather than i.MX31 one.
* tag 'imx-fixes-5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx6sx: correct backward compatible of gpt
ARM: dts: imx: replace gpio-key,wakeup with wakeup-source property
ARM: dts: vf610-bk4: fix incorrect #address-cells for dspi3
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enable the uart1 node such that the clock will be enabled.
Signed-off-by: Patrick Venture <venture@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Enable the lpc_ctrl node in the quanta-q71l dts such that the LPC_CLK is
enabled.
Signed-off-by: Patrick Venture <venture@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Added uart2 and uart3 in Facebook Tiogapass for routing serial input
from Host to BMC for SoL via LPC.
Signed-off-by: Vijay Khemka <vijaykhemka@fb.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Added lpc control for enabling lpc clock and lpc snoop devices to
Facebook Tiogapass device tree.
Signed-off-by: Vijay Khemka <vijaykhemka@fb.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add reset property for dma, can and sdram on socfpga gen5.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Commit 84badc5ec5 ("ARM: dts: omap4: Move l4 child devices to probe
them with ti-sysc") moved some omap4 timers to probe with ti-sysc
interconnect target module. Turns out this broke pwm-omap-dmtimer
for reparenting of the timer clock.
With ti-sysc, we can now configure the clock sources in the dts with
assigned-clocks and assigned-clock-parents.
Fixes: 84badc5ec5 ("ARM: dts: omap4: Move l4 child devices to probe them with ti-sysc")
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: H. Nikolaus Schaller <hns@goldelico.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Ladislav Michl <ladis@linux-mips.org>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Sebastian Reichel <sre@kernel.org>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Reported-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
A CPUfreq driver, like the ARM big.LITTLE driver used on the TC2 board,
which provide the Energy Model with power cost information via the
PM_OPP of_dev_pm_opp_get_cpu_power() function, do need the
dynamic-power-coefficient (C) in the device tree.
Method used to obtain the C value:
C is computed by measuring energy (E) consumption of a frequency domain
(FD) over a 10s runtime (t) sysbench workload running at each Operating
Performance Point (OPP) affine to 1 or 2 CPUs of that FD while the other
CPUs of the system are hotplugged out.
By definition all CPUs of a FD have the the same micro-architecture. An
OPP is characterized by a certain frequency (f) and voltage (V) value.
The corresponding power values (P) are calculated by dividing the delta
of the E values between the runs with 2 and 1 CPUs by t.
With n data tuples (P, f, V), n equal to number of OPPs for this
frequency domain, we can solve C by:
P = Pstat + Pdyn
P = Pstat + CV²f
Cx = (Px - P1)/(Vx²fx - V1²f1) with x = {2, ..., n}
The C value is the arithmetic mean out of {C2, ..., Cn}.
Signed-off-by: Dietmar Eggemann <dietmar.eggemann@arm.com>
Signed-off-by: Quentin Perret <quentin.perret@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The compatible string for the LCD panel used for the Q8 tablets are just
a placeholder that was shown to be compatible with the actual panels
found on these devices. The real panels do not have any identifiable
markings and vary between production runs.
The compatibe string previously used had a pixel clock that could not
be accurately reproduced on Allwinner hardware, and discussions on
whether a margin should be added to the display drivers and how large
a margin was acceptable had stalled.
Now that we have a panel model that is actually used with Allwinner
hardware, has the same dimensions, and the timings have been shown to
work with the nameless panels, we can use that one instead.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The A13 Q8 tablet, following the A13 reference tablet design, has the
system's fixed 3.3V rail feed the VCC supply of the LCD panel.
Additional voltage rails used by the panel are generated using a
regulator fed from the unregulated IPSOUT output of the PMIC. The latter
is unrepresentable in the device tree. Both are controlled with MOSFETs
by the enable GPIO added in the previous patch. The actual enable or
reset pin for the panel is tied directly to LCD-VCC after the MOSFET.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Now that we support the AXP209 GPIOs, we can toggle the LCD panel enable
line. Add the GPIO phandle to the panel.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The panel backlight and enable GPIO comments were incorrectly placed
in the input port, while it should have been in the panel node itself.
Move them to the correct position.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Now that we support the GPIOs on the AXP209, we can control the LCD
backlight with them.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The mmc.txt didn't explicitly say disable-wp is for SD card slot
only, but that is what it was designed for in the first place.
Remove all disable-wp from emmc or sdio controller.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The change removes redundant #address-cells and #size-cells properties from
gpio-keys-polled compatible device nodes found in lpc4357-ea4357-devkit and
lpc4350-hitex-eval board DTS files.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Commit 225da7e65a ("ARM: dts: add eMMC reset line for
exynos4412-odroid-common") added MMC power sequence for eMMC card of
Odroid X2/U3. It reused generic sd1_cd pin control configuration node
and only disabled pull-up. However that time the pinctrl configuration
was not applied during MMC power sequence driver initialization. This
has been changed later by commit d97a1e5d7c ("mmc: pwrseq: convert to
proper platform device").
It turned out then, that the provided pinctrl configuration is not
correct, because the eMMC_RTSN line is being re-configured as 'special
function/card detect function for mmc1 controller' not the simple
'output', thus the power sequence driver doesn't really set the pin
value. This in effect broke the reboot of Odroid X2/U3 boards. Fix this
by providing separate node with eMMC_RTSN pin configuration.
Cc: <stable@vger.kernel.org>
Reported-by: Markus Reichl <m.reichl@fivetechno.de>
Suggested-by: Ulf Hansson <ulf.hansson@linaro.org>
Fixes: 225da7e65a ("ARM: dts: add eMMC reset line for exynos4412-odroid-common")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The Q8 tablets follow the A23/A33 tablet reference design, and normally
use a "generic" 800x480 LCD panel. The actual panel may vary between
production runs, and there are no visible markings denoting its model.
This patch uses a panel that has the same dimensions and timings that
are close to what was provided in the vendor fex files.
Since there are also A33 Q8 tablets with 1024x600 panels, this patch
only sets the compatible string for A23 Q8 tablets.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The Q8 design for A23/A33 tablets have an 18-bit RGB LCD panel connected
to the LCD interface on the SoC, the DC1SW output on the PMIC providing
power for the LCD, and PH7 toggling the reset pin for the panel.
This patch adds a device node for the panel, describing the above, and
enables the display pipeline.
The actual model or compatible string for the panel should be added in
the tablet device tree file.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Now that the compatible strings for the display pipeline on the A23 have
been added to the bindings, add the corresponding compatibles to the
device nodes already in the A23/A33 shared dtsi.
While the A23 has the TCON ch1 clock defined in the CCU, and the channel
1 registers are available, it does not have any means to use channel 1
due to a lack of downstream encoders, and the enable bit for channel 1 is
hard-wired to 0 (off). Hence the ch1 clock is left out.
As the MIPI DSI output device is not officially documented, and there
are no reference devices to test it, it is not covered by this patch.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The display pipeline has the same structure, resources and connections
on both the A23 and A33. The differences include:
- compatible strings
- extra clock, reset control, and IO region for SAT in the backend
only found on the A33
- missing ch1 clock for the TCON
However, while the A23 has the TCON ch1 clock defined in the CCU, and
the channel 1 registers are available, it does not have any means to
use channel 1 due to a lack of downstream encoders, and the enable bit
for channel 1 is hard-wired to 0 (off).
As the MIPI DSI output device is not officially documented, and there
are no A23 reference devices to test it, it is not covered by this
patch.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The NAND controller device node was inserted into the wrong position,
probably due to a rebase or merge, as the file's structure does not
provide enough context for git to accurately match the previous device
node block.
Fixes: d7b843df13 ("ARM: dts: sun8i: add NAND controller node for A23/A33")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
This is an ARM + FPGA instrumentation board used at telescopes in
Antarctica, Chile, and Canada:
https://pole.uchicago.edu/https://arxiv.org/abs/1608.03025https://chime-experiment.ca/
With these commits and a suitable userspace, we can boot the board, load
a FPGA bitstream, and communicate with the RTL design. Most of the board's
telemetry sensors (temperatures, voltages) are functional but detailed
testing is to follow.
We are weaning ourselves off TI's "official" kernel for this SOC, which
has been stuck at 2.6.37 and is not really fit for use. To anyone at TI:
despite good silicon and some dedicated support enginers, your
open-source software strategy for these parts has not worked well.
Please get in touch with me if you'd like to have a constructive
discussion about ways to improve it.
Signed-off-by: Graeme Smecher <gsmecher@threespeedlogic.com>
[tony@atomide.com: dropped fpga@1 as linux,spidev is still undocumented]
Signed-off-by: Tony Lindgren <tony@atomide.com>
GPIO3/4 and MCSPI2/3/4 are now present. Lightly tested on am3874
platform.
Signed-off-by: Graeme Smecher <gsmecher@threespeedlogic.com>
[tony@atomide.com: split to apply hwmod and dts changes separately]
Signed-off-by: Tony Lindgren <tony@atomide.com>
The ethernet works in kernel only if we use some binary u-boot from the
past which have support for KS8851.
The u-boot sources are not available for this mysterious u-boot image
people tends to hold on... Mainline u-bott does not have ethernet support
for sdp4430 and if we use that the ethernet is not working.
After some debugging I have managed to get the ethernet working with
mainline u-boot while not breaking the networking with the case when we
boot with the mysterious binary u-boot.
Basically we were missing bunch of pinmux settings and the 'magic'
gpio_138 handling in kernel.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Most of the legacy "linux,wakeup" boolean property is already replaced
with "wakeup-source". However few occurrences of old property has popped
up again, probably from the remnants in downstream trees.
Replace the legacy properties with the unified "wakeup-source" property
introduced in the commit aeda5003d0 ("Input: matrix_keypad - change
name of wakeup property to "wakeup-source"")
Cc: "Benoît Cousson" <bcousson@baylibre.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: linux-omap@vger.kernel.org
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Remove the unnecessary properties #address-cells and #size-cells
of node pinmux as there are no child-nodes with property reg.
Signed-off-by: Felix Brack <fb@ltec.ch>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add interrupt controller properties now that spmi-gpio is a proper
hierarchical IRQ chip. The interrupts property is no longer needed so
remove it.
This change was not tested on any hardware but the same change was
tested on qcom-pm8941.dtsi using a LG Nexus 5 (hammerhead) phone with
no issues.
Signed-off-by: Brian Masney <masneyb@onstation.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add interrupt controller properties now that spmi-gpio is a proper
hierarchical IRQ chip. The interrupts property is no longer needed so
remove it. Code was tested on the LG Nexus 5 (hammerhead) phone.
Signed-off-by: Brian Masney <masneyb@onstation.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The CSI controller found on the H3 (and H5) is a reduced version of the
one found on the A31. It only has 1 channel, instead of 4 channels for
time-multiplexed BT.656. Since the H3 is a reduced version, it cannot
"fallback" to a compatible that implements more features than it
supports.
Drop the A31 fallback compatible.
Fixes: f89120b6f5 ("ARM: dts: sun8i: Add the H3/H5 CSI controller")
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Commit 83a86fbb5b ("irqchip/gic: Loudly complain about the use of
IRQ_TYPE_NONE") started warning about incorrect dts usage for irqs.
ARM GIC only supports active-high interrupts for SPI (Shared Peripheral
Interrupts), and the Palmas PMIC by default is active-low.
Palmas PMIC allows changing the interrupt polarity using register
PALMAS_POLARITY_CTRL_INT_POLARITY, but configuring sys_nirq1 with
a pull-down and setting PALMAS_POLARITY_CTRL_INT_POLARITY made the
Palmas RTC interrupts stop working. This can be easily tested with
kernel tools rtctest.c.
Turns out the SoC inverts the sys_nirq pins for GIC as they do not go
through a peripheral device but go directly to the MPUSS wakeupgen.
I've verified this by muxing the interrupt line temporarily to gpio_wk16
instead of sys_nirq1. with a gpio, the interrupt works fine both
active-low and active-high with the SoC internal pull configured and
palmas polarity configured. But as sys_nirq1, the interrupt only works
when configured ACTIVE_LOW for palmas, and ACTIVE_HIGH for GIC.
Note that there was a similar issue earlier with tegra114 and palmas
interrupt polarity that got fixed by commit df545d1cd0 ("mfd: palmas:
Provide irq flags through DT/platform data"). However, the difference
between omap5 and tegra114 is that tegra inverts the palmas interrupt
twice, once when entering tegra PMC, and again when exiting tegra PMC
to GIC.
Let's fix the issue by adding a custom wakeupgen_irq_set_type() for
wakeupgen and invert any interrupts with wrong polarity. Let's also
warn about any non-sysnirq pins using wrong polarity. Note that we
also need to update the dts for the level as IRQ_TYPE_NONE never
has irq_set_type() called, and let's add some comments and use proper
pin nameing to avoid more confusion later on.
Cc: Belisko Marek <marek.belisko@gmail.com>
Cc: Dmitry Lifshitz <lifshitz@compulab.co.il>
Cc: "Dr. H. Nikolaus Schaller" <hns@goldelico.com>
Cc: Jon Hunter <jonathanh@nvidia.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Laxman Dewangan <ldewangan@nvidia.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
Cc: Santosh Shilimkar <ssantosh@kernel.org>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Thierry Reding <treding@nvidia.com>
Cc: stable@vger.kernel.org # v4.17+
Reported-by: Belisko Marek <marek.belisko@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
cd pin on mmc1 is GPIO_ACTIVE_LOW not GPIO_ACTIVE_HIGH
Fixes: e63201f194 ("mmc: omap_hsmmc: Delete platform data GPIO CD and WP")
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We're currently getting a warning with make dtbs:
arch/arm/boot/dts/omap3-gta04.dtsi:720.7-727.4: Warning (graph_port):
/ocp@68000000/dss@48050000/encoder@48050c0 0/port: graph node unit
address error, expected "0"
Tested-by: H. Nikolaus Schaller <hns@goldelico.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Wrong polarity of card detect GPIO pin leads to the system not
booting from external mmc, if the back cover of N900 is closed.
When the cover is open the system boots fine.
This wasn't noticed before, because of a bug, which was fixed
by commit e63201f19 (mmc: omap_hsmmc: Delete platform data GPIO
CD and WP).
Kernels up to 4.19 ignored the card detect GPIO from DT.
Fixes: e63201f194 ("mmc: omap_hsmmc: Delete platform data GPIO CD and WP")
Signed-off-by: Arthur Demchenkov <spinal.by@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch enable HDMI output on sun8i-h3-nanopi-m1-plus.
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Add support for Renesas RZ/A2M evaluation board.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Basic support for the RZ/A2 (R7S9210) SoC.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The internal LVDS encoder now has DT bindings separate from the DU. Port
the device tree over to the new model.
Fixes: c6a27fa41f ("drm: rcar-du: Convert LVDS encoder code to bridge driver")
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch is to add external trigger stamp fifo support
for 1588 timer.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
The disassembled DTB are almost the same besides an empty chosen
node being removed and nodes reordered, so it should not have
functional changes.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add the device tree bindings for USB OTG support. Driver was tested
using on a LG Nexus 5 (hammerhead) phone. This patch is based on work
from Jonathan Marek and from the other msm8974 devices.
Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds the gpio-ranges property to pm8941_gpios so that the GPIO
pins are initialized by the GPIO framework and not pinctrl. This fixes
a circular dependency so GPIO hogging can be used on this board.
Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds WiFi support to the LG Nexus 5 (hammerhead) phone.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
[masneyb@onstation.org: Enabled wlan_regulator_pin and wlan_sleep_clk_pin]
Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
All the GSBI blocks are marking their GIC IRQ lines as
"IRQ_TYPE_NONE" but there is no such thing: all GIC IRQ
lines have a trigger type.
That yields the following warning from the GIC driver:
WARNING: CPU: 0 PID: 1 at ../drivers/irqchip/irq-gic.c:1016
gic_irq_domain_translate+0xdc/0xe4
(...)
Mark all of these IRQ_TYPE_LEVEL_HIGH as is common so this
warning goes away.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The GSBI module complains:
gsbi 16500000.gsbi: missing mode configuration
gsbi: probe of 16500000.gsbi failed with error -22
gsbi 16600000.gsbi: missing mode configuration
gsbi: probe of 16600000.gsbi failed with error -22
gsbi 19800000.gsbi: GSBI port protocol: 2 crci: 0
So we should mark these GSBIs as "disabled" in the SoC
file by default.
If boards appear that make use of them, we can simply
set status = "ok" in the DTS for them.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Vexpress motherboard MMCI requires dedicated interrupts for CMD and PIO,
which obviously should be expressed as a list. Current form uses tuple
and it works fine since interrupt-cells equal to 1.
Reported-by: Vladimir Murzin <vladimir.murzin@arm.com>
Reviewed-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
MPS2 UART requires dedicated interrupts for RX, TX and overflow, which
obviously should be expressed as a list. Current form uses tuple and
it has worked so far because NVIC has interrupt-cells equal to 1.
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The Inspur on5263m5 is an Intel Xeon OCP server that uses the ASPEED
AST2500 BMC.
Signed-off-by: John Wang <wangzqbj@inspur.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
[joel: Rework commit message]
Signed-off-by: Joel Stanley <joel@jms.id.au>
This adds nodes for the Video Engine and the associated reserved memory
for the A10. Up to 96 MiB of memory are dedicated to the CMA pool.
The VPU can only map the first 256 MiB of DRAM, so the reserved memory
pool has to be located in that area. Following Allwinner's decision in
downstream software, the last 96 MiB of the first 256 MiB of RAM are
reserved for this purpose.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
This adds support for the C1 SRAM region (to be used with the SRAM
controller driver) for the A10 platform. The region is shared
between the Video Engine and the CPU.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Based on Rev. 1.00 of the R-Car H1 datasheet.
Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The timer interrupts specified in commit 3652e2741f ("ARM: dts:
da850: Add clocks") are wrong but since the current timer code
hard-codes them, the bug was never spotted.
This patch must go into stable since, once we introduce a proper
clocksource driver, devices with buggy device tree will stop booting.
Fixes: 3652e2741f ("ARM: dts: da850: Add clocks")
Cc: stable@vger.kernel.org
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Added ADC and other sensor devices present in the Facebook Tiogapass
machine.
Signed-off-by: Vijay Khemka <vijaykhemka@fb.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
This adds the description of the four Keyboard Controller Style (KCS)
IPMI communication channels present in the ASPEED BMC. They are disabled
by default.
Signed-off-by: Vijay Khemka <vijaykhemka@fb.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Allows the GPIO controller to be used as an interrupt parent.
of_irq_find_parent() skips interrupt controller nodes that do
not have the #interrupt-cells property.
Signed-off-by: Mark Walton <mark.walton@serialtek.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add Delta Electronics power supply DPS-650-AB.
Signed-off-by: Xiaoting Liu <xiaoting.liu@hxt-semitech.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Device tree binding of Memory Controller has been changed: GART has been
squashed into the MC, there are a new mandatory clock and #iommu-cells
properties, the compatible has been changed to 'tegra20-mc-gart'.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Add reset property for gpio, i2c, sdmmc, nand, qspi, spi, uart, and
watchdog on base socfpga and socfpga_arria10.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
This matches licensing used by other BCM53573 files and BCM5301X.
Signed-off-by: Dan Haab <dan.haab@luxul.com>
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
They are all device tree fixes which also worth being in stable:
- Reserve PSCI area on Armada 7K/8K preventing the kernel accessing
this area and crashing while doing it.
- Use correct PCIe reset signal on MACCHIATOBin (Armada 8040 based)
- Fix polarity of GPIO fan line D-Link DNS NASes(kikwood based)
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Merge tag 'mvebu-fixes-5.0-1' of git://git.infradead.org/linux-mvebu into fixes
mvebu fixes for 5.0
They are all device tree fixes which also worth being in stable:
- Reserve PSCI area on Armada 7K/8K preventing the kernel accessing
this area and crashing while doing it.
- Use correct PCIe reset signal on MACCHIATOBin (Armada 8040 based)
- Fix polarity of GPIO fan line D-Link DNS NASes(kikwood based)
* tag 'mvebu-fixes-5.0-1' of git://git.infradead.org/linux-mvebu:
ARM: dts: kirkwood: Fix polarity of GPIO fan lines
arm64: dts: marvell: mcbin: fix PCIe reset signal
arm64: dts: marvell: armada-ap806: reserve PSCI area
Signed-off-by: Olof Johansson <olof@lixom.net>
i.MX6SX has same GPT type as i.MX6DL, in GPT driver, it uses
below TIMER_OF_DECLARE, so the backward compatible should be
"fsl,imx6dl-gpt", correct it.
TIMER_OF_DECLARE(imx6sx_timer, "fsl,imx6sx-gpt", imx6dl_timer_init_dt);
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
rv1108-elgin-r1 board is based on Rockchip RV1108 SoC.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the pin settings for the SPI pins so they can be used across
multiple boards.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Pass the 'dma-names' property to the SPI ports so that DMA can
be supported.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds the core display subsystem and vop nodes to rk3066.
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Define the required properties to enable I2C bus recovery supported by
the I2C subsystem.
This patch adds GPIO based I2C fault injector for Digi Connectcore SOM.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds definitions for ESDHC1 for Digi Connectore SOM & JSK.
This interface can be used to boot a module.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
In fact, the RTC battery can only be connected outside the module,
so this patch moves the PMIC RTC property and its power from SOM dts
to JSK.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The interrupt controller is located at the physical address 0x10040000.
This patch changes the unit name of the controller to reflect the actual
address.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Most of the legacy "gpio-key,wakeup" and "enable-sdio-wakeup" boolean
properties are already replaced with "wakeup-source". However few
occurrences of old property has popped up again, probably from the
remnants in downstream trees. Almost all of those were remove couple
of years back.
Replace the legacy properties with the unified "wakeup-source" property
introduced in the commit 700a38b27e ("Input: gpio_keys - switch to using
generic device properties") and commit 0dbcdc0622 ("mmc: core: enable
support for the standard "wakeup-source" property")
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: NXP Linux Team <linux-imx@nxp.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The dspi3 is used as slave controller on vf610-bk4, and the default
'#address-cells = <1>;' setting in vfxxx.dtsi causes the following DTC
warning.
DTC arch/arm/boot/dts/vf610-bk4.dtb
../arch/arm/boot/dts/vfxxx.dtsi:550.24-563.6: Warning (spi_bus_bridge): /soc/aips-bus@40080000/spi@400ad000: incorrect #address-cells for SPI bus
also defined at ../arch/arm/boot/dts/vf610-bk4.dts:107.8-119.3
arch/arm/boot/dts/vf610-bk4.dtb: Warning (spi_bus_reg): Failed prerequisite 'spi_bus_bridge'
For spi device used as slave controller, '#address-cells' should be 0.
Let's overwrite the property in vf610-bk4.dts to fix the warning.
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The NHK15 panel is specified inside the display controller,
which works for the DPI-type DT parsing the old fbdev code
used, but for the DRM driver it needs to be spawn as its own
device, so we move it out of the display controller.
We also drop the panel timings: this should be determined
by the hardware or a device-specific compatible string, not
by this type of encoding into the device tree. It turns out
that this hardware is strapped to the right configuration
at boot already and we the driver just reads out the
hardware-specified resolution and timings. Drop the
"panel,dpi" compatible string altogether.
Fix a comment error in the DTS file while we're at it.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add num-viewport property for PCIe DT nodes to specify how many
viewports are implemented.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
After commit 89a5e15bcb ("gpio/mmc/of: Respect polarity in the device
tree") SD cards are not detected anymore.
The CD GPIO is "active low" on the MXIII-Plus. The MMC dt-bindings
specify: "[...] using the "cd-inverted" property means, that the CD line
is active high, i.e. it is high, when a card is inserted".
Fix the description of the SD card by marking it as GPIO_ACTIVE_LOW and
drop the "cd-inverted" property. This makes the definition consistent
with the existing dt-bindings and fixes the check whether an SD card is
inserted.
Fixes: 35ee52bea6 ("ARM: dts: meson8m2: add support for the Tronsmart MXIII Plus")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
After commit 89a5e15bcb ("gpio/mmc/of: Respect polarity in the device
tree") SD cards are not detected anymore.
The CD GPIO is "active low" on the EC-100. The MMC dt-bindings specify:
"[...] using the "cd-inverted" property means, that the CD line is active
high, i.e. it is high, when a card is inserted".
Fix the description of the SD card by marking it as GPIO_ACTIVE_LOW and
drop the "cd-inverted" property. This makes the definition consistent
with the existing dt-bindings and fixes the check whether an SD card is
inserted.
Fixes: bbedc1f1d9 ("ARM: dts: meson8b: Add support for the Endless Mini (EC-100)")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
After commit 89a5e15bcb ("gpio/mmc/of: Respect polarity in the device
tree") SD cards are not detected anymore.
The CD GPIO is "active low" on Odroid-C1. The MMC dt-bindings specify:
"[...] using the "cd-inverted" property means, that the CD line is active
high, i.e. it is high, when a card is inserted".
Fix the description of the SD card by marking it as GPIO_ACTIVE_LOW and
drop the "cd-inverted" property. This makes the definition consistent
with the existing dt-bindings and fixes the check whether an SD card is
inserted.
Fixes: e03efbce6b ("ARM: dts: meson8b-odroidc1: add microSD support")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the Mali-450 GPU and it's OPP table for Meson8. The GPU uses two
pixel processors in this configuration. The OPP table is taken from the
3.10 vendor kernel which uses the following table:
FCLK_DEV5 | 1, /* 255 Mhz */
FCLK_DEV7 | 0, /* 364 Mhz */
FCLK_DEV3 | 1, /* 425 Mhz */
FCLK_DEV5 | 0, /* 510 Mhz */
FCLK_DEV4 | 0, /* 637.5 Mhz */
This describes the mux (FCLK_DEVx) and a 0-based divider in the clock
controller. "FCLK" is "fixed_pll" which is running at 2550MHz.
The "turbo" setting is described by "turbo_clock = 4" where 4 is the
index of the table above.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the Mali-450 GPU and it's OPP table for the Meson8 and Meson8m2 (the
latter inherits meson8.dtsi).
These SoCs have a Mali-450 GPU with six pixel processors. The OPP table
is taken from the 3.10 vendor kernel which uses the following table:
FCLK_DEV7 | 1, /* 182.1 Mhz */
FCLK_DEV4 | 1, /* 318.7 Mhz */
FCLK_DEV3 | 1, /* 425 Mhz */
FCLK_DEV5 | 0, /* 510 Mhz */
FCLK_DEV4 | 0, /* 637.5 Mhz */
This describes the mux (FCLK_DEVx) and a 0-based divider in the clock
controller. "FCLK" is "fixed_pll" which is running at 2550MHz.
The "turbo" setting is described by "turbo_clock = 4" where 4 is the
index of the table above.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Various peripherals (Mali GPU, NAND controller, VPU; etc.) are located
in the APB bus. Describe this bus so we can add devices to it.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Various peripherals (Mali GPU, NAND controller, VPU, etc.) are located
in the APB bus. Describe this bus so we can add devices to it.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Mali GPU and the DVB demulator are located in the APB2 bus. Describe
this bus so we can add devices to it.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
A long running stress test on a custom board shipping an AXG SoCs and a
Realtek RTL8211F PHY revealed that after a few hours the connection
speed would drop drastically, from ~1000Mbps to ~3Mbps. At the same time
the 'macirq' (eth0) IRQ would stop being triggered at all and as
consequence the GMAC IRQs never ACKed.
After a painful investigation the problem seemed to be due to a wrong
defined IRQ type for the GMAC IRQ that should be LEVEL_HIGH instead of
EDGE_RISING.
The change in the macirq IRQ type also solved another long standing
issue affecting this SoC/PHY where EEE was causing the network
connection to die after stressing it with iperf3 (even though much
sooner). It's now possible to remove the 'eee-broken-1000t' quirk as
well.
Fixes: 9c15795a4f ("ARM: dts: meson8b-odroidc1: ethernet support")
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
LDO20 regulator provides power for the MMC card on Odroid U3 boards. That
regulator has been marked as 'boot-on' since the beginning of Odroid X/U3
support, but such flag is not really needed for it. That regulator is
correctly described as supply for eMMC card and controlled by its driver.
Commit 05f224ca66 ("regulator: core: Clean enabling always-on regulators
+ their supplies") changed the way the boot-on regulators are handled and
since then regulators marked as 'boot-on' got increased reference count
and are not turned off for the system suspend time.
The new approach turned out to break suspend/resume support on Odroid U3
with eMMC card, because the card is not properly shutdown due to missing
of power cycle. Fix this by removing excessive 'boot-on' flag and let
MMC driver to control turning power on and off.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Bindings of the fixed-regulator, which precedes support for GPIO flags
passed via phandle descriptor, introduced its own method annotating
that the given GPIO line is active low or high - by using
'enable-active-high' property. The driver always ignored flags passed
via GPIO descriptor.
Fix the conflicting GPIO flags to match the status forced by the
'enable-active-high' property to avoid future confusion.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Fix the DTC warning for xti node:
arch/arm/boot/dts/s3c2416-smdk2416.dts:23.12-28.5:
Warning (simple_bus_reg): /clocks/xti: missing or empty reg/ranges property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
According to Devicetree specification, the unit-address must match the
first address specified in the reg property of the node. Fix the DTC
warning onenand node:
arch/arm/boot/dts/s5pv210.dtsi:81.29-93.5:
Warning (simple_bus_reg): /soc/onenand@b0000000: simple-bus unit address format error, expected "b0600000"
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
This commit adds DMC (Dynamic Memory Controller) nodes, which are needed
by S5Pv210 cpufreq driver to work.
Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This commit enables following devices present on Aries based phones:
- pwm-vibrator attached to PWM 1
- poweroff support
- Atmel maXTouch touchscreen, connected to I2C-2
- Broadcom BCM4329 Bluetooth over UART-0
Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
THis commit adds memory reservation required by MFC (Multi Format Codec)
to run. On S5PV210 both regions needs to be on separate memory banks.
Size of both regions is taken from vendor Linux kernel sources.
Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
These two lines are active high, not active low. The bug was
found when we changed the kernel to respect the polarity defined
in the device tree.
Fixes: 1b90e06b14 ("ARM: kirkwood: Use devicetree to define DNS-32[05] fan")
Cc: Jamie Lentin <jm@lentin.co.uk>
Cc: Guenter Roeck <linux@roeck-us.net>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <gregory.clement@bootlin.com>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Julien D'Ascenzio <jdascenzio@posteo.net>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Reported-by: Julien D'Ascenzio <jdascenzio@posteo.net>
Tested-by: Julien D'Ascenzio <jdascenzio@posteo.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This adds the actual VGA DAC bridge that is used in the
Versatile AB, and sets the mode to 640x480 VGA and
routes the CLCD pads appropriately.
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Mali DP Maintainers <malidp@foss.arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
To avoid the following error:
asoc-simple-card sound: ASoC: Failed to create card debugfs directory
Which is because the card name contains '/' character, which can not be
used in file or directory names.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add the board level fixed regulators for 3.3V and 1.8V which is used to
power - among other things - the tlv320aic3106 codec.
Apart from removing the following warning during boot:
tlv320aic3x-codec 0-0018: Invalid supply voltage(s) AVDD: -22, DVDD: -22
With the correct voltages the driver can select correct OCMV value to
reduce pop noise.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
To avoid the following error:
asoc-simple-card sound: ASoC: Failed to create card debugfs directory
Which is because the card name contains '/' character, which can not be
used in file or directory names.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add the board level fixed regulators for 3.3V and 1.8V which is used to
power - among other things - the tlv320aic3106 codec.
Apart from removing the following warning during boot:
tlv320aic3x-codec 0-0018: Too high supply voltage(s) AVDD: 5000000, DVDD: 5000000
With the correct voltages the driver can select correct OCMV value to
reduce pop noise.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The LS1021A has a memory controller that supports EDAC. This commit
adds an entry for it.
Signed-off-by: Patrick Havelange <patrick.havelange@essensium.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
All the I2C devices connected to the I2C0 bus are capable of
running at 400kHz, so run it at a higher frequency.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX7ULP can switch CPU between RUN mode and HSRUN mode
by programming SMC1 register, different clock sources
will be used for CPU in different modes, so SMC1 can be
abstracted as a clock controller for CPU clock switch,
this patch adds support for it.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Each CPU can (and does) participate in cooling down the system but the
DT only captures a handful of them, normally CPU0, in the cooling maps.
Things work by chance currently as under normal circumstances its the
first CPU of each cluster which is used by the operating systems to
probe the cooling devices. But as soon as this CPU ordering changes and
any other CPU is used to bring up the cooling device, we will start
seeing failures.
Also the DT is rather incomplete when we list only one CPU in the
cooling maps, as the hardware doesn't have any such limitations.
Update cooling maps to include all devices affected by individual trip
points.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add devicetree support for 96Boards Chameleon96 board from Novtech, Inc.
based on Altera CycloneV SoC FPGA. This board is one of the Consumer
Edition boards of the 96Boards family and has the following key features:
* SoC - Intel Cyclone V SoC FPGA
* GPU - Graphics based on Intel Video Suite for FPGA
* RAM - 512MB DDR3L
* USB - 2x USB2.0 Host, 1x USB2.0 OTG
* Wireless - Wifi, BT
More information about this board can be found in 96Boards product
page: https://www.96boards.org/product/chameleon96/
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The AP6212 is based on the Broadcom BCM43430 or BCM43438. The WiFi side
identifies as BCM43430, while the Bluetooth side identifies as BCM43438.
The Bluetooth side is connected to UART1 in a 4 wire configuration. Same
as the WiFi side, due to being the same chip and package, the board's
fixed 3.3V power regulator provides overall power via VBAT and I/O power
via VDDIO. The RTC clock output from the SoC provides the LPO low power
clock at 32.768 kHz.
This patch enables Bluetooth on this board, and also adds the missing
LPO clock on the WiFi side. There is also a PCM connection for
Bluetooth, but this is not covered here.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The AP6212 is based on the Broadcom BCM43430 or BCM43438. The WiFi side
identifies as BCM43430, while the Bluetooth side identifies as BCM43438.
The Bluetooth side is connected to UART3 in a 4 wire configuration. Same
as the WiFi side, due to being the same chip and package, DLDO1 and
DLDO2 regulator outputs from the PMIC provide overall power via VBAT and
I/O power via VDDIO. The CLK_OUT_A clock output from the SoC provides
the LPO low power clock at 32.768 kHz.
This patch enables Bluetooth on this board, and also adds the missing
LPO clock on the WiFi side. There is also a PCM connection for
Bluetooth, but this is not covered here.
The LPO clock is fed from CLK_OUT_A, which needs to be muxed on pin
PI12. This can be represented in multiple ways. This patch puts the
pinctrl property in the pin controller node. This is due to limitations
in Linux, where pinmux settings, even the same one, can not be shared
by multiple devices. Thus we cannot put it in both the WiFi and
Bluetooth device nodes. Putting it the CCU node is another option, but
Linux's CCU driver does not handle pinctrl. Also the pin controller is
guaranteed to be initialized after the CCU, when clocks are available.
And any other devices that use muxed pins are guaranteed to be
initialized after the pin controller. Thus having the CLK_OUT_A pinmux
reference be in the pin controller node is a good choice without having
to deal with implementation issues.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The design of the Bananapi M2 Ultra has both DLDO1 and DLDO2 regulators
provide power to the WiFi+BT module, which is based on the Broadcom
BCM43438 or BCM43430 chip. Each regulator output from the PMIC can supply
up to 200 mA. The datasheet of the chip suggests a maximum power draw of
up to 360 mA when transmitting, thus requiring two outputs from the PMIC
to handle the load. However the device tree only references one of them,
leaving the other unused and possibly turned off.
This patch marks both as always-on, since we don't have a proper binding
to specify two regulators as "bound together". The name and constraints
of DLDO2 are also added.
Fixes: da7ac948fa ("ARM: dts: sun8i: Add board dts file for Banana Pi M2
Ultra")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
CLK_OUT_A, an external clock output function driven from the clock
control unit, on the R40 is sometimes used to provide a low rate low
power clock to a WiFi or Bluetooth controller.
This patch adds a pinmux setting for it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
UART3 on the PG pingroup on the R40 SoC is commonly used to connect the
bluetooth controller in a WiFi+Bluetooth combo chip, with the WiFi bits
also on the PG pingroup.
This patch adds two device nodes for UART3 on PG pingroup, one for the
RX/TX pins, and one for the RTS/CTS pins. Consumers can reference either
just the RX/TX pinmux setting or both, depending on the application.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Because "ethernet0" alias is missing, U-Boot doesn't generate board
specific MAC address. Effect of this is random MAC address every boot
and thus new IP address is assigned to the board.
Fix this by adding alias.
Fixes: 7389172fc3 ("ARM: dts: sun8i: h3: Enable dwmac-sun8i on the Beelink X2")
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
[Maxime: Removed unneeded comment]
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The osc24M clock does not have a "clock-output-names" property, which
means that the clock name is derived from the node name in Linux. The
node name was changed in commit acfd5bbe26 ("ARM: dts: sun6i: Change
clock node names to avoid warnings"). This breaks Linux as the sunxi-ng
clock driver implicitly depends on the external clock being named
"osc24M".
Add a "clock-output-names" property to restore the previous behavior.
Fixes: acfd5bbe26 ("ARM: dts: sun6i: Change clock node names to avoid
warnings")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Most of the legacy "gpio-key,wakeup" property are already replaced
with "wakeup-source". However few occurrences of old property has
popped up again, probably from the remnants in downstream trees.
Almost all of those were remove couple of years back.
Replace the legacy properties with the unified "wakeup-source"
property introduced in the commit 700a38b27e ("Input: gpio_keys -
switch to using generic device properties")
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Peter Rosin <peda@axentia.se>
Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Looks like I accidentally left some extra flags for uart3 to
not idle it. This happened as I generated the data from a
running system where these flags are set dynamically on boot
by omap_hwmod_setup_earlycon_flags() if earlycon is enabled.
We can just remove them.
Fixes: 4c38798461 ("ARM: dts: omap5: Add l4 interconnect hierarchy and ti-sysc data")
Signed-off-by: Tony Lindgren <tony@atomide.com>
Since we have U-Boot (flashed in place of stock kernel), it's not needed
anymore to hardcode bootargs on every Aries-family board.
Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
[krzk: Squash changes to fascinate4g and galaxys into one commit]
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Since we have separate compatible for S5Pv210 FIMD, let's use it rather
than using one from Exynos4210.
Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add node for Exynos Rorator device, so it can be used on all S5Pv210
based devices.
Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
We're now getting the following error:
genirq: Setting trigger mode 1 for irq 230 failed
(regmap_irq_set_type+0x0/0x15c)
cpcap-usb-phy cpcap-usb-phy.0: could not get irq dp: -524
Cc: Sebastian Reichel <sre@kernel.org>
Reported-by: Pavel Machek <pavel@ucw.cz>
Tested-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit a758f50f10 ("mtd: onenand: omap2: Configure driver from DT")
started using DT specified timings for GPMC, and as a result the
OneNAND stopped working on N950/N9 as we had wrong values in the DT.
Fix by updating the values to bootloader timings that have been tested
to be working on both Nokia N950 and N9.
Fixes: a758f50f10 ("mtd: onenand: omap2: Configure driver from DT")
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Watchdog node is incorrectly placed on r8a7743 SoC dtsi. This patch fixes
the sorting order.
Fixes: b5beb5d4c8 ("ARM: dts: r8a7743: Add watchdog support to SoC dtsi")
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch removes aliases from SoC dtsi tree. Device aliases are
board-specific, if needed define it in board dts rather than SoC
dtsi.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The iic3 block on RZ/G1M does not support automatic transmission, unlike
other R-Car SoC's. So dropping the compatibility with the generic version.
Fixes: f523405f2a ("ARM: dts: r8a7743: Add IIC cores to dtsi")
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch fixes sorting of vsp and msiof nodes.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable NXP pcf85263 real time clock for the iWave SBC based on RZ/G1C.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
As of commit 6d2ca85279 ("dt-bindings: display: renesas: Deprecate
LVDS support in the DU bindings"), the internal LVDS encoder has DT
bindings separate from the DU. The Lager device tree was ported over to
the new model, but the Stout device tree was forgotten.
Fixes: 15a1ff30d8 ("ARM: dts: r8a7790: Convert to new LVDS DT bindings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The bananapi has all its bank regulators tied to the 3v3 static regulator.
Make sure it's properly represented.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
This is necessary to use 'perf' for cache profiling etc.
Tested on cubieboard with 'perf stat echo foo'.
Signed-off-by: Harald Geyer <harald@ccbib.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The Edison tablet uses a Focaltech touchscreen, with one speciality
that the touchscreen resolution doesn't match the display resolution
(1024x768 vs. 1280x600) which userspace will have to compensate for.
Signed-off-by: Heiko Stuebner <heiko.stuebner@bq.com>
The powerdown pin for the second camera is gpio3_b5 not b4,
so fix that. We don't have a working camera setup yet, so this
is not really critical, but nevertheless better to have fixed
already.
Fixes: 36ead91499 ("ARM: dts: rockchip: add BQ Edison 2 QC devicetree")
Reported-by: Johan Jonker <jbx6244@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
A MK808 TV stick with rk3066 processor boots normal with logo
and console, but after booting the monitor remains black.
This patch fixes a vblank wait time out by adding HCLK_HDMI
to the vio power-domain node.
The HCLK_HDMI clock is now part of the logic
that enables the RK3066_PD_VIO power domain.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The Rockchip i2s controller always only has one output connection
hence #sound-dai-cells is always 0. Therefore define it in the soc
dtsi itself instead of in individual boards.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
While the rk3066 does have 2 camera interfaces, the rk3188 does not, so
there also isn't a QoS block for that non-existing interface, so remove it.
Fixes: e6e1869f0b ("ARM: dts: rockchip: add rk3066/rk3188 power-domains")
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
A few updates that we merged late but are low risk for regressions for
other platforms (and a few other straggling patches):
- I mis-tagged the 'drivers' branch, and missed 3 patches. Merged in
here. They're for a driver for the PL353 SRAM controller and a build
fix for the qualcomm scm driver.
- A new platform, RDA Micro RDA8810PL (Cortex-A5 w/ integrated Vivante
GPU, 256MB RAM, Wifi). This includes some acked platform-specific
drivers (serial, etc). This also include DTs for two boards with this
SoC, OrangePi 2G and OrangePi i86.
- i.MX8 is another new platform (NXP, 4x Cortex-A53 + Cortex-M4, 4K
video playback offload). This is the first i.MX 64-bit SoC.
- Some minor updates to Samsung boards (adding a few peripherals in
DTs).
- Small rework for SMP bootup on STi platforms.
- A couple of TEE driver fixes.
- A couple of new config options (bcm2835 thermal, Uniphier MDMAC)
enabled in defconfigs.
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Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull more ARM SoC updates from Olof Johansson:
"A few updates that we merged late but are low risk for regressions for
other platforms (and a few other straggling patches):
- I mis-tagged the 'drivers' branch, and missed 3 patches. Merged in
here. They're for a driver for the PL353 SRAM controller and a
build fix for the qualcomm scm driver.
- A new platform, RDA Micro RDA8810PL (Cortex-A5 w/ integrated
Vivante GPU, 256MB RAM, Wifi). This includes some acked
platform-specific drivers (serial, etc). This also include DTs for
two boards with this SoC, OrangePi 2G and OrangePi i86.
- i.MX8 is another new platform (NXP, 4x Cortex-A53 + Cortex-M4, 4K
video playback offload). This is the first i.MX 64-bit SoC.
- Some minor updates to Samsung boards (adding a few peripherals in
DTs).
- Small rework for SMP bootup on STi platforms.
- A couple of TEE driver fixes.
- A couple of new config options (bcm2835 thermal, Uniphier MDMAC)
enabled in defconfigs"
* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (27 commits)
ARM: multi_v7_defconfig: enable CONFIG_UNIPHIER_MDMAC
arm64: defconfig: Re-enable bcm2835-thermal driver
MAINTAINERS: Add entry for RDA Micro SoC architecture
tty: serial: Add RDA8810PL UART driver
ARM: dts: rda8810pl: Add interrupt support for UART
dt-bindings: serial: Document RDA Micro UART
ARM: dts: rda8810pl: Add timer support
ARM: dts: Add devicetree for OrangePi i96 board
ARM: dts: Add devicetree for OrangePi 2G IoT board
ARM: dts: Add devicetree for RDA8810PL SoC
ARM: Prepare RDA8810PL SoC
dt-bindings: arm: Document RDA8810PL and reference boards
dt-bindings: Add RDA Micro vendor prefix
ARM: sti: remove pen_release and boot_lock
arm64: dts: exynos: Add Bluetooth chip to TM2(e) boards
arm64: dts: imx8mq-evk: enable watchdog
arm64: dts: imx8mq: add watchdog devices
MAINTAINERS: add i.MX8 DT path to i.MX architecture
arm64: add support for i.MX8M EVK board
arm64: add basic DTS for i.MX8MQ
...
As usual, this is where the bulk of our changes end up landing each
merge window.
The individual updates are too many to enumerate, many many platforms
have seen additions of device descriptions such that they are
functionally more complete (in fact, this is often the bulk of updates
we see).
Instead I've mostly focused on highlighting the new platforms below as
they are introduced. Sometimes the introduction is of mostly a fragment,
that later gets filled in on later releases, and in some cases it's
near-complete platform support. The latter is more common for derivative
platforms that already has similar support in-tree.
Two SoCs are slight outliers from the usual range of additions. Allwinner
support for F1C100s, a quite old SoC (ARMv5-based) shipping in the
Lychee Pi Nano platform. At the other end is NXP Layerscape LX2160A,
a 16-core 2.2GHz Cortex-A72 SoC with a large amount of I/O aimed at
infrastructure/networking.
TI updates stick out in the diff stats too, in particular because they
have moved the description of their L4 on-chip interconnect to devicetree,
which opens up for removal of even more of their platform-specific
'hwmod' description tables over the next few releases.
SoCs:
- Qualcomm QCS404 (4x Cortex-A53)
- Allwinner T3 (rebranded R40) and f1c100s (armv5)
- NXP i.MX7ULP (1x Cortex-A7 + 1x Cortex-M4)
- NXP LS1028A (2x Cortex-A72), LX2160A (16x Cortex-A72)
New platforms:
- Rockchip: Gru Scarlet (RK3188 Tablet)
- Amlogic: Phicomm N1 (S905D), Libretech S805-AC
- Broadcom: Linksys EA6500 v2 Wi-Fi router (BCM4708)
- Qualcomm: QCS404 base platform and EVB
- Qualcomm: Remove of Arrow SD600
- PXA: First PXA3xx DT board: Raumfeld
- Aspeed: Facebook Backpack-CMM BMC
- Renesas iWave G20D-Q7 (RZ/G1N)
- Allwinner t3-cqa3t-bv3 (T3/R40) and Lichee Pi Nano (F1C100s)
- Allwinner Emlid Neutis N5, Mapleboard MP130
- Marvell Macchiatobin Single Shot (Armada 8040, no 10GbE)
- i.MX: mtrion emCON-MX6, imx6ul-pico-pi, imx7d-sdb-reva
- VF610: Liebherr's BK4 device, ZII SCU4 AIB board
- i.MX7D PICO Hobbit baseboard
- i.MX7ULP EVK board
- NXP LX2160AQDS and LX2160ARDB boards
Other:
- Coresight binding updates across the board
- CPU cooling maps updates across the board
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM Device-tree updates from Olof Johansson:
"As usual, this is where the bulk of our changes end up landing each
merge window.
The individual updates are too many to enumerate, many many platforms
have seen additions of device descriptions such that they are
functionally more complete (in fact, this is often the bulk of updates
we see).
Instead I've mostly focused on highlighting the new platforms below as
they are introduced. Sometimes the introduction is of mostly a
fragment, that later gets filled in on later releases, and in some
cases it's near-complete platform support. The latter is more common
for derivative platforms that already has similar support in-tree.
Two SoCs are slight outliers from the usual range of additions.
Allwinner support for F1C100s, a quite old SoC (ARMv5-based) shipping
in the Lychee Pi Nano platform. At the other end is NXP Layerscape
LX2160A, a 16-core 2.2GHz Cortex-A72 SoC with a large amount of I/O
aimed at infrastructure/networking.
TI updates stick out in the diff stats too, in particular because they
have moved the description of their L4 on-chip interconnect to
devicetree, which opens up for removal of even more of their
platform-specific 'hwmod' description tables over the next few
releases.
SoCs:
- Qualcomm QCS404 (4x Cortex-A53)
- Allwinner T3 (rebranded R40) and f1c100s (armv5)
- NXP i.MX7ULP (1x Cortex-A7 + 1x Cortex-M4)
- NXP LS1028A (2x Cortex-A72), LX2160A (16x Cortex-A72)
New platforms:
- Rockchip: Gru Scarlet (RK3188 Tablet)
- Amlogic: Phicomm N1 (S905D), Libretech S805-AC
- Broadcom: Linksys EA6500 v2 Wi-Fi router (BCM4708)
- Qualcomm: QCS404 base platform and EVB
- Qualcomm: Remove of Arrow SD600
- PXA: First PXA3xx DT board: Raumfeld
- Aspeed: Facebook Backpack-CMM BMC
- Renesas iWave G20D-Q7 (RZ/G1N)
- Allwinner t3-cqa3t-bv3 (T3/R40) and Lichee Pi Nano (F1C100s)
- Allwinner Emlid Neutis N5, Mapleboard MP130
- Marvell Macchiatobin Single Shot (Armada 8040, no 10GbE)
- i.MX: mtrion emCON-MX6, imx6ul-pico-pi, imx7d-sdb-reva
- VF610: Liebherr's BK4 device, ZII SCU4 AIB board
- i.MX7D PICO Hobbit baseboard
- i.MX7ULP EVK board
- NXP LX2160AQDS and LX2160ARDB boards
Other:
- Coresight binding updates across the board
- CPU cooling maps updates across the board"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (648 commits)
ARM: dts: suniv: Fix improper bindings include patch
ARM: dts: sunxi: Enable Broadcom-based Bluetooth for multiple boards
arm64: dts: allwinner: a64: bananapi-m64: Add Bluetooth device node
ARM: dts: suniv: Fix improper bindings include patch
arm64: dts: Add spi-[tx/rx]-bus-width for the FSL QSPI controller
arm64: dts: Remove unused properties from FSL QSPI driver nodes
ARM: dts: Add spi-[tx/rx]-bus-width for the FSL QSPI controller
ARM: dts: imx6sx-sdb: Fix the reg properties for the FSL QSPI nodes
ARM: dts: Remove unused properties from FSL QSPI driver nodes
arm64: dts: ti: k3-am654: Enable main domain McSPI0
arm64: dts: ti: k3-am654: Add McSPI DT nodes
arm64: dts: ti: k3-am654: Populate power-domain property for UART nodes
arm64: dts: ti: k3-am654-base-board: Enable ECAP PWM
arm64: dts: ti: k3-am65-main: Add ECAP PWM node
arm64: dts: ti: k3-am654-base-board: Add I2C nodes
arm64: dts: ti: am654-base-board: Add pinmux for main uart0
arm64: dts: ti: k3-am65: Add pinctrl regions
dt-bindings: pinctrl: k3: Introduce pinmux definitions
ARM: dts: exynos: Specify I2S assigned clocks in proper node
ARM: dts: exynos: Add missing CPUs in cooling maps for Odroid X2
...
SoC updates, mostly refactorings and cleanups of old legacy platforms,
but also a few more things:
New SoC support this release:
- NXP/Freescale i.MX7ULP (1x Cortex-A7, Cortex-M4, graphics, etc)
- Allwinner F1C100, older platform with an ARM926-EJS (ARMv5) core
Cleanups of various platforms:
- OMAP1 ams-delta does some GPIO cleanups
- Davinci removes of at24 platform data
- Samsung cleans up old wakeup, PM debug and secondary core boot code
- Renesas moves around config options and PM code to drivers/soc for
sharing with 64-bit and more consistency
- i.MX, Broadcom and SoCFPGA all have tweaks to lowlevel debug console setups
- SoCFPGA adds explicit selection of ARM errata and removes some unused code
This tag also contains a few patches that I had queued up as fixes for
4.20 but didn't send in before the release.
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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm SoC platform updates from Olof Johansson:
"SoC updates, mostly refactorings and cleanups of old legacy platforms,
but also a few more things:
New SoC support this release:
- NXP/Freescale i.MX7ULP (1x Cortex-A7, Cortex-M4, graphics, etc)
- Allwinner F1C100, older platform with an ARM926-EJS (ARMv5) core
Cleanups of various platforms:
- OMAP1 ams-delta does some GPIO cleanups
- Davinci removes of at24 platform data
- Samsung cleans up old wakeup, PM debug and secondary core boot code
- Renesas moves around config options and PM code to drivers/soc for
sharing with 64-bit and more consistency
- i.MX, Broadcom and SoCFPGA all have tweaks to lowlevel debug
console setups
- SoCFPGA adds explicit selection of ARM errata and removes some
unused code
This also contains a few patches that I had queued up as fixes for
4.20 but didn't send in before the release"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (68 commits)
arm64: dts: renesas: draak: Fix CVBS input
ARM: omap2: avoid section mismatch warning
ARM: tegra: avoid section mismatch warning
ARM: ks8695: fix section mismatch warning
ARM: pxa: avoid section mismatch warning
ARM: mmp: fix pxa168_device_usb_phy use on aspenite
ARM: mmp: fix timer_init calls
ARM: OMAP1: fix USB configuration for device-only setups
ARM: OMAP1: add MMC configuration for Palm Tungsten E
ARM: imx: fix dependencies on imx7ulp
ARM: meson: select HAVE_ARM_TWD and ARM_GLOBAL_TIMER
MAINTAINERS: add drivers/soc/amlogic/ to amlogic list
ARM: imx: add initial support for imx7ulp
ARM: debug-imx: only define DEBUG_IMX_UART_PORT if needed
ARM: dts: Fix OMAP4430 SDP Ethernet startup
ARM: dts: am335x-pdu001: Fix polarity of card detection input
ARM: OMAP1: ams-delta: Fix audio permanently muted
ARM: dts: omap5: Fix dual-role mode on Super-Speed port
arm64: dts: rockchip: fix rk3399-rockpro64 regulator gpios
ARM: davinci: da850-evm: remove unnecessary include
...
1. Add missing CPUs in cooling maps for Odroid X2 (missed in previous
round of fixups).
2. Fix clock configuration in audio subsystem on Odroid XU3/XU4.
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Merge tag 'samsung-dt-4.21-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/late
Samsung DTS ARM changes for v4.21, part 2
1. Add missing CPUs in cooling maps for Odroid X2 (missed in previous
round of fixups).
2. Fix clock configuration in audio subsystem on Odroid XU3/XU4.
* tag 'samsung-dt-4.21-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Specify I2S assigned clocks in proper node
ARM: dts: exynos: Add missing CPUs in cooling maps for Odroid X2
ARM: dts: exynos: remove display-port node from Arndale
ARM: dts: exynos: Add opp-suspend to DMC and leftbus devfreq OPPs on Exynos4
ARM: dts: s5pv210: Add s5p-jpeg codec node.
ARM: dts: exynos: Use Samsung SoC specific compatible for DWC2 module
ARM: dts: exynos: Add all CPUs in cooling maps
ARM: dts: exynos: Clarify comment explaining purpose of Odroid XU3 DTSI
ARM: dts: exynos: Add pin configuration for SD write protect on Odroid XU3/XU4/HC1
ARM: dts: exynos: Update maximum frequency for eMMC to 200MHz on Odroid XU3/XU4
ARM: dts: exynos: Update maximum frequency for SD card to 200MHz on Odroid XU3/XU4/HC1
ARM: dts: exynos: Fix LDO13 min values on Odroid XU3/XU4/HC1
ARM: dts: exynos: Add UHS-I bus speed support to Odroid XU3/XU4/HC1
ARM: dts: exynos: Add missing clocks to RTC node for Arndale board
ARM: dts: exynos: Add compatible for s5m8767 clocks node on Itop Core
ARM: dts: exynos: Add compatible for s2mps11 clocks node on Exynos542x
Signed-off-by: Olof Johansson <olof@lixom.net>
Add initial devicetree for Orange Pi i96 board from Xunlong. It
is one of the 96Boards IoT Edition board.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
This is a small pull request for some lingering things that didn't make
the first round of patches.
First, the new suniv device tree included device tree headers for the
clock and reset indices. These header filers are going in through the
clock tree. Thus with the dt and core branches in arm-soc alone, it
doesn't build. One fix is included to remove the #include statements.
The defined macros aren't used yet as they were properly removed during
the review phase.
Second, Bluetooth using Broadcom (now Cypress) chips connected to UARTs
on various boards is enabled using serdev and the updated bindings for
Broadcom Bluetooth. The patch series had been sitting on the mailing
lists for a month, and the driver bits were just merged on 2018/12/19.
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Merge tag 'sunxi-dt-for-4.21-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner DT changes for 4.21 - round 2
This is a small pull request for some lingering things that didn't make
the first round of patches.
First, the new suniv device tree included device tree headers for the
clock and reset indices. These header filers are going in through the
clock tree. Thus with the dt and core branches in arm-soc alone, it
doesn't build. One fix is included to remove the #include statements.
The defined macros aren't used yet as they were properly removed during
the review phase.
Second, Bluetooth using Broadcom (now Cypress) chips connected to UARTs
on various boards is enabled using serdev and the updated bindings for
Broadcom Bluetooth. The patch series had been sitting on the mailing
lists for a month, and the driver bits were just merged on 2018/12/19.
* tag 'sunxi-dt-for-4.21-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sunxi: Enable Broadcom-based Bluetooth for multiple boards
ARM: dts: suniv: Fix improper bindings include patch
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- It contains a series from Schrempf Frieder that cleans up FSL QSPI
device tree nodes. The current device trees are broken because they
use an inconsistent scheme for assigning the reg properties. It
becomes a problem with ongoing QSPI driver under SPI framework. So
the cleanup is a preparation for new driver landing in the next
cycle.
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Merge tag 'imx-qspi-dt-clean' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Freescale QSPI device tree cleanup for 4.21:
- It contains a series from Schrempf Frieder that cleans up FSL QSPI
device tree nodes. The current device trees are broken because they
use an inconsistent scheme for assigning the reg properties. It
becomes a problem with ongoing QSPI driver under SPI framework. So
the cleanup is a preparation for new driver landing in the next
cycle.
* tag 'imx-qspi-dt-clean' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: Add spi-[tx/rx]-bus-width for the FSL QSPI controller
arm64: dts: Remove unused properties from FSL QSPI driver nodes
ARM: dts: Add spi-[tx/rx]-bus-width for the FSL QSPI controller
ARM: dts: imx6sx-sdb: Fix the reg properties for the FSL QSPI nodes
ARM: dts: Remove unused properties from FSL QSPI driver nodes
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The clock and reset bindings are going through different trees, and while
the patch doesn't contain any value defined in that header, it still
includes those files and result in a build breakage when building the DT
without the matching clock and reset patches applied.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This big set of changes adds SoC specific l4 interconnect target module
device tree data for am335x, am437x, omap5 and dra7 SoCs. We also move
existing devices to the right location in the l4 interconnect hierarcy.
This is similar to what we've already done for omap4 l4 interconnects
earlier, and follows what is documented in the ti-sysc driver dts binding
in Documentation/devicetree/bindings/bus/ti-sysc.txt.
These changes will essentially replace the struct ti_sysc and clock
entries in the arch/arm/mach-omap2/omap_hwmod_*_data.c files. Then a few
merge windows later, we can start dropping the built-in platform data
from the omap_hwmod_*_data.c files in favor of the device tree data only.
For now, we verify the device tree data module data against the built-in
data and warn about changes to prevent regressions.
With the device tree data, we are also probing devices with the ti-sysc
interconnect target module instead of omap_device. This fixes up the
handling for multiple device instances in a single interconnect target
module that has caused trouble earlier. A custom wrapper driver has been
needed earlier for such cases.
And as the device tree data is organized by the l4 interconnect instances,
we will be able to use genpd later on. This is because each interconnect
instance is also often also a single power domain.
This series of changes has been brewing for several months now. I did not
want to send a pull request earlier as people were still seeing device
specific issues until recently though. However, it turned out that all the
issues were quite trivial to fix. I had missed adding device tree ranges
for the l3 data port used on some devices, and I had missed converting the
device addresses for a few devices. And some devices like needed fixes for
deferred probe handling such as the EHCI PHY for built-in case on omap5.
Anyways, in case of trouble, we can easily just revert changes for a
single device if needed.
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Merge tag 'omap-for-v4.21/dt-ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Add interconnect target module dts data for omaps for v4.21
This big set of changes adds SoC specific l4 interconnect target module
device tree data for am335x, am437x, omap5 and dra7 SoCs. We also move
existing devices to the right location in the l4 interconnect hierarcy.
This is similar to what we've already done for omap4 l4 interconnects
earlier, and follows what is documented in the ti-sysc driver dts binding
in Documentation/devicetree/bindings/bus/ti-sysc.txt.
These changes will essentially replace the struct ti_sysc and clock
entries in the arch/arm/mach-omap2/omap_hwmod_*_data.c files. Then a few
merge windows later, we can start dropping the built-in platform data
from the omap_hwmod_*_data.c files in favor of the device tree data only.
For now, we verify the device tree data module data against the built-in
data and warn about changes to prevent regressions.
With the device tree data, we are also probing devices with the ti-sysc
interconnect target module instead of omap_device. This fixes up the
handling for multiple device instances in a single interconnect target
module that has caused trouble earlier. A custom wrapper driver has been
needed earlier for such cases.
And as the device tree data is organized by the l4 interconnect instances,
we will be able to use genpd later on. This is because each interconnect
instance is also often also a single power domain.
This series of changes has been brewing for several months now. I did not
want to send a pull request earlier as people were still seeing device
specific issues until recently though. However, it turned out that all the
issues were quite trivial to fix. I had missed adding device tree ranges
for the l3 data port used on some devices, and I had missed converting the
device addresses for a few devices. And some devices like needed fixes for
deferred probe handling such as the EHCI PHY for built-in case on omap5.
Anyways, in case of trouble, we can easily just revert changes for a
single device if needed.
* tag 'omap-for-v4.21/dt-ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Cosmetic fix for omap5 USB node names
ARM: dts: Fix wrong address for omap5 sata phy
ARM: dts: Add missing ranges for dra7 mcasp l3 ports
ARM: dts: Fix ranges for am335x epwmss
ARM: dts: Fix hsi gdd range for omap4
ARM: dts: Add am335x mcasp with l3 data port ranges
ARM: dts: Add missing ranges for am437x mcasp l3 ports
ARM: dts: dra7: Move the ti,no-idle quirk on proper gmac node
ARM: dts: Revert am335x mcasp ti-sysc changes
ARM: dts: omap5: Add l4 interconnect hierarchy and ti-sysc data
ARM: dts: Use dra7 mcasp compatible for mcasp instances
ARM: dts: dra7: Move l4 child devices to probe them with ti-sysc
ARM: dts: dra7: Add l4 interconnect hierarchy and ti-sysc data
ARM: dts: am335x: Move l4 child devices to probe them with ti-sysc
ARM: dts: am335x: Add l4 interconnect hierarchy and ti-sysc data
ARM: dts: am437x: Move l4 child devices to probe them with ti-sysc
ARM: dts: am437x: Add l4 interconnect hierarchy and ti-sysc data
ARM: dts: dra7: convert to use new clkctrl layout
ARM: dts: am43xx: convert to use new clkctrl layout
ARM: dts: am33xx: convert to use new clkctrl layout
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch adds the Bluetooth node, and the underlying UART node if it's
missing, to the board device tree file for several boards. The LPO clock
is also added to the WiFi side's power sequencing node if it's missing,
to correctly represent the shared connections. There is also a PCM
connection for Bluetooth, but this is not covered in this patch.
These boards all have a WiFi+BT module from AMPAK, which contains one or
two Broadcom chips, depending on the model. The older AP6210 contains
two, while the newer AP6212 and AP6330 contain just one, as they use
two-in-one combo chips.
The Bluetooth side of the module is always connected to a UART on the
same pingroup as the SDIO pins for the WiFi side, in a 4 wire
configuration. Power to the VBAT and VDDIO pins are provided either by
the PMIC, using one or several of its regulator outputs, or other fixed
regulators on the board. The VBAT and VDDIO pins are shared with the
WiFi side, which would correspond to vmmc-supply and vqmmc-supply in the
mmc host node. A clock output from the SoC or the external X-Powers RTC
provides the LPO low power clock at 32.768 kHz.
All the boards covered in this patch are ones that do not require extra
changes to the SoC's dtsi file. For the remaining boards that I have
worked on, properties or device nodes for the LPO clock's source are
missing.
For the Cubietruck, the LPO clock is fed from CLK_OUT_A, which needs to
be muxed on pin PI12. This can be represented in multiple ways. This
patch puts the pinctrl property in the pin controller node. This is due
to limitations in Linux, where pinmux settings, even the same one, can
not be shared by multiple devices. Thus we cannot put it in both the
WiFi and Bluetooth device nodes. Putting it the CCU node is another
option, but Linux's CCU driver does not handle pinctrl. Also the pin
controller is guaranteed to be initialized after the CCU, when clocks
are available. And any other devices that use muxed pins are guaranteed
to be initialized after the pin controller. Thus having the CLK_OUT_A
pinmux reference be in the pin controller node is a good choice without
having to deal with implementation issues.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The clock and reset bindings are going through different trees, and while
the patch doesn't contain any value defined in that header, it still
includes those files and result in a build breakage when building the DT
without the matching clock and reset patches applied.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The "num-lanes" property for PCIe is not used, remove it.
Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
We will move the FSL QSPI driver to the SPI framework soon. To
prepare and to make sure the full buswidth is used (as it is with
the current driver), let's add the right properties.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The current driver does not use the reg properties, but we will
add a new driver soon. To make sure we have a consistent scheme,
let's fix the reg properties here.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The properties 'bus-num', 'fsl,spi-num-chipselects' and
'fsl,spi-flash-chipselects' were never read by the driver
and can be removed.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
With wlcore supporting optional wakeirqs, we can configure it
for droid 4. This makes ssh connection usable with the SoC
entering deeper idle states.
Let's configure a wakeirq both for the wlcore GPIO and the SDIO
dat1 pin in case wlcore starts supporting SDIO dat1 interrupt at
some point.
And let's also add the missing keep-power-in-suspend while at it.
Signed-off-by: Tony Lindgren <tony@atomide.com>
With wlcore supporting optional wakeirqs, we can configure it
for pandaboard. This makes ssh connection usable with the SoC
entering deeper idle states.
Note that pandaboard already has a wakeirq configured for SDIO
dat1 pin although that is not currently used by wlcore.
Signed-off-by: Tony Lindgren <tony@atomide.com>
With wlcore supporting optional wakeirqs, let's configure it for
omap3-evm and update the related pin muxing as some pins are left
unmuxed.
Let's configure a wakeirq both for the wlcore GPIO and the SDIO
dat1 pin in case wlcore starts supporting SDIO dat1 interrupt at
some point.
Note that for off-mode, the wlcore reset GPIO will have a glitch
meaning wlcore will reset. The only way to workaround for this
currently is to configure the reset pin with SAFE_MODE + PULL.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The assigned parent clocks should be normally specified in the consumer
device's DT node, this ensures respective driver always sees correct clock
settings when required.
This patch fixes regression in audio subsystem on Odroid XU3/XU4 boards
that appeared after commits:
commit 647d04f8e0 ("ASoC: samsung: i2s: Ensure the RCLK rate is properly determined")
commit 995e73e55f ("ASoC: samsung: i2s: Fix rclk_srcrate handling")
commit 48279c53fd ("ASoC: samsung: i2s: Prevent external abort on exynos5433 I2S1 access")
Without this patch the driver gets wrong clock as the I2S function clock
(op_clk) in probe() and effectively the clock which is finally assigned
from DT is not being enabled/disabled in the runtime resume/suspend ops.
Without the above listed commits the EXYNOS_I2S_BUS clock was always set
as parent of CLK_I2S_RCLK_SRC regardless of DT settings so there was no issue
with not enabled EXYNOS_SCLK_I2S.
Cc: <stable@vger.kernel.org> # 4.17.x
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
While updating cooling maps, the exynos4412-prime.dtsi was left
untouched. This is not a problem with Odroid U3 because it uses its own
map with fan (which was updated). However the cooling maps of Odroid X2
rely only on exynos4412-prime.dtsi.
Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
These should be now using offset from the module base and not the
full physical address.
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The OLinuXino Lime2 has a big capacitor on its LDO3 output. It is
actually too large, causing the PMIC to shutdown when toggling the LDO3.
By enabling soft-start and ramp delay we increase the time for the
capacitor to charge lowering the current drain on the power regulator.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Looks like I missed converting the omap5 sata phy addresses to use offset
from the module base instead of full physical address.
While at it, we can also more it to be a direct child of the interconnect
target module, it is not really a child of the ocp2scp control device.
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Here's a collection of minor fixes for annoying usability issues
people have noticed using various devices.
There are two regression fixes:
- A regression fix for omap5 usb3 dual role mode
- A regression fix to ams-delta audio being muted permanently
And two one-liners:
- Fix polarity for am335x-pdu001 SD card detection
- Fix non-working omap4-sdp Ethernet startup for rebind
It would be nice to get these merged during the -rc cycle if
possible. Naturally these can all wait for the merge window too
if we start running out of time.
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Merge tag 'omap-for-v4.20/fixes-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Few device fixes for omaps
Here's a collection of minor fixes for annoying usability issues
people have noticed using various devices.
There are two regression fixes:
- A regression fix for omap5 usb3 dual role mode
- A regression fix to ams-delta audio being muted permanently
And two one-liners:
- Fix polarity for am335x-pdu001 SD card detection
- Fix non-working omap4-sdp Ethernet startup for rebind
It would be nice to get these merged during the -rc cycle if
possible. Naturally these can all wait for the merge window too
if we start running out of time.
* tag 'omap-for-v4.20/fixes-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Fix OMAP4430 SDP Ethernet startup
ARM: dts: am335x-pdu001: Fix polarity of card detection input
ARM: OMAP1: ams-delta: Fix audio permanently muted
ARM: dts: omap5: Fix dual-role mode on Super-Speed port
Signed-off-by: Olof Johansson <olof@lixom.net>
- Fix the erroneous partition table on D-Link DIR-685
- Multiplex flash usage with other usage using pin control
handling (merged to the MTD tree)
- Use the RedBoot partition parser on SQ201
- Add the USB blocks (DT bindings merged in the last merge
window)
- Bump the debounce times a bit to avoid bouncing
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Merge tag 'gemini-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt
Gemini DTS updates for v4.21:
- Fix the erroneous partition table on D-Link DIR-685
- Multiplex flash usage with other usage using pin control
handling (merged to the MTD tree)
- Use the RedBoot partition parser on SQ201
- Add the USB blocks (DT bindings merged in the last merge
window)
- Bump the debounce times a bit to avoid bouncing
* tag 'gemini-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: Bump Gemini platforms to use 100ms debounce
ARM: dts: Add the FOTG210 USB host to Gemini boards
ARM: dts: Fix up SQ201 flash access
ARM: dts: Enable Gemini flash access
ARM: dts: Fix up the D-Link DIR-685 MTD partition info
Signed-off-by: Olof Johansson <olof@lixom.net>
Our usual pull request with the changes shared between the H3 and H5 SoCs.
The major changes for this release are:
- Addition of the video engine for the H5
- H3 Camera support
- New board: Emlid Neutis N5, Mapleboard MP130
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Merge tag 'sunxi-h3-h5-for-4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner H3/H5 changes for 4.21
Our usual pull request with the changes shared between the H3 and H5 SoCs.
The major changes for this release are:
- Addition of the video engine for the H5
- H3 Camera support
- New board: Emlid Neutis N5, Mapleboard MP130
* tag 'sunxi-h3-h5-for-4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: h5: Add Video Engine node
ARM/arm64: dts: allwinner: Move H3/H5 syscon label over to soc-specific nodes
arm64: dts: allwinner: h5: Add system-control node with SRAM C1
ARM: dts: sun8i: h3: Fix the system-control register range
ARM: dts: sun8i: Add the H3/H5 CSI controller
ARM: dts: sun8i-h3: Add dts for the Mapleboard MP130
arm64: dts: allwinner: new board - Emlid Neutis N5
dt-bindings: vendor-prefix: new vendor - Emlid
ARM: dts: sun8i-h3: add sy8106a to orange pi plus
Signed-off-by: Olof Johansson <olof@lixom.net>
timer and emmc pins) from its first real-world user.
RK3188 improvements (OPPv2, cpu node updates) to prepare for a new
devicetree, the BQ Edison 2 Quad-Core.
VPU device node for rk3288, right now only the jpeg encoder part
will be in the kernel but hopefully other codecs will follow.
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Merge tag 'v4.21-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
RV1108 improvements (uart-dma, clocks, interrupt numbers, gmac support
timer and emmc pins) from its first real-world user.
RK3188 improvements (OPPv2, cpu node updates) to prepare for a new
devicetree, the BQ Edison 2 Quad-Core.
VPU device node for rk3288, right now only the jpeg encoder part
will be in the kernel but hopefully other codecs will follow.
* tag 'v4.21-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Add internal timer support for rv1108
ARM: dts: rockchip: add BQ Edison 2 QC devicetree
ARM: dts: rockchip: add VPU device node for RK3288
ARM: dts: rockchip: update cpu supplies on rk3188
ARM: dts: rockchip: add phandles to secondary cpu cores
ARM: dts: rockchip: add cpu-core resets for rk3188
ARM: dts: rockchip: convert rk3188 to opp-v2
ARM: dts: rockchip: add #sound-dai-cells to Cortex-A9 i2s
ARM: dts: rockchip: Add UART DMA support for rv1108
ARM: dts: rockchip: Assign the proper GPIO clocks for rv1108
ARM: dts: rockchip: Fix the PMU interrupt number for rv1108
ARM: dts: rockchip: Pass the 'arm,cpu-registers-not-fw-configured' property on rv1108
ARM: dts: rockchip: Pass the 'clock-latency' property on rv1108
ARM: dts: rockchip: Add rv1108 GMAC support
ARM: dts: rockchip: add rv1108 eMMC pin settings
Signed-off-by: Olof Johansson <olof@lixom.net>
- Switch most platforms to the new clock binding
- Small improvement for Axentia nattis
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Merge tag 'at91-4.21-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into next/dt
AT91 DT for 4.21
- Switch most platforms to the new clock binding
- Small improvement for Axentia nattis
* tag 'at91-4.21-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: at91: nattis: initialize the BLON pin as output-low early
ARM: dts: at91: at91sam9rl: switch to new clock bindings
ARM: dts: at91: at91sam9x5: switch to new clock bindings
ARM: dts: at91: at91sam9263: switch to new clock bindings
ARM: dts: at91: at91sam9261: switch to new clock bindings
ARM: dts: at91: at91sam9260: switch to new clock bindings
ARM: dts: at91: sama5d2: switch to new clock binding
ARM: dts: at91: sama5d4: switch to new clock bindings
ARM: dts: at91: sama5d2: use the divided clock for SMC
Signed-off-by: Olof Johansson <olof@lixom.net>
Highlights
- add CPU OPP tables
- timers: add global timer and TWD
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Merge tag 'amlogic-dt-2' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt
ARM: dts: Amlogic updates for v4.21, round 2
Highlights
- add CPU OPP tables
- timers: add global timer and TWD
* tag 'amlogic-dt-2' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson: meson8b: add the CPU OPP tables
ARM: dts: meson: meson8: add the CPU OPP table
ARM: dts: meson8b: add the Cortex-A5 global timer
ARM: dts: meson8b: add the ARM TWD timer
ARM: dts: meson8: add the Cortex-A9 global timer
ARM: dts: meson8: add the ARM TWD timer
ARM: dts: meson: group the Cortex-A5 / Cortex-A9 peripherals
dt-bindings: clock: meson8b: export the CPU post dividers
Signed-off-by: Olof Johansson <olof@lixom.net>
- It includes the initial device tree for i.MX7ULP SoC and EVK board
support.
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Merge tag 'imx7ulp-dt-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
i.MX7ULP device tree for 4.21:
- It includes the initial device tree for i.MX7ULP SoC and EVK board
support.
* tag 'imx7ulp-dt-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx: add imx7ulp evk support
ARM: dts: imx: add common imx7ulp dtsi support
dt-bindings: fsl: add imx7ulp pm related components bindings
dt-bindings: fsl: add compatible for imx7ulp evk
clk: imx: add imx7ulp clk driver
clk: imx: implement new clk_hw based APIs
clk: imx: make mux parent strings const
dt-bindings: clock: add imx7ulp clock binding doc
clk: imx: add imx7ulp composite clk support
clk: imx: add pfdv2 support
clk: imx: add pllv4 support
clk: fractional-divider: add CLK_FRAC_DIVIDER_ZERO_BASED flag support
clk: imx: add gatable clock divider support
Signed-off-by: Olof Johansson <olof@lixom.net>
- It contains a series from Otavio Salvador that improves i.MX7D PICO
SoM, and then adds Hobbit baseboard support on top of the improvement.
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Merge tag 'imx7d-pico-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
i.MX7D PICO boards update for 4.21:
- It contains a series from Otavio Salvador that improves i.MX7D PICO
SoM, and then adds Hobbit baseboard support on top of the improvement.
* tag 'imx7d-pico-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx7d-pico: Add the imx7d-pico-hobbit variant
ARM: dts: imx7d-pico-pi: Extend peripherals support
ARM: dts: imx7d-pico: Extend peripherals support
ARM: dts: imx7d-pico: Improve WiFi regulator name
ARM: dts: imx7d-pico: Pass the Ethernet PHY reset GPIO
ARM: dts: imx7d-pico: Pass the USBOTG1_PWR pinctrl
ARM: dts: imx7d-pico-pi: Move SoM related part to imx7d-pico.dtsi
ARM: dts: imx7d-pico: Switch to SPDX identifier
ARM: dts: imx7d-pico: Do not harcode the memory size
ARM: dts: imx7d-nitrogen7: Fix the description of the Wifi clock
ARM: imx: update the cpu power up timing setting on i.mx6sx
ARM: dts: imx7d-pico: Describe the Wifi clock
ARM: dts: imx51-zii-rdu1: Remove EEPROM node
Signed-off-by: Olof Johansson <olof@lixom.net>
- New boards support: emtrion emCON-MX6, imx6ul-pico-pi, imx7d-sdb-reva
and vf610 based Liebherr's BK4 device, ZII SCU4 AIB board.
- Add flexcan support for i.MX6UL SoC, turn on stop mode wakeup feature
for flexcan, and enable devices on a few i.MX6 NXP boards.
- Enable AUO G101EVN010 lcd panel and Goodix touch support for
imx6ul-ccimx6ulsbcpro board.
- Enable sensors support for imx6qdl-sabresd board: egalax touch, light,
magnetometer and accelerometer sensor.
- Switch more boards to use SPDX identifier.
- Fix memory node duplication in i.MX device tree sources.
- Correct GIC PPI interrupts mask for i.MX6UL and i.MX7 SoCs.
- Drop 'snps,dw-pcie' compatible from LS1021A PCIe device to avoid
incorrect device matching.
- Add the gpu nodes for the adreno 200 GPU on iMX51 and iMX53, which
are now supported by the freedreno driver.
- Add DCP device support for i.MX6ULL, which requires explicit clock
enabling.
- Add '#thermal-sensor-cells' for thermal device and '#cooling-cells'
for cooling devices.
- Add missing clock information for EPIT on i.MX25 SoC.
- Add PWM and qdma devices for LS1021A SoC.
- Update cooling maps of LS1021A SoC to include all devices affected by
individual trip points.
- Random device addition and cleanup on various boards.
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Merge tag 'imx-dt-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
i.MX device tree update for 4.21:
- New boards support: emtrion emCON-MX6, imx6ul-pico-pi, imx7d-sdb-reva
and vf610 based Liebherr's BK4 device, ZII SCU4 AIB board.
- Add flexcan support for i.MX6UL SoC, turn on stop mode wakeup feature
for flexcan, and enable devices on a few i.MX6 NXP boards.
- Enable AUO G101EVN010 lcd panel and Goodix touch support for
imx6ul-ccimx6ulsbcpro board.
- Enable sensors support for imx6qdl-sabresd board: egalax touch, light,
magnetometer and accelerometer sensor.
- Switch more boards to use SPDX identifier.
- Fix memory node duplication in i.MX device tree sources.
- Correct GIC PPI interrupts mask for i.MX6UL and i.MX7 SoCs.
- Drop 'snps,dw-pcie' compatible from LS1021A PCIe device to avoid
incorrect device matching.
- Add the gpu nodes for the adreno 200 GPU on iMX51 and iMX53, which
are now supported by the freedreno driver.
- Add DCP device support for i.MX6ULL, which requires explicit clock
enabling.
- Add '#thermal-sensor-cells' for thermal device and '#cooling-cells'
for cooling devices.
- Add missing clock information for EPIT on i.MX25 SoC.
- Add PWM and qdma devices for LS1021A SoC.
- Update cooling maps of LS1021A SoC to include all devices affected by
individual trip points.
- Random device addition and cleanup on various boards.
* tag 'imx-dt-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (82 commits)
ARM: dts: imx51-zii-rdu1: Do not specify "power-gpio" for hpa1
ARM: dts: imx6ul: Remove extra space between node name and brace
ARM: dts: imx6qdl-sabresd: Use GPIO_ACTIVE_HIGH for regulators
ARM: dts: imx6ul: add flexcan support
ARM: dts: imx5: add gpu nodes
ARM: dts: imx6qdl-sabresd: add accelerometer sensor support
ARM: dts: imx6qdl-sabresd: add magnetometer sensor support
ARM: dts: imx6qdl-sabresd: add light sensor support
ARM: dts: imx6qdl-sabresd: Move regulators outside of "simple-bus"
ARM: dts: imx6qdl: Fix memory node duplication
ARM: dts: imx6dl-mamoj: Add a memory node
ARM: dts: imx53-voipac-dmm-668: Fix memory node duplication
ARM: dts: vf610-zii-scu4-aib: Add HI8435 support
ARM: dts: imx6qdl-sabresd: add egalax touch screen support on i2c2 bus
ARM: dts: imx7s: Add flexcan stop mode wakeup support
ARM: dts: imx6ul: Add flexcan stop mode wakeup support
ARM: dts: imx6qdl: Add flexcan stop mode wakeup support
ARM: dts: imx6sx: Add flexcan stop mode wakeup support
ARM: dts: imx6ul-pico: Add the imx6ul-pico-pi variant
ARM: dts: imx6ul-pico-hobbit: Extend peripherals support
...
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Add missing properties and nodes for PMIC clocks in multiple DTS
files.
2. Add UHS-I bus speed support to Odroid XU3/XU4/HC SD card and bump the
maximum clock frequency to 200 MHz for SD and eMMC.
3. Update cooling maps to include all CPU devices in multiple DTS files.
4. Enable quirks for Exynos3250 DWC.
5. Add JPEG CODEC node to S5Pv210.
6. Add opp-suspend to devfreq OPPs on Exynos4 boards to fix resuming
from suspend to RAM.
7. Remove eDP from Arndale board as it does not work and breaks also
DSI.
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Merge tag 'samsung-dt-4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Samsung DTS ARM changes for v4.21
1. Add missing properties and nodes for PMIC clocks in multiple DTS
files.
2. Add UHS-I bus speed support to Odroid XU3/XU4/HC SD card and bump the
maximum clock frequency to 200 MHz for SD and eMMC.
3. Update cooling maps to include all CPU devices in multiple DTS files.
4. Enable quirks for Exynos3250 DWC.
5. Add JPEG CODEC node to S5Pv210.
6. Add opp-suspend to devfreq OPPs on Exynos4 boards to fix resuming
from suspend to RAM.
7. Remove eDP from Arndale board as it does not work and breaks also
DSI.
* tag 'samsung-dt-4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: remove display-port node from Arndale
ARM: dts: exynos: Add opp-suspend to DMC and leftbus devfreq OPPs on Exynos4
ARM: dts: s5pv210: Add s5p-jpeg codec node.
ARM: dts: exynos: Use Samsung SoC specific compatible for DWC2 module
ARM: dts: exynos: Add all CPUs in cooling maps
ARM: dts: exynos: Clarify comment explaining purpose of Odroid XU3 DTSI
ARM: dts: exynos: Add pin configuration for SD write protect on Odroid XU3/XU4/HC1
ARM: dts: exynos: Update maximum frequency for eMMC to 200MHz on Odroid XU3/XU4
ARM: dts: exynos: Update maximum frequency for SD card to 200MHz on Odroid XU3/XU4/HC1
ARM: dts: exynos: Fix LDO13 min values on Odroid XU3/XU4/HC1
ARM: dts: exynos: Add UHS-I bus speed support to Odroid XU3/XU4/HC1
ARM: dts: exynos: Add missing clocks to RTC node for Arndale board
ARM: dts: exynos: Add compatible for s5m8767 clocks node on Itop Core
ARM: dts: exynos: Add compatible for s2mps11 clocks node on Exynos542x
Signed-off-by: Olof Johansson <olof@lixom.net>
This is a quite big pull request this time, with a huge number of changes
(and patches) due to us fixing the vast majority of the DTC warnings our DT
had.
We also have a bunch of other good, more meaningful, changes:
- Support for the new Allwinner T3 (rebranded R40) and f1c100s (armv5)
SoCs
- AXP803 PMIC AC Power supply support
- Rework of the oscillators tree
- Two new boards: the t3-cqa3t-bv3 and Lichee Pi Nano
Plus a few enhancements here and there.
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Merge tag 'sunxi-dt-for-4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner DT changes for 4.21
This is a quite big pull request this time, with a huge number of changes
(and patches) due to us fixing the vast majority of the DTC warnings our DT
had.
We also have a bunch of other good, more meaningful, changes:
- Support for the new Allwinner T3 (rebranded R40) and f1c100s (armv5)
SoCs
- AXP803 PMIC AC Power supply support
- Rework of the oscillators tree
- Two new boards: the t3-cqa3t-bv3 and Lichee Pi Nano
Plus a few enhancements here and there.
* tag 'sunxi-dt-for-4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (84 commits)
ARM: dts: sunxi: Fix PMU compatible strings
ARM: dts: sun8i: r40: Add RTC device node
ARM: dts: sunxi: h3/h5: Fix up RTC device node and clock references
ARM: dts: sun8i: a23/a33: Fix up RTC device node
ARM: dts: sun8i: r40: Add clock accuracy for external oscillators
ARM: dts: sunxi: h3/h5: Add clock accuracy for external oscillators
ARM: dts: sun8i: a33: Drop audio codec oversampling rate to 128 fs
ARM: dts: sun8i: h3: Remove unnecessary reserved memory node
ARM: dts: sun8i: a33: Remove unnecessary reserved memory node
ARM: dts: suniv: Add device tree for Lichee Pi Nano
ARM: dts: suniv: add initial DTSI file for F1C100s
ARM: dts: axp81x: add AC power supply subnode
ARM: dts: sun8i: v3s: Remove skeleton and memory to avoid warnings
ARM: dts: sun8i: v3s: Provide default muxing for relevant controllers
ARM: dts: sun8i: v3s: Change pinctrl nodes to avoid warning
ARM: dts: sun8i: v3s: Change LRADC node names to avoid warnings
ARM: dts: sun8i: h3: Remove leading zeros from unit-addresses
ARM: dts: sun8i: BPI-M2M: Remove i2c nodes
ARM: dts: sun8i: a23/a33: Provide default muxing for relevant controllers
ARM: dts: sunxi: reference: Move the muxing back to the common DTSI
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Add support for the internal timer peripheral on RV1108.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add stdout-path property in /chosen node so that earlycon can be
used by just adding earlycon in bootargs.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
These changes add the external memory controller on Tegra20 as well as
the VIC on Tegra124.
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Merge tag 'tegra-for-4.21-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
ARM: tegra: Device tree changes for v4.21-rc1
These changes add the external memory controller on Tegra20 as well as
the VIC on Tegra124.
* tag 'tegra-for-4.21-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Add VIC on Tegra124
ARM: dts: tegra20: Add clock entry to External Memory Controller
ARM: dts: tegra20: Add interrupt entry to External Memory Controller
Signed-off-by: Olof Johansson <olof@lixom.net>
- New machine: Facebook Backpack-CMM BMC and flash layout
- OpenPower reference systems (Palmetto P8, Romulus P9) move to the
ColdFire based FSI driver
- Misc device tree updates from the OpenBMC project
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Merge tag 'aspeed-4.21-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into next/dt
ASPEED device tree updates for 4.20
- New machine: Facebook Backpack-CMM BMC and flash layout
- OpenPower reference systems (Palmetto P8, Romulus P9) move to the
ColdFire based FSI driver
- Misc device tree updates from the OpenBMC project
* tag 'aspeed-4.21-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
ARM: dts: aspeed: Add Facebook Backpack-CMM BMC
ARM: dts: Add Facebook BMC flash layout
ARM: dts: aspeed: wspoon: Enable iio-hwmon battery
ARM: dts: aspeed: romulus: Enable iio-hwmon-battery
ARM: dts: aspeed: Enable VHUB on Romulus
ARM: dts: aspeed-palmetto: Add LPC control node
ARM: dts: aspeed: Palmetto system can use coprocessor for FSI
ARM: dts: aspeed: Romulus system can use coprocessor for FSI
Signed-off-by: Olof Johansson <olof@lixom.net>
- various fixes from Daniel (W=12 issues mainly)
- support for the first pxa3xx devicetree pxa board
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Merge tag 'pxa-dt-4.21' of https://github.com/rjarzmik/linux into next/dt
This device-tree pxa update brings :
- various fixes from Daniel (W=12 issues mainly)
- support for the first pxa3xx devicetree pxa board
* tag 'pxa-dt-4.21' of https://github.com/rjarzmik/linux:
ARM: dts: pxa3xx: Add Raumfeld DTS files
ARM: dts: pxa: clean up USB controller nodes
ARM: dts: pxa3xx: clean up pxa3xx clock controller node name
ARM: dts: pxa3xx: order timer and gcu nodes under /pxabus
ARM: dts: pxa2xx: fix hwuart memory range
ARM: dts: pxa3xx: drop #address-cells and #size-cells from pinctrl node
ARM: dts: pxa2xx: drop #address-cells and #size-cells from /cpus
ARM: dts: pxa3xx: add gcu node
Signed-off-by: Olof Johansson <olof@lixom.net>
We need to add mcasp l3 port ranges for mcasp to use a correct l3
data port address for dma. And we're also missing the optional clocks
that we have tagged with HWMOD_OPT_CLKS_NEEDED in omap_hwmod_7xx_data.c.
Note that for reading the module revision register HWMOD_OPT_CLKS_NEEDED
do not seem to be needed. So they could be probably directly managed
only by the mcasp driver, and then we could leave them out for the
interconnect target module.
Fixes: 4ed0dfe3cf ("ARM: dts: dra7: Move l4 child devices to probe
them with ti-sysc")
Reported-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Looks like I missed the ranges for am335x epwmss. Let's set it up the
same way as for am437x and dra7.
Fixes: 87fc89ced3 ("ARM: dts: am335x: Move l4 child devices to probe
them with ti-sysc")
Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add MIO-DMAC (Media IO DMA Controller) nodes, and use them as
the DMA engine of SD/eMMC controllers.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
While reviewing the missing mcasp ranges I noticed omap4 hsi range
for gdd is wrong so let's fix it.
I'm not aware of any omap4 devices in mainline kernel though that use
hsi though.
Fixes: 84badc5ec5 ("ARM: dts: omap4: Move l4 child devices to probe
them with ti-sysc")
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The NXP i.MX 7ULP Evaluation Kit (EVK) provides a platform for rapid
evaluation of the i.MX 7ULP, which features NXP's advanced implementation
of the Arm Cortex-A7 core, the Arm Cortex-M4 core, as well as a 3D and
2D Graphics Processing Units (GPUs).
The EVK enables HDMI output for simple out-of-the-box to bring up but
allows reconfiguration for MIPI displays. The EVK is designed as a
System-On-Module(SOM) board that connects to an associated baseboard.
The SOM provides 1 GB LPDDR3, 8 MB Quad SPI flash, Micro SD 3.0 card
socket, WiFi/ Bluetooth capability, USB 2.0 OTG with Type C connector
and an NXP PF1550 power management IC (PMIC). The baseboard provides
additional capabilities including a full SD/MMC 3.0 card socket, audio
codec, multiple sensors, an HDMI connector, and an alternate MIPI display
connector. Additionally, the EVK facilitates software development with the
ultimate goal of faster time to market through the support of both
Linux OS and AndroidTM rich operating systems, as well as FreeRTOS.
This patch aims to support the preliminary booting up features
as follows:
GPIO
LPUART
FEC
SD/MMC
See more board details:
https://www.nxp.com/products/processors-and-microcontrollers/
arm-based-processors-and-mcus/i.mx-applications-processors/
i.mx-7-processors/evaluation-kit-for-the-i.mx-7ulp-applications
-processor:MCIMX7ULP-EVK
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The i.MX 7ULP family of processors features NXP's advanced implementation
of the Arm Cortex-A7 core, the Arm Cortex-M4 core, as well as a 3D and 2D
Graphics Processing Units (GPUs).
This patch aims to add the initial support including:
1) CLK
2) GPIO PTC, PTD, PTE, PTF
3) uSDHC 1/2
4) LPUART 4/5/6/7
5) LPI2C 6/7
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The imx7d-pico-hobbit contains a imx7d-pico SoM and a hobbit baseboard.
Add support for it.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds following peripherals for the imx7d-pico-pi as:
- LED
- Touchscreen
- GPIO
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
There are different models of WiFi being used in the SoM and the
handle name was too restrictive. This reworks it to a more generic and
meaningful name.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Pass the "phy-reset-gpios" property in order to describe the GPIO
that performs the Ethernet PHY reset.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx7d-pico-pi board contains:
- One SoM board (imx7d pico)
- One base board (pi).
In order to make it easier for adding support for other board variants,
move the commom SoM part to the imx7d-pico.dtsi file.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Currently the memory size described in dts is 2GB, which is incorrect.
There are 512MB and 1GB versions of imx7d-pico boards, so remove
the hardcoded memory size and let the bootloader pass the correct
value to the kernel.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
- A couple of fixes on imx7d-pico and imx7d-nitrogen7 boards to correct
the description of the Wifi clock.
- Change SW2ISO count to get a safer ARM LDO ramp-up time, so that
different boards can be covered. This fixes the ARM LDO failure seen
on some customer boards.
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Merge tag 'imx-fixes-4.20-3' into imx7d/pico
i.MX fixes for 4.20, round 3:
- A couple of fixes on imx7d-pico and imx7d-nitrogen7 boards to correct
the description of the Wifi clock.
- Change SW2ISO count to get a safer ARM LDO ramp-up time, so that
different boards can be covered. This fixes the ARM LDO failure seen
on some customer boards.
TPA6130A2 SD pin on RDU1 is not really controlled by SoC and instead
is only meant to notify the system that audio was "muted" by external
actors. To accommodate that, drop "power-gpio" property of hpa1 node as
well as specify a name for that GPIO so that userspace can access it.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Passing GPIO_ACTIVE_HIGH as GPIO flags for the GPIO controlled
regulator improves the readability, so use it instead of the
hardcoded number.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add flexcan support for i.MX6UL board. Change the place of CAN node delete
due to i.MX6ULZ include i.MX6UL dts but not support flexcan.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds the gpu nodes for the adreno 200 GPU on iMX51 and iMX53, now
supported by the freedreno driver.
The compatible for the iMX51 uses a patchid of 1, which is used by drm/msm
driver to identify the smaller 128KiB GMEM size.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add isl29023 light sensor support on i2c3 bus, the light
sensor's power is controlled by a fixed regulator, since
the isl29023 driver and most of other sensors on same
board like mag3110 and mma8451 do NOT support regulator
operation currently, they are all controlled by this
regulator, so this patch also adds the fixed regulator
support and make it always on.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It is not recommended to place regulators inside "simple-bus", so move
them out to make it cleaner the addition of new regulators.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx6qdl have duplicate memory nodes:
- One coming from the board device tree file: memory@
- One coming from the imx6qdl.dtsi file.
Fix the duplication by removing the memory node from
the imx6qdl.dtsi file and by adding 'device_type = "memory";'
in the board Device Tree.
Converted using the following command:
perl -p0777i -e 's/memory\@10000000 \{\n/memory\@10000000 \{\n\t\tdevice_type = \"memory\";\n/m' `find ./arch/arm/boot/dts -name "imx6*"``
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add a memory node, with an empty memory size, which will be filled
by the bootloader.
This is done in preparation for removing the memory node from
imx6qdl.dtsi.
Reported-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx53-voipac-dmm-668 has two memory nodes, but the correct representation
would be to use a single one with two reg entries - one for each RAM chip
select, so fix it accordingly.
Reported-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On the vf610-zii-scu4-aib board there is a hi8435 (32-channel
discrete-to-digital SPI sensor device) in the DSPI0 bus.
Add support for it.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add egalax touch screen support on i2c2 bus, it is connected
to LVDS0, while the existing one on i2c3 bus is connected to
LVDS1.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The imx6ul-pico-pi contains a imx6ul-pico SoM and a pi baseboard:
https://www.technexion.com/products/pico-baseboards/detail/PICO-PI
Add support for it.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Use the same child led node and label name as used in the
imx7d-pico-hobbit board.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx6ul-pico-hobbit board contains:
- One SoM board (imx6ul pico)
- One base board (hobbit).
In order to make it easier for adding support for other board variants,
move the commom SoM part to the imx6ul-pico.dtsi file.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
add the qDMA device tree nodes for LS1021A devices.
Signed-off-by: Wen He <wen.he_1@nxp.com>
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on vf500/vf600 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the vf500.dtsi/vf610m4.dtsi files.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The GIC_CPU_MASK_SIMPLE() macro should take as its argument the actual
number of CPU cores the interrupt controller is wired to.
i.MX7S contains a single Cortex-A7, hence the second interrupt specifier
cell for Private Peripheral Interrupts should use "GIC_CPU_MASK_SIMPLE(1)".
Likewise, i.MX7D contains two Cortex-A7 cores, so it should use
"GIC_CPU_MASK_SIMPLE(2)" instead.
Tested on a imx7s-warp.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The GIC_CPU_MASK_SIMPLE() macro should take as its argument the actual
number of CPU cores the interrupt controller is wired to.
i.MX6UL contains a single Cortex-A7, hence the second interrupt specifier
cell for Private Peripheral Interrupts should use "GIC_CPU_MASK_SIMPLE(1)".
Tested on a imx6ul-evk.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The flexcan1 is pin conflict with fec. User would make flexcan1 enabled
with fec disabled to use CAN.
Signed-off-by: Aisheng Dong <aisheng.dong@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The CAN transceiver on MX6SX Sabreauto board seems in sleep mode by default
after power up the board. User has to press the wakeup key on ARD baseboard
before using the transceiver, or it may not work properly when power up the
board at the first time(warm reset does not have such issue).
This patch operates the wake pin too besides stby/en pins by chaining them
together in regulator mode.
Signed-off-by: Aisheng Dong <aisheng.dong@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
CAN transceiver is different on RevA and RevB board.
It's active high on RevA while active low on Rev B.
Signed-off-by: Aisheng Dong <aisheng.dong@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The LS1021A has 8 possible PWMs, so adding them (disabled by default)
Signed-off-by: Patrick Havelange <patrick.havelange@essensium.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The ConnectCore 6UL SBC Pro has an AUO/Goodix LCD accessory kit that is
connected on the LVDS interface through an on-board LVDS transceiver.
This change adds support for the touch interface.
Signed-off-by: Alex Gonzalez <alex.gonzalez@digi.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This change adds support for the AUO G101EVN010 lcdif panel for the
mxsfb DRM driver.
Signed-off-by: Alex Gonzalez <alex.gonzalez@digi.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx25 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx25.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx27 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx27.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx1 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx1.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx28 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx28.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx23 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx23.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Adopt the SPDX license identifier headers to ease license compliance
management.
Most of the i.MX NXP reference board dts files have already been
converted, so switch the remaining ones.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Adopt the SPDX license identifier headers to ease license compliance
management.
Most of the wandboard dts files have already been converted, so switch
the remaining ones.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx50-evk has duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx50.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX6SLL EVK board has WDOG_B pin connected to the PMIC;
Add the WDOG_B pinctrl entry and 'fsl,ext-reset-output'
property to wdog node to let watchdog trigger a system
POR reset via the PMIC.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On i.MX6SLL EVK board, there is a debug LED controlled
by MX6SLL_PAD_EPDC_VCOM1__GPIO2_IO04 pin, add support
for it.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The imx6qdl-sabreauto boards have a pcie slot so let's enable it.
Tested on imx6dl-sabreauto with an atk9k wifi card; scanning works.
There are unhandled differences for imx6qp but imx6qp-sabreauto.dts
already contains a snippet explicitly disabling the &pcie node so that
can be dealt with later.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx6sl have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx6sl.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx6sx have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx6sx.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx6ul have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx6ul.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add memory node to board dts.
This is done in preparation of removing the memory node from imx6ul.dtsi.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Current imx7d-sdb.dts has some incorrect settings about
Rev-A and Rev-B boards, some of the settings are based on
Rev-A board but some are based on Rev-B board, clean up it
by adding i.MX7D SDB Rev-A board support, make default
imx7d-sdb.dts for Rev-B board as usual, and introduce
imx7d-sdb-reva.dts for Rev-A board. Below are the affected
differences of Rev-A and Rev-B board:
Rev-A Rev-B
USB_OTG2_PWR: UART3_CTS_B GPIO1_IO07
ENET_EN_B: None GPIO1_IO04
TP_INT_B: EPDC_DATA13 EPDC_BDR1
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Each CPU can (and does) participate in cooling down the system but the
DT only captures a handful of them, normally CPU0, in the cooling maps.
Things work by chance currently as under normal circumstances its the
first CPU of each cluster which is used by the operating systems to
probe the cooling devices. But as soon as this CPU ordering changes and
any other CPU is used to bring up the cooling device, we will start
seeing failures.
Also the DT is rather incomplete when we list only one CPU in the
cooling maps, as the hardware doesn't have any such limitations.
Update cooling maps to include all devices affected by individual trip
points.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds support for the emtrion GmbH emCON-MX6 modules.
They are available with imx.6 Solo, Dual-Lite, Dual and Quad
equipped with Memory from 512MB to 2GB (configured by U-Boot).
Our default developer-Kit ships with the Avari baseboard and the
EDT ETM0700G0BDH6 Display (imx6[q|dl]-emcon-avari).
The devicetree is split into the common part providing all module
components and the basic support for all SoC versions
(imx6qdl-emcon.dtsi) and parts which are i.mx6 S|DL and D|Q relevant.
Finally the support for the avari baseboard in the developer-kit
configuration is provided by the emcon-avari dts files.
Signed-off-by: Jan Tuerk <jan.tuerk@emtrion.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Adding the label cpu0 allows the adjustment of cpu-parameters
by reference in overlaying dtsi files in the same way as it
is possible for imx6q devices.
Signed-off-by: Jan Tuerk <jan.tuerk@emtrion.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Some SOCs in the i.MX6 family have a USB host controller that is
only capable of the HSIC interface and has no on-board PHY.
To be able to use these controllers, we need to add "usb-nop-xceiv"
dummy PHYs.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
From i.MX6SX reference manual CCM chapter, KPP and
WDOGn use IPG clock as their clock, specify IPG
clock for KPP and WDOGn instead of DUMMY clock.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Removed the wrong compatible string "snps,dw-pcie", in case
match incorrect driver.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx7 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx7s.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx35 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx35.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx31 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx31.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Vladimir Zapolskiy <vz@mleia.com>
Tested-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to Documentation/devicetree/bindings/media/fsl-pxp.txt,
only one PXP clock needs to be described and it should be named
"axi".
Also pass the compatible string as suggested in the bindings doc.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Remove "regulator-always-on" property for vddpu regulator
since it can be OFF when GPU power domain is OFF.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The "fsl,mf-mix-wakeup-irq" is ONLY used as a temporary
solution in NXP's internal tree for Mega/Fast Mix off
feature after suspend, upstream kernel does NOT need it,
remove it.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx53 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx53.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx51 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx51.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
One small fix for a regulator range on the Banana Pi M3
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Merge tag 'sunxi-fixes-for-4.20' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into fixes
Allwinner fixes for 4.20
One small fix for a regulator range on the Banana Pi M3
* tag 'sunxi-fixes-for-4.20' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sun8i: a83t: bananapi-m3: increase vcc-pd voltage to 3.3V
Signed-off-by: Olof Johansson <olof@lixom.net>
- A couple of fixes on imx7d-pico and imx7d-nitrogen7 boards to correct
the description of the Wifi clock.
- Change SW2ISO count to get a safer ARM LDO ramp-up time, so that
different boards can be covered. This fixes the ARM LDO failure seen
on some customer boards.
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Merge tag 'imx-fixes-4.20-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
i.MX fixes for 4.20, round 3:
- A couple of fixes on imx7d-pico and imx7d-nitrogen7 boards to correct
the description of the Wifi clock.
- Change SW2ISO count to get a safer ARM LDO ramp-up time, so that
different boards can be covered. This fixes the ARM LDO failure seen
on some customer boards.
* tag 'imx-fixes-4.20-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx7d-nitrogen7: Fix the description of the Wifi clock
ARM: imx: update the cpu power up timing setting on i.mx6sx
ARM: dts: imx7d-pico: Describe the Wifi clock
Signed-off-by: Olof Johansson <olof@lixom.net>
The 50ms debounce is too low and give ghost bounces on some
platforms. Bump it to 100ms to make it stable.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the FOTG210 USB host controller to the Gemini
device trees. In the main SoC DTSI it is flagged as disabled
and then it is selectively enabled on the devices that utilize
it.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This sets the partition information on the SQ201 to be read
out from the RedBoot partition table, removes the static
partition table and sets our boot options to mount root from
/dev/mtdblock2 where the squashfs+JFFS2 resides.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Some Gemini platforms have a parallel NOR flash which conflicts
with use cases reusing some of the flash lines (such as CE1)
for GPIO.
Fix this on the D-Link DIR-685 and Itian SQ201 by creating
"enabled" and "disabled" states for the flash pin control
handle, and rely on the flash handling code to switch this
in and out when accessed so these lines can be used
for GPIO when flash is not accessed, and enable flash
access.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The vendor firmware was analyzed to get the right idea about
this flash layout. /proc/mtd contains:
dev: size erasesize name
mtd0: 01e7ff40 00020000 "rootfs"
mtd1: 01f40000 00020000 "upgrade"
mtd2: 00040000 00020000 "rgdb"
mtd3: 00020000 00020000 "nvram"
mtd4: 00040000 00020000 "RedBoot"
mtd5: 00020000 00020000 "LangPack"
mtd6: 02000000 00020000 "flash"
Here "flash" is obviously the whole device and we know "rootfs"
is a bogus hack to point to a squashfs rootfs inside of the main
"upgrade partition". We know "RedBoot" is the first 0x40000 of
the flash and the "upgrade" partition follows from 0x40000 to
0x1f8000. So we have mtd0, 1, 4 and 6 covered.
Remains:
mtd2: 00040000 00020000 "rgdb"
mtd3: 00020000 00020000 "nvram"
mtd5: 00020000 00020000 "LangPack"
Inspecting the flash at 0x1f8000 and 0x1fa000 reveals each of
these starting with "RGCFG1" so we assume 0x1f8000-1fbfff is
"rgdb" of 0x40000.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Earlier attempt to move am335x mcasp to probe with ti-sysc
interconnect target module caused audio to stop working and and
the dts changes were reverted by commit 5d2632a577 ("ARM: dts:
Revert am335x mcasp ti-sysc changes").
Turns out we were missing the l3 data port ranges for mcasp. This
caused mcasp dma to attempt to use wrong port address. So let's
try again essentially reverting the earlier revert and adding the
missing l3 data port ranges.
Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
It was noticed that unbinding and rebinding the KSZ8851 ethernet
resulted in the driver reporting "failed to read device ID" at probe.
Probing the reset line with a 'scope while repeatedly attempting to
bind the driver in a shell loop revealed that the KSZ8851 RSTN pin is
constantly held at zero, meaning the device is held in reset, and
does not respond on the SPI bus.
Experimentation with the startup delay on the regulator set to 50ms
shows that the reset is positively released after 20ms.
Schematics for this board are not available, and the traces are buried
in the inner layers of the board which makes tracing where the RSTN pin
extremely difficult. We can only guess that the RSTN pin is wired to a
reset generator chip driven off the ethernet supply, which fits the
observed behaviour.
Include this delay in the regulator startup delay - effectively
treating the reset as a "supply stable" indicator.
This can not be modelled as a delay in the KSZ8851 driver since the
reset generation is board specific - if the RSTN pin had been wired to
a GPIO, reset could be released earlier via the already provided support
in the KSZ8851 driver.
This also got confirmed by Peter Ujfalusi <peter.ujfalusi@ti.com> based
on Blaze schematics that should be very close to SDP4430:
TPS22902YFPR is used as the regulator switch (gpio48 controlled):
Convert arm boot_lock to raw The VOUT is routed to TPS3808G01DBV.
(SCH Note: Threshold set at 90%. Vsense: 0.405V).
According to the TPS3808 data sheet the RESET delay time when Ct is
open (this is the case in the schema): MIN/TYP/MAX: 12/20/28 ms.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
[tony@atomide.com: updated with notes from schematics from Peter]
Signed-off-by: Tony Lindgren <tony@atomide.com>
When a micro SD card is inserted in the PDU001 card cage, the card
detection switch is opened and the corresponding GPIO input is driven
by a pull-up. Hence change the active level of the card detection
input from low to high.
Signed-off-by: Felix Brack <fb@ltec.ch>
Signed-off-by: Tony Lindgren <tony@atomide.com>
OMAP5's Super-Speed USB port has a software mailbox register
that needs to be fed with VBUS and ID events from an external
VBUS/ID comparator.
Without this, Host role will not work correctly.
Fixes: 656c1a65ab ("ARM: dts: omap5: enable OTG role for DWC3 controller")
Reported-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
"arm,cortex-a15-pmu" is not a valid fallback compatible string for an
Cortex-A7 PMU, so drop it.
Cc: Maxime Ripard <maxime.ripard@bootlin.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The R40 has an RTC hardware block, which has additional registers
that are not related to RTC or clock functions, and is otherwise
compatible with the H3's RTC.
Add a device node for it, and fix up any references to the LOSC.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The RTC module on the H3 was claimed to be the same as on the A31, when
in fact it is not. The A31 does not have an RTC external clock output,
and its internal RC oscillator's average clock rate is not in the same
range. The H5's RTC has some extra crypto-related registers compared to
the H3. Their exact functions are not clear. Also the RTC-VIO regulator
has different settings.
This patch fixes the compatible string and clock properties to conform
to the updated bindings. The device node for the internal oscillator is
removed, as it is internalized into the RTC device. Clock references to
the IOSC and LOSC are also fixed.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The RTC module on the A23 was claimed to be the same as on the A31, when
in fact it is not. The A31 does not have an RTC external clock output,
and its internal RC oscillator's average clock rate is not in the same
range. The A33's RTC is the same as the A23.
This patch fixes the compatible string and clock properties to conform
to the updated bindings. The register range is also fixed.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Arndale boards have wires for DSI and eDP panels, but in-kernel support
for eDP panels is broken for long time and breaks display support even on
boards with DSI panels.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The Edison 2 Quad-Core was a Tablet device released in 2013 by MundoReader
using a rk3188 soc. Add a devicetree for it.
Signed-off-by: Heiko Stuebner <heiko.stuebner@bq.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Add the Video Processing Unit node for RK3288 SoC.
Fix the VPU IOMMU node, which was disabled and lacking
its power domain property.
Reviewed-by: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
According to bindings/regulator/fixed-regulator.txt the 'clocks' and
'clock-names' properties are not valid ones.
In order to turn on the Wifi clock the correct location for describing
the CLKO2 clock is via a mmc-pwrseq handle, so do it accordingly.
Fixes: 56354959cf ("ARM: dts: imx: add Boundary Devices Nitrogen7 board")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The R40 datasheet specifies a tolerance range for the external
oscillators used. Add them to the device tree as the clock accuracy.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The H3 datasheet specifies a tolerance range for the external
oscillators used. Add them to the device tree as the clock accuracy.
The internal oscillator is left unchanged, as it will be removed later.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
We need to add mcasp l3 port ranges for mcasp to use a correct l3
data port address for dma.
Fixes: d95adfd458 ("ARM: dts: am437x: Move l4 child devices to
probe them with ti-sysc")
Reported-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add support for the SPI NOR device used to boot up the system
to the iWave RZ/G1N Qseven System On Module DT.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The iWave RZ/G1N board is almost identical to RZ/G1M. cmt and rwdt modules
are SoC specific and should be part of board dts rather than SoM dtsi. By
moving these nodes to the common dtsi it allows cmt and rwdt to be enabled
on both of these boards with less lines of code.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The current oversampling rate of 512 means that for 48 kHz 16 bit
stereo, the MCLK is running at the same rate as the module clock,
so there is no head room to support higher sampling rates. The codec
however supports up to 192 kHz for playback.
This patch drops the oversampling rate from 512 to 128, so that 192 kHz
audio can be played back directly without downsampling. Ideally we
should be using different oversampling rates for different sampling
rates, but that's not possible without a platform-specific machine
driver.
Fixes: 870f1bd1f5 ("ARM: dts: sun8i: Add audio codec, dai and card for A33")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Just like on the A33, the video engine on the H3 can map any address in
memory, so there is no particular need to have reserved memory at a fixed
address.
As a result, remove the reserved memory node and let the kernel allocate
the CMA pool wherever it sees fit.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
While we believed that the memory for the video engine had to be kept
in the first 256 MiBs of DRAM, this is no longer true starting with the
A33 and any address can be mapped.
As a result, remove the reserved memory node and let the kernel allocate
the CMA pool wherever it sees fit.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The EMAC driver requires a syscon node to access the EMAC clock
configuration register (that is part of the system-control register
range and controlled). For this purpose, a dummy syscon node was
introduced to let the driver access the register freely.
Recently, the EMAC driver was tuned to get access to the register when
the SRAM driver is registered (as used on the A64). As a result, it is
no longer necessary to have a dummy syscon node for that purpose.
Now that we have a proper system-control node for both the H3 and H5,
we can get rid of that dummy syscon node and have the EMAC driver use
the node corresponding to the proper SRAM driver (by switching the
syscon label over to each dtsi). This way, we no longer have two
separate nodes for the same register space.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Unlike in previous generations, the system-control register range is not
limited to a size of 0x30 on the H3. In particular, the EMAC clock
configuration register (accessed through syscon) is at offset 0x30 in
that range.
Extend the register size to its full range (0x1000) as a result.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The Wifi chip should be clocked by a 32kHz clock coming from i.MX7D
CLKO2 output pin, so describe the pinmux and clock hierarchy in the
device tree to allow the Wifi chip to be properly clocked.
Managed to successfully test Wifi with such change. Used the standard
nvram.txt file provided by TechNexion, which selects an external 32kHz
clock for the Wifi chip by default.
Fixes: 99a52450c7 ("ARM: dts: imx7d-pico: Add Wifi support")
Suggested-by: Arend van Spriel <arend.vanspriel@broadcom.com>
Tested-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The values are taken from Amlogic's 3.10 kernel sources.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The values are taken from Amlogic's 3.10 kernel sources. Their sources
have a "meson8m2_n200_2G.dtd" which defines a different voltage table:
- 0.86V for 96MHz
- (values in between omitted)
- 1.14V for 1.992GHz
The reason for this is simply the hardware design because the voltage
regulator on this board is has a minimum output of 0.86V and a maximum
output of 1.14V. The recommended settings are added with this patch
instead of using the values that are only valid for one board.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Meson8b SoC is using four Cortex-A5 cores. These come with an ARM
global timer.
This adds the Cortex-A5 global timer but keeps it disabled for now. The
timer is clocked by the "PERIPH" clock whose rate can change during
runtime (when changing the frequency of the CPU clock). Unfortunately
the arm_global_timer driver does not handle changes to the clock rate
yet.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Meson8B SoC is using four ARM Cortex-A5 cores which come with a
"TWD" (Timer-Watchdog) based timer. This adds support for the ARM TWD
Timer on this SoC.
Suggested-by: Carlo Caione <carlo@endlessm.com>
[ rebased patch from Carlo, use IRQ_TYPE_EDGE_RISING instead of
IRQ_TYPE_LEVEL_LOW to prevent "GIC: PPI13 is secure or misconfigured"
message during boot, use pre-processor macros to specify the IRQ,
added the correct clock, dropped TWD watchdog node since there's no
driver for it anymore ]
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Meson8 and Meson8m2 SoCs are using four Cortex-A9 cores. These come
with an ARM global timer.
This adds the Cortex-A9 global timer but keeps it disabled for now. The
timer is clocked by the "PERIPH" clock whose rate can change during
runtime (when changing the frequency of the CPU clock). Unfortunately
the arm_global_timer driver does not handle changes to the clock rate
yet.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Meson8 and Meson8m2 SoC are using four ARM Cortex-A9 cores which
come with a "TWD" (Timer-Watchdog) based timer. This adds support for
the ARM TWD Timer on these two SoCs.
Suggested-by: Carlo Caione <carlo@endlessm.com>
[ rebased patch from Carlo, use IRQ_TYPE_EDGE_RISING instead of
IRQ_TYPE_LEVEL_LOW to prevent "GIC: PPI13 is secure or misconfigured"
message during boot, use pre-processor macros to specify the IRQ,
added the correct clock, dropped TWD watchdog node since there's no
driver for it anymore ]
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The public Meson8b (S805) datasheet describes a memory region called "A9
Periph base" which starts at 0xC4300000 and ends at 0xC430FFFF. Add a
simple-bus node and move all peripherals that are part of this memory
region.
This makes the .dts a bit easier to read. No functional changes.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add a device node for the PCIe controller on the Renesas
RZ/G1N (r8a7744) SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the xhci controller on the Renesas
RZ/G1N (r8a7744) SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the DT nodes needed by MSIOF[012] interfaces to the SoC dtsi.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the DT node for the QSPI interface to the SoC dtsi.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds support for the camera daughter board which is
connected to iWave's RZ/G1N Qseven carrier board.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add TPU support to SoC DT.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the definitions for pwm[0123456] to the SoC dtsi.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the six IPMMU instances found in the r8a7744 to DT with a disabled
status.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add VSP support to SoC DT.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add VIN[012] support to SoC dt.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add CMT[01] support to SoC DT.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch instantiates the thermal sensor module with thermal-zone
support.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe the IRQC interrupt controller in the r8a7744 device tree.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the definitions for can0 and can1 to the r8a7744 SoC dtsi.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add sound support for the RZ/G1N SoC (a.k.a. R8A7744).
This work is based on similar work done on the R8A7743 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the Watchdog Timer (RWDT) controller on the Renesas
RZ/G1N (r8a7744) SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add usb dmac and hsusb device nodes on RZ/G1N SoC dtsi.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe internal PCI bridge devices, USB phy device and
link PCI USB devices to USB phy.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable the SDHI0 controller on iWave RZ/G1N Qseven System On Module.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add eMMC support for iWave RZ/G1N Qseven System On Module.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add MMC node to the DT of the r8a7744 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add SDHI nodes to the DT of the r8a7744 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the I2C[0-5] and IIC[0,1,3] devices nodes to the R8A7744 device tree.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe [H]SCIF{|A|B} ports in the R8A7744 device tree.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add DT node for the Advanced Power Management Unit (APMU), add the
second CPU core, and use "renesas,apmu" as "enable-method".
Also add cpu1 phandle node to the PMU interrupt-affinity property.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add Ethernet AVB support for R8A7744 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe GPIO blocks in the R8A7744 device tree.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe SYS-DMAC0/1 in the R8A7744 device tree.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add support for iWave RainboW-G20D-Qseven board based on RZ/G1N.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Basic support for the RZ/G1N (R8A7744) SoC. Added placeholders
to avoid compilation error with the common platform code.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add support for iWave RZ/G1N Qseven System On Module.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The thermal hardware description for the RZ/G1M SoC was added to its DTS
after the introduction of support for thermal zones, and included a
thermal-zones node from the beginning.
Hence there is no need to claim compatibility with
"renesas,rcar-thermal", which would be needed only for backwards
compatibility with kernels predating thermal zone support.
Fixes: 6c76b4f7d8 ("ARM: dts: r8a7743: Add thermal device to DT")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Lichee Pi Nano is a F1C100s board by Lichee Pi.
Add initial device tree for it.
Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
F1C100s is one product with the suniv die, which has a 32MiB co-packaged
DDR1 DRAM chip. As we have the support for suniv pin controller and CCU now, add a
initial DTSI for it.
Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
This patch adds a set of DTS files that support all PXA3xx based Raumfeld
audio hardware devices.
Common nodes are factored out into 'common' and 'tuneable-clock' include
files to keep the top-level DTS files smaller.
Signed-off-by: Daniel Mack <daniel@zonque.org>
[Robert: Reordered Makefile in alphabetical order]
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
please pull the following for 4.20:
- Stefan fixes the polariy of the Wi-Fi reset GPIOs signals which would
break on Raspberry Pi 3B and 3B+
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Merge tag 'arm-soc/for-4.20/devicetree-fixes' of https://github.com/Broadcom/stblinux into fixes
This pull request contains Broadcom ARM-based SoCs Device Tree fixes,
please pull the following for 4.20:
- Stefan fixes the polariy of the Wi-Fi reset GPIOs signals which would
break on Raspberry Pi 3B and 3B+
* tag 'arm-soc/for-4.20/devicetree-fixes' of https://github.com/Broadcom/stblinux:
ARM: dts: bcm2837: Fix polarity of wifi reset GPIOs
Signed-off-by: Olof Johansson <olof@lixom.net>
for 4.21, please pull the following:
- Rafal relicenses a bunch of DTS files he wrote under the GPL 2.0+/MIT
license and adds proper SPDX license tags in the process
- Rene adds support for the Linksys EA6500 v2 Wi-Fi router based on
BCM4708 plus two BCM4360 and BCM4331 radios
- Phil documents and updates the vchiq mailbox compatible string in
order to establish a correct agreement between the Raspberry Pi
firmware and the ARM CPU's view of what an ARM CPU cache line size is,
he also fixes the mailbox "reg" property to be correctly expressed in
bytes
- Stefan updates the Raspberry Pi Zero DTS files to use SPDX tags
- Florian enables the SATA PHY and AHCI controller on the BCM63138 SoCs,
he also does a bit of refactoring of aliases for the Northstar Plus
DTS files
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Merge tag 'arm-soc/for-4.21/devicetree' of https://github.com/Broadcom/stblinux into next/dt
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 4.21, please pull the following:
- Rafal relicenses a bunch of DTS files he wrote under the GPL 2.0+/MIT
license and adds proper SPDX license tags in the process
- Rene adds support for the Linksys EA6500 v2 Wi-Fi router based on
BCM4708 plus two BCM4360 and BCM4331 radios
- Phil documents and updates the vchiq mailbox compatible string in
order to establish a correct agreement between the Raspberry Pi
firmware and the ARM CPU's view of what an ARM CPU cache line size is,
he also fixes the mailbox "reg" property to be correctly expressed in
bytes
- Stefan updates the Raspberry Pi Zero DTS files to use SPDX tags
- Florian enables the SATA PHY and AHCI controller on the BCM63138 SoCs,
he also does a bit of refactoring of aliases for the Northstar Plus
DTS files
* tag 'arm-soc/for-4.21/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: BCM5301X: Describe Northstar pins mux controller
ARM: dts: BCM5301X: Add basic DT for Linksys EA6500 V2
ARM: dts: bcm2835-rpi-zero: Switch to SPDX identifier
ARM: dts: bcm283x: Correct mailbox register sizes
ARM: dts: bcm283x: Correct vchiq compatible string
dt-bindings: soc: Document "brcm,bcm2836-vchiq"
ARM: dts: NSP: Move aliases to bcm-nsp.dtsi
ARM: dts: BCM53573: Relicense SoC file to the GPL 2.0+ / MIT
ARM: dts: BCM63xx: Enable SATA AHCI and PHY for BCM963138DVT
ARM: dts: BCM63xx: enable SATA PHY and AHCI controller
ARM: dts: BCM53573: Relicense Tenda AC9 file to the GPL 2.0+ / MIT
ARM: dts: BCM5301X: Relicense BCM47094 file to the GPL 2.0+ / MIT
ARM: dts: BCM5301X: Relicense BCM47081/BCM4709 files to the GPL 2.0+ / MIT
Signed-off-by: Olof Johansson <olof@lixom.net>
There's a bug in dtc in checking for duplicate node names when there's
another section (e.g. "/ { };"). In this case, skeleton.dtsi provides
another section. Upon removal of skeleton.dtsi, the dtb fails to build
due to a duplicate node 'fixedregulator@0'. As both nodes were pretty
much the same 3.3V fixed regulator, it hasn't really mattered. Fix this
by renaming the nodes to something unique. In the process, drop the
unit-address which shouldn't be present wtihout reg property.
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
The commit b1b8f45b31 ("ARM: dts: bcm2837: Add missing GPIOs of Expander")
introduced a wifi power sequence. Unfortunately the polarity of the reset
GPIOs were wrong and broke the wifi support on Raspberry Pi 3 B and
later in 3 B+. This wasn't discovered before since the power sequence
takes only effect in case the relevant MMC driver is compiled as a module.
Fixes: b1b8f45b31 ("ARM: dts: bcm2837: Add missing GPIOs of Expander")
Cc: stable@vger.kernel.org
Reported-by: Matthias Lueschner <lueschem@gmail.com>
Link: https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=911443
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Mark as opp-suspend required devfreq Operating Performance Points to
fix resuming issues on Exynos 4 boards.
The patch is based on earlier work by Tobias Jakobi.
Suggested-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Suggested-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Split the 10Kbytes CAN message RAM to be able to use simultaneously
FDCAN1 and FDCAN2 instances.
First 5Kbytes are allocated to FDCAN1 and last 5Kbytes are used for
FDCAN2. To do so, set the offset to 0x1400 in mram-cfg for FDCAN2.
Signed-off-by: Bich Hemon <bich.hemon@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add initial version of device tree file for Facebook Backpack CMM
(Chasis Management Module) ast2500 BMC.
Signed-off-by: Tao Ren <taoren@fb.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
This is the layout used by Facebook BMC systems. It describes the fixed
flash layout of a 32MB mtd device.
Signed-off-by: Tao Ren <taoren@fb.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
The BMC can read the RTC battery voltage via ADC
channel 12.
Signed-off-by: Matt Spinler <spinler@linux.vnet.ibm.com>
Reviewed-by: Lei YU <mine260309@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add iio-hwmon-battery using adc channel 12 and enable adc to make
adc running. This channel is used to read RTC battery voltage.
Note with Romulus hardware design, it requires GPIOR3 to be pulled
high to read the voltage, otherwise the reading is 0.
When GPIOR3 is high, it consumes battery and impacts the battery life.
So it is left for user space to toggle the GPIO when trying to read the
voltage.
Signed-off-by: Lei YU <mine260309@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
This allows userspace to switch away from bitbanging to use kernel
FSI with the coprocessor.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
This replaces the FSI compatible with the ColdFire FSI compatible.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
PXA25xx SoCs don't have a USB controller, so drop the node from the
common pxa2xx.dtsi base file. Both pxa27x and pxa3xx have a dedicated
node already anyway.
While at it, unify the names for the nodes across all pxa platforms.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Reported-by: Sergey Yanovich <ynvich@gmail.com>
Link: https://patchwork.kernel.org/patch/8375421/
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
The clock controller node does not need a unit slave designator as it does
not have a reg property. Also, remove the underscore from the name.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
These are devices on the PXA bus, so make the device tree structure
reflect that.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
The memory range for the hwuart is at 0x41600000, not 0x41100000.
This also solves a conflict with the MMC controller node.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
The pinctrl node does not have any children, so the #address-cells and #size-cells
properties are not needed.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
PXA is single-core only, so this node will not have enumerable children.
Drop the #address-cells and #size-cells properties to squelch a dtc warning.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Add a device node for hardware graphic acceleration.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Add node for s5p-jpeg codec, which is present in S5PV210 SoC.
Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The base aspeed-g5.dtsi already defines a '/memory@80000000' node, so
'/memory' in the board files create a duplicate node. We're probably
getting lucky that the bootloader fixes up the memory node that the
kernel ends up using. Add the unit-address so it's merged with the base
node.
Found with DT json-schema checks.
Cc: Joel Stanley <joel@jms.id.au>
Cc: Andrew Jeffery <andrew@aj.id.au>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-aspeed@lists.ozlabs.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
There's a bug in dtc in checking for duplicate node names when there's
another section (e.g. "/ { };"). In this case, skeleton.dtsi provides
another section. Upon removal of skeleton.dtsi, the dtb fails to build
due to a duplicate node 'fixedregulator@0'. As both nodes were pretty
much the same 3.3V fixed regulator, it hasn't really mattered. Fix this
by renaming the nodes to something unique. In the process, drop the
unit-address which shouldn't be present wtihout reg property.
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
- support more timers on meson8
- add the stdout-path property on several boards
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Merge tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt
Amlogic 32-bit DT updates for v4.21
- support more timers on meson8
- add the stdout-path property on several boards
* tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson: add the clock inputs for the Meson timer
ARM: dts: meson: add the TIMER B/C/D interrupts
ARM: dts: meson: consistently disable pin bias
ARM: dts: meson8b: mxq: add the /chosen/stdout-path property
ARM: dts: meson8: minix-neo-x8: add the /chosen/stdout-path property
ARM: dts: meson6: atv1200: add the /chosen/stdout-path property
dt-bindings: timer: meson6_timer: document the clock inputs
dt-bindings: timer: meson6_timer: document all interrupts
Signed-off-by: Olof Johansson <olof@lixom.net>
These changes mostly configure pinctrl for am437x-gp-evm. There is
also non-critical fix for a comment for Clang, and we enable earlycon
for am3517-evm.
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Merge tag 'omap-for-v4.21/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Device tree changes for omaps for v4.21 merge window
These changes mostly configure pinctrl for am437x-gp-evm. There is
also non-critical fix for a comment for Clang, and we enable earlycon
for am3517-evm.
* tag 'omap-for-v4.21/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am437x-gp-evm: Add sleep state for beeper pins
ARM: dts: am437x-gp-evm: Add pinmux for gpio0 wake
ARM: dts: am437x-gp-evm: Add uart0 pinctrl default and sleep states
ARM: dts: am437x-gp-evm: Add pinctrl for debugss pins
ARM: dts: am437x-gp-evm: Add pinctrl for unused_pins
ARM: dts: am437x-gp-evm: Add state for ddr3 vtt toggle pin
ARM: dts: am3517-evm: Enable earlycon stdout path
ARM: dts: omap3-gta04: Fix comment block
Signed-off-by: Olof Johansson <olof@lixom.net>
This updates the Versatile Express family DTS files to
contain the correct and detailed information required
for the PL11x DRM driver to work properly.
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Merge tag 'vexpress-drm-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/dt
Versatile Express DTS update for DRM:
This updates the Versatile Express family DTS files to
contain the correct and detailed information required
for the PL11x DRM driver to work properly.
* tag 'vexpress-drm-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: dts: Modernize the Vexpress PL111 integration
Signed-off-by: Olof Johansson <olof@lixom.net>
Despite Marvel keeps their base addresses secret there's a good chance
they're actually correct.
SSP1 and SSP3 bases were taken from OLPC 1.75: OpenFirmware and kernel
respectively. SSP2 and SSP4 addresses are from James Cameron who actually
has a copy of the data sheet.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Olof Johansson <olof@lixom.net>
The USB OTG PHY chip. To be used by the OTG controller.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Olof Johansson <olof@lixom.net>
I've gotten the base addresses, clocks and interrupts from an rusty and old
out-of-tree driver. I haven't actually checked against the datasheet, since
that one is reserved for the Marvell inner circle.
Tested with an accelerometer on TWSI6 on an OLPC XO 1.75 machine.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Olof Johansson <olof@lixom.net>
Marvell keeps their MMP2 datasheet secret, but there are good clues
that TWSI2 is not on 0xd4025000 on that platform, not does it use
IRQ 58. In fact, the IRQ 58 on MMP2 seems to be a signal processor:
arch/arm/mach-mmp/irqs.h:#define IRQ_MMP2_MSP 58
I'm taking a somewhat educated guess that is probably a copy & paste
error from PXA168 or PXA910 and that the real controller in fact hides
at address 0xd4031000 and uses an interrupt line multiplexed via IRQ 17.
I'm also copying some properties from TWSI1 that were missing or
incorrect.
Tested on a OLPC XO 1.75 machine, where the RTC is on TWSI2.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Tested-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Olof Johansson <olof@lixom.net>
There's apparently four of them on a MMP2.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Olof Johansson <olof@lixom.net>
The timer needs the timer clock to be enabled, otherwise it stops
ticking.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Olof Johansson <olof@lixom.net>
This will be useful for boards that actually use GPIO pins.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Olof Johansson <olof@lixom.net>
gpio-pxa uses two cell to encode the interrupt source: the pin number
and the trigger type. Adjust the device node accordingly.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Olof Johansson <olof@lixom.net>
- Use SPDX license identifier for all SoCFPGA DTS files.
- Remove dma-mask property as it has been deprecated.
- Use tabs in DTS files.
- Use the specific "altr,stratix10-rst-mgr" property for the Stratix10
reset manager.
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Merge tag 'socfpga_dts_updates_for_v5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt
SoCFPGA DTS updates for v5.0
- Use SPDX license identifier for all SoCFPGA DTS files.
- Remove dma-mask property as it has been deprecated.
- Use tabs in DTS files.
- Use the specific "altr,stratix10-rst-mgr" property for the Stratix10
reset manager.
* tag 'socfpga_dts_updates_for_v5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
arm64: dts: stratix10: use "altr,stratix10-rst-mgr" binding
ARM: dts: socfpga: use tabs for indentation
arm: dts: socfpga: remove dma-mask property
arm: dts: socfpga*.dts*: use SPDX-License-Identifier
Signed-off-by: Olof Johansson <olof@lixom.net>
regulator name and referencing all cpus in the cooling maps instead
of only cpu0.
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Merge tag 'v4.21-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Powerdomain and QoS nodes for rk3066 and rk3188. A fix for a rock2
regulator name and referencing all cpus in the cooling maps instead
of only cpu0.
* tag 'v4.21-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Add all CPUs in cooling maps
ARM: dts: rockchip: Fix rk3288-rock2 vcc_flash name
ARM: dts: rockchip: add rk3066/rk3188 power-domains
ARM: dts: rockchip: add qos nodes found on rk3066 and rk3188
dt-bindings: add power-domain header for RK3066 SoCs
dt-bindings: add power-domain header for RK3188 SoCs
Signed-off-by: Olof Johansson <olof@lixom.net>
- Reomve non-existing EEPROM device from imx51-zii-rdu1 board.
It was added by mistake.
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Merge tag 'imx-fixes-4.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
i.MX fixes for 4.20, round 2:
- Reomve non-existing EEPROM device from imx51-zii-rdu1 board.
It was added by mistake.
* tag 'imx-fixes-4.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx51-zii-rdu1: Remove EEPROM node
Signed-off-by: Olof Johansson <olof@lixom.net>
This set of fixes contains minor regression fixes for LogicPD dts files
for MMC pinctrl and interrupts. There is also one section annotation fix
that shows up with Clang, and a fix for an unitialized field for omap1.
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Merge tag 'omap-for-v4.20/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Few minor fixes for omaps for v4.20-rc cycle
This set of fixes contains minor regression fixes for LogicPD dts files
for MMC pinctrl and interrupts. There is also one section annotation fix
that shows up with Clang, and a fix for an unitialized field for omap1.
* tag 'omap-for-v4.20/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP1: ams-delta: Fix possible use of uninitialized field
ARM: dts: am3517-som: Fix WL127x Wifi interrupt
ARM: dts: logicpd-somlv: Fix interrupt on mmc3_dat1
ARM: dts: LogicPD Torpedo: Fix mmc3_dat1 interrupt
ARM: dts: am3517: Fix pinmuxing for CD on MMC1
ARM: OMAP2+: prm44xx: Fix section annotation on omap44xx_prm_enable_io_wakeup
Signed-off-by: Olof Johansson <olof@lixom.net>
firmware on these devices as issues identifying the formally correct
node.
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Merge tag 'v4.20-rockchip-dts32fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into fixes
Moving the veyron memory node from memory@0 back to memory, as the
firmware on these devices as issues identifying the formally correct
node.
* tag 'v4.20-rockchip-dts32fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Remove @0 from the veyron memory node
Signed-off-by: Olof Johansson <olof@lixom.net>
Single patch to use updated coresight graph bindings thereby removing
loads of dtc warnings
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Merge tag 'vexpress-updates-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt
ARMv7 Vexpress updates for v4.20
Single patch to use updated coresight graph bindings thereby removing
loads of dtc warnings
* tag 'vexpress-updates-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
ARM: dts: vexpress/TC2: Update entries to match latest coresight bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
This describes hardware & will allow referencing pin functions. The
first usage is UART1 which allows supporting devices using it.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
It is wireless home router based on BCM4708A0 with BCM4360 + BCM4331
wireless chipsets. The BCM4331 5GHz chip currently isn't supported only
due to missing compatible firmware.
Signed-off-by: Rene Kjellerup <rk.katana.steel@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Hwmod parses the DT hierarchically from root to search for matching
ti,hwmod property. With the introduction of L4 data, we have two nodes
with the ti,hwmod = "gmac" declaration, and the hwmod core only matches
the first one found, which is the target-module one. This node incorrectly
dropped the ti,no-idle flag, which causes number of problems, like ignoring
errata i877, and also causing an intermittent boot failure on certain dra7
boards.
Fix the issue by moving the ti,no-idle flag to the proper node.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Reported-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Without this McASP FIFO would constantly underflow. EDMA
test via dmatest works though.
Let's revert the change for now until we know the root cause.
Reported-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The Video Image Compositor can be used to perform a variety of image
operations. Add a device tree node for it, so that it can be exposed
as a host1x channel to userspace.
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Versatile Express was submitted with the actual display
bridges unconnected (but defined in the device tree) and
mock "panels" encoded in the device tree node of the PL111
controller.
This doesn't even remotely describe the actual Versatile
Express hardware. Exploit the SiI9022 bridge by connecting
the PL111 pads to it, making it use EDID or fallback values
to drive the monitor.
The also has to use the reserved memory through the
CMA pool rather than by open coding a memory region and
remapping it explicitly in the driver. To achieve this,
a reserved-memory node must exist in the root of the
device tree, so we need to pull that out of the
motherboard .dtsi include files, and push it into each
top-level device tree instead.
We do the same manouver for all the Versatile Express
boards, taking into account the different location of the
video RAM depending on which chip select is used on
each platform.
This plays nicely with the new PL111 DRM driver and
follows the standard ways of assigning bridges and
memory pools for graphics.
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Mali DP Maintainers <malidp@foss.arm.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Tested-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Meson Timer IP block has two clock inputs:
- clk81 for using the system clock as timebase
- xtal for a timebase with 1us, 10us, 100us and 1ms resolution
The clocksource driver does not use these yet, but it's still a good
idea to add them as this describes how the hardware actually works
internally.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The timer on Meson6/Meson8/Meson8b SoCs has four internal timer events.
For each of these a separate interrupt exists.
Pass these interrupts to allow using the timers other than TIMER A.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
On Amlogic chipsets, the bias set through pinconf applies to the pad
itself, not only the GPIO function. This means that even when we change
the function of the pad from GPIO to anything else, the bias previously
set still applies.
As we have seen with the eMMC, depending on the bias type and the function,
it may trigger problems.
The underlying issue is that we inherit whatever was left by previous user
of the pad (pinconf, u-boot or the ROM code). As a consequence, the actual
setup we will get is undefined.
There is nothing mentioned in the documentation about pad bias and pinmux
function, however leaving it undefined is not an option.
This change consistently disable the pad bias for every pinmux functions.
It seems to work well, we can only assume that the necessary bias (if any)
is already provided by the pin function itself.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Martin Blumenstingl<martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
