Commit Graph

2513 Commits

Author SHA1 Message Date
Ezequiel Garcia
f617a87176 imx: soc: Select REGMAP_MMIO
The imx-gpcv2 driver needs Regmap MMIO. Select it, and fix:

drivers/soc/imx/gpcv2.c:420:34: error: array type has incomplete element type ‘struct regmap_range’
  420 | static const struct regmap_range imx7_yes_ranges[] = {
      |                                  ^~~~~~~~~~~~~~~
drivers/soc/imx/gpcv2.c:421:17: error: implicit declaration of function ‘regmap_reg_range’; did you mean ‘remap_pfn_range’? [-Werror=implicit-function-declaration]
  421 |                 regmap_reg_range(GPC_LPCR_A_CORE_BSC,
      |                 ^~~~~~~~~~~~~~~~
      |                 remap_pfn_range

Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-05 13:54:44 +08:00
Dmitry Osipenko
ceba814b37 soc/tegra: pmc: Expose USB regmap to all SoCs
All Tegra SoCs prior to Tegra186 have USB power controls within the Power
Management controller. These controls need to be configured by USB driver.
Expose the regmap to these SoCs.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-04 23:11:09 +02:00
Dmitry Osipenko
33110589a3 soc/tegra: pmc: Disable PMC state syncing
Disable PMC state syncing in order to ensure that we won't break older
kernels once device-trees will be updated with the addition of the power
domains. This also allows to apply device-tree PM patches independently
from the driver patches.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-04 22:10:54 +02:00
Marek Vasut
19791f518f soc: imx: gpcv2: Set both GPC_PGC_nCTRL(GPU_2D|GPU_3D) for MX8MM GPU domain
To bring up the MX8MM GPU domain, it is necessary to configure both
GPC_PGC_nCTRL(GPU_2D) and GPC_PGC_nCTRL(GPU_3D) registers. Without
this configuration, the system might hang on boot when bringing up
the GPU power domain. This is sporadically observed on multiple
disparate systems.

Add the GPU3D bit into MX8MM GPU domain pgc bitfield, so that both
GPC_PGC_nCTRL(GPU_2D) and GPC_PGC_nCTRL(GPU_3D) registers are
configured when bringing up the GPU domain. This fixes the sporadic
hang.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-04 15:53:57 +08:00
Marek Vasut
34a01d9ea7 soc: imx: gpcv2: Turn domain->pgc into bitfield
There is currently the MX8MM GPU domain, which is in fact a composite domain
for both GPU2D and GPU3D. To correctly configure this domain, it is necessary
to control both GPC_PGC_nCTRL(GPU_2D) and GPC_PGC_nCTRL(GPU_3D) at the same
time. This is currently not possible.

Turn the domain->pgc from value into bitfield and use for_each_set_bit() to
iterate over all bits set in domain->pgc when configuring GPC_PGC_nCTRL
register array. This way it is possible to configure all GPC_PGC_nCTRL
registers required in a particular domain.

This is a preparatory patch, no functional change.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-04 15:53:01 +08:00
Tony Lindgren
b232537074 soc: ti: omap-prm: Fix external abort for am335x pruss
Starting with v5.15-rc1, we may now see some am335x beaglebone black
device produce the following error on pruss probe:

Unhandled fault: external abort on non-linefetch (0x1008) at 0xe0326000

This has started with the enabling of pruss for am335x in the dts files.

Turns out the is caused by the PRM reset handling not waiting for the
reset bit to clear. To fix the issue, let's always wait for the reset
bit to clear, even if there is a separate reset status register.

We attempted to fix a similar issue for dra7 iva with a udelay() in
commit effe89e400 ("soc: ti: omap-prm: Fix occasional abort on reset
deassert for dra7 iva"). There is no longer a need for the udelay()
for dra7 iva reset either with the check added for reset bit clearing.

Cc: Drew Fustini <pdp7pdp7@gmail.com>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: "H. Nikolaus Schaller" <hns@goldelico.com>
Cc: Robert Nelson <robertcnelson@gmail.com>
Cc: Yongqin Liu <yongqin.liu@linaro.org>
Fixes: effe89e400 ("soc: ti: omap-prm: Fix occasional abort on reset deassert for dra7 iva")
Reported-by: Matti Vaittinen <mazziesaccount@gmail.com>
Tested-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-09-30 11:30:03 +03:00
Krzysztof Kozlowski
140bbfe7cd soc: samsung: exynos-chipid: do not enforce built-in
After converting the Exynos ChipID and ASV driver to a module, allow to
actually choose it to be a module, while being a default built-in.  The
side effect is that driver could be now entirely disabled even for
kernel with ARCH_EXYNOS, but this is not a critical issue because driver
is not necessary for the proper platform boot.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sylwester Nawrocki <snawrocki@kernel.org>
Tested-by: Sylwester Nawrocki <snawrocki@kernel.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Tested-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20210919093114.35987-4-krzysztof.kozlowski@canonical.com
2021-09-29 15:50:34 +02:00
Krzysztof Kozlowski
1e3e559f8d soc: samsung: exynos-chipid: convert to a module
Exynos ChipID and ASV (Adaptive Supply Voltage) driver is not essential
to system boot and it can successfully be built and loaded as module.

This makes core kernel image smaller and reduces the memory footprint
when multi-platform kernel is booted on non-Exynos board.  Usually it is
also distro-friendly.

Add multiple authors of the driver since its conversion from
mach-exynos, ordered alphabetically by first name.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sylwester Nawrocki <snawrocki@kernel.org>
Tested-by: Sylwester Nawrocki <snawrocki@kernel.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Tested-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20210919093114.35987-3-krzysztof.kozlowski@canonical.com
2021-09-29 15:50:34 +02:00
Krzysztof Kozlowski
d1141886c8 soc: samsung: exynos-chipid: avoid soc_device_to_device()
soc_device_to_device() seems to be discouraged [1] so remove it in favor
of printing info message with platform device.  This will only change
the prefix in the info message from "soc soc0: " to "exynos-chipid
10000000.chipid:".

[1] https://lore.kernel.org/lkml/20191111052741.GB3176397@kroah.com/

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sylwester Nawrocki <snawrocki@kernel.org>
Tested-by: Sylwester Nawrocki <snawrocki@kernel.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Tested-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20210919093114.35987-2-krzysztof.kozlowski@canonical.com
2021-09-29 15:50:29 +02:00
Bjorn Andersson
f27591125a Merge tag '20210927135559.738-6-srinivas.kandagatla@linaro.org' into drivers-for-5.16
v5.15-rc1 + 20210927135559.738-[23456]-srinivas.kandagatla@linaro.org

This immutable branch is based on v5.15-rc1 and contains the following
patches extending the existig APR driver to also implement GPR:
20210927135559.738-2-srinivas.kandagatla@linaro.org
20210927135559.738-3-srinivas.kandagatla@linaro.org
20210927135559.738-4-srinivas.kandagatla@linaro.org
20210927135559.738-5-srinivas.kandagatla@linaro.org
20210927135559.738-6-srinivas.kandagatla@linaro.org
2021-09-27 22:13:45 -05:00
Srinivas Kandagatla
ec1471a898 soc: qcom: apr: Add GPR support
Qualcomm Generic Packet router aka GPR is the IPC mechanism found
in AudioReach next generation signal processing framework to perform
command and response messages between various processors.

GPR has concepts of static and dynamic port, all static services like
APM (Audio Processing Manager), PRM (Proxy resource manager) have
fixed port numbers where as dynamic services like graphs have dynamic
port numbers which are allocated at runtime. All GPR packet messages
will have source and destination domain and port along with opcode
and payload.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210927135559.738-6-srinivas.kandagatla@linaro.org
2021-09-27 22:10:07 -05:00
Srinivas Kandagatla
99139b80c1 soc: qcom: apr: make code more reuseable
APR and other packet routers like GPR are pretty much same and
interact with other drivers in similar way.

Ex: GPR ports can be considered as APR services, only difference
is they are allocated dynamically.

Other difference is packet layout, which should not matter
with the apis abstracted. Apart from this the rest of the
functionality is pretty much identical across APR and GPR.

Make the apr code more reusable by abstracting it service level,
rather than device level so that we do not need to write
new drivers for other new packet routers like GPR.

This patch is in preparation to add GPR support to this driver.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210927135559.738-4-srinivas.kandagatla@linaro.org
2021-09-27 22:10:07 -05:00
Sibi Sankar
99512191f4 soc: qcom: aoss: Drop power domain support
Strip out the load state power-domain support from the driver since the
low power mode signalling for the co-processors is now accessible through
the direct qmp message send interface.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1631800770-371-12-git-send-email-sibis@codeaurora.org
2021-09-27 14:59:55 -05:00
Deepak Kumar Singh
1a561c521b soc: qcom: smp2p: Add wakeup capability to SMP2P IRQ
Remote susbsystems notify fatal crash through smp2p interrupt.
When remoteproc crashes it can cause soc to come out of low power
state and may not allow again to enter in low power state until
crash is handled.

Mark smp2p interrupt wakeup capable so that interrupt handler is
executed and remoteproc crash can be handled in system  resume path.
This patch marks interrupt wakeup capable but keeps wakeup disabled
by default. User space can enable it based on its requirement for
wakeup from suspend.

Signed-off-by: Deepak Kumar Singh <deesin@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1632220467-27410-1-git-send-email-deesin@codeaurora.org
2021-09-23 15:27:57 -05:00
Bjorn Andersson
665783d887 Merge tag '1630420228-31075-2-git-send-email-deesin@codeaurora.org' into drivers-for-5.16 2021-09-21 17:49:38 -05:00
Naina Mehta
3a461009e1 soc: qcom: llcc: Disable MMUHWT retention
Disable MMUHWT retention for SC7280 as done for other platforms
to avoid more power burn.

Fixes: f6a07be633 ("soc: qcom: llcc: Add configuration data for SC7280")
Signed-off-by: Naina Mehta <nainmeht@codeaurora.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210921055942.30600-1-saiprakash.ranjan@codeaurora.org
2021-09-21 17:41:49 -05:00
Shawn Guo
3e035cbd44 soc: qcom: smd-rpm: Add QCM2290 compatible
Add compatible for QCM2290 SoC support.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210914015349.29295-3-shawn.guo@linaro.org
2021-09-21 17:41:49 -05:00
Len Baker
26bc7a6a0b soc: qcom: pdr: Prefer strscpy over strcpy
strcpy() performs no bounds checking on the destination buffer. This
could result in linear overflows beyond the end of the buffer, leading
to all kinds of misbehaviors. The safe replacement is strscpy().

This is a previous step in the path to remove the strcpy() function
entirely from the kernel.

Signed-off-by: Len Baker <len.baker@gmx.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210808125012.4715-2-len.baker@gmx.com
2021-09-21 17:41:49 -05:00
Cai Huoqing
f69a91e376 soc: qcom: rpmh-rsc: Make use of the helper function devm_platform_ioremap_resource_byname()
Use the devm_platform_ioremap_resource_byname() helper instead of
calling platform_get_resource_byname() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210908080216.1301-6-caihuoqing@baidu.com
2021-09-21 17:41:49 -05:00
Cai Huoqing
eb242d57aa soc: qcom: gsbi: Make use of the helper function devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of
calling platform_get_resource() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210908080216.1301-5-caihuoqing@baidu.com
2021-09-21 17:41:48 -05:00
Cai Huoqing
c318dcbccc soc: qcom: aoss: Make use of the helper function devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of
calling platform_get_resource() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210908080216.1301-4-caihuoqing@baidu.com
2021-09-21 17:41:48 -05:00
Cai Huoqing
d21dc0be36 soc: qcom: geni: Make use of the helper function devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of
calling platform_get_resource() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210908080216.1301-3-caihuoqing@baidu.com
2021-09-21 17:41:48 -05:00
Cai Huoqing
172037b12b soc: qcom: ocmem: Make use of the helper function devm_platform_ioremap_resource_byname()
Use the devm_platform_ioremap_resource_byname() helper instead of
calling platform_get_resource_byname() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210908080216.1301-2-caihuoqing@baidu.com
2021-09-21 17:41:48 -05:00
Cai Huoqing
0e6fda9c65 PM: AVS: qcom-cpr: Make use of the helper function devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of
calling platform_get_resource() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210908080216.1301-1-caihuoqing@baidu.com
2021-09-21 17:41:48 -05:00
Robert Marko
aa88e34f2b soc: qcom: socinfo: Add IPQ8074 family ID-s
IPQ8074 family SoC ID-s are missing, so lets add them based on
the downstream driver.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Kathiravan T <kathirav@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210905171131.660885-1-robimarko@gmail.com
2021-09-21 17:41:48 -05:00
Vladimir Lypak
e7ec00eafe soc: qcom: rpmpd: Add power domains for MSM8953
Add support for MSM8953 power domains.

Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
Signed-off-by: Adam Skladowski <a_skl39@protonmail.com>
Signed-off-by: Sireesh Kodali <sireeshkodali1@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210825170252.20137-1-sireeshkodali1@gmail.com
2021-09-21 17:41:48 -05:00
Vladimir Lypak
e972a290b0 soc: qcom: smd-rpm: Add compatible for MSM8953 SoC
Add a compatible for MSM8953

Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
Signed-off-by: Adam Skladowski <a_skl39@protonmail.com>
Signed-off-by: Sireesh Kodali <sireeshkodali1@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210825170151.19698-1-sireeshkodali1@gmail.com
2021-09-21 17:41:48 -05:00
AngeloGioacchino Del Regno
e48e6fb9eb soc: qcom: spm: Add compatible for MSM8998 SAWv4.1 L2
Add the SAWv4.1 parameters for MSM8998's Gold and Silver clusters.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210729155609.608159-5-angelogioacchino.delregno@somainline.org
2021-09-21 17:41:48 -05:00
AngeloGioacchino Del Regno
13e72c3e22 soc: qcom: spm: Implement support for SAWv4.1, SDM630/660 L2 AVS
Implement the support for SAW v4.1, used in at least MSM8998,
SDM630, SDM660 and APQ variants and, while at it, also add the
configuration for the SDM630/660 Silver and Gold cluster L2
Adaptive Voltage Scaler: this is also one of the prerequisites
to allow the OSM controller to perform DCVS.

Please note that despite there are various "versions" of these
values downstream, these are the only ones that are perfectly
stable on the entire set of tested devices.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210729155609.608159-4-angelogioacchino.delregno@somainline.org
2021-09-21 17:41:48 -05:00
AngeloGioacchino Del Regno
60f3692b5f cpuidle: qcom_spm: Detach state machine from main SPM handling
In commit a871be6b8e ("cpuidle: Convert Qualcomm SPM driver to a generic
CPUidle driver") the SPM driver has been converted to a
generic CPUidle driver: that was mainly made to simplify the
driver and that was a great accomplishment;
Though, at that time, this driver was only applicable to ARM 32-bit SoCs,
lacking logic about the handling of newer generation SAW.

In preparation for the enablement of SPM features on AArch64/ARM64,
split the cpuidle-qcom-spm driver in two: the CPUIdle related
state machine (currently used only on ARM SoCs) stays there, while
the SPM communication handling lands back in soc/qcom/spm.c and
also making sure to not discard the simplifications that were
introduced in the aforementioned commit.

Since now the "two drivers" are split, the SCM dependency in the
main SPM handling is gone and for this reason it was also possible
to move the SPM initialization early: this will also make sure that
whenever the SAW CPUIdle driver is getting initialized, the SPM
driver will be ready to do the job.

Please note that the anticipation of the SPM initialization was
also done to optimize the boot times on platforms that have their
CPU/L2 idle states managed by other means (such as PSCI), while
needing SAW initialization for other purposes, like AVS control.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Tested-by: Stephan Gerhold <stephan@gerhold.net>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210729155609.608159-2-angelogioacchino.delregno@somainline.org
2021-09-21 17:41:48 -05:00
Konrad Dybcio
1f7b2b6327 soc: qcom: llcc: Add configuration data for SM6350
Add LLCC configuration data for SM6350 SoC.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210820203105.229764-6-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-09-21 17:41:47 -05:00
Konrad Dybcio
c2b854b03a soc: qcom: rpmhpd: Add SM6350
Add the power domains exposed by RPMH in the Qualcomm SM6350 platform.

Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210820203105.229764-4-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-09-21 17:41:47 -05:00
Deepak Kumar Singh
8c75d585b9 soc: qcom: aoss: Expose send for generic usecase
Not all upcoming usecases will have an interface to allow the aoss
driver to hook onto. Expose the send api and create a get function to
enable drivers to send their own messages to aoss.

Signed-off-by: Chris Lew <clew@codeaurora.org>
Signed-off-by: Deepak Kumar Singh <deesin@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1630420228-31075-2-git-send-email-deesin@codeaurora.org
2021-09-21 17:31:18 -05:00
Shawn Guo
833d51d7c6 soc: qcom: mdt_loader: Drop PT_LOAD check on hash segment
PT_LOAD type denotes that the segment should be loaded into the final
firmware memory region.  Hash segment is not one such, because it's only
needed for PAS init and shouldn't be in the final firmware memory region.
That's why mdt_phdr_valid() explicitly reject non PT_LOAD segment and
hash segment.  This actually makes the hash segment type check in
qcom_mdt_read_metadata() unnecessary and redundant.  For a hash segment,
it won't be loaded into firmware memory region anyway, due to the
QCOM_MDT_TYPE_HASH check in mdt_phdr_valid(), even if it has a PT_LOAD
type for some reason (misusing or abusing?).

Some firmware files on Sony phones are such examples, e.g WCNSS firmware
of Sony Xperia M4 Aqua phone.  The type of hash segment is just PT_LOAD.
Drop the unnecessary hash segment type check in qcom_mdt_read_metadata()
to fix firmware loading failure on these phones, while hash segment is
still kept away from the final firmware memory region.

Fixes: 498b98e939 ("soc: qcom: mdt_loader: Support loading non-split images")
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210828070202.7033-1-shawn.guo@linaro.org
2021-09-19 19:55:20 -05:00
Florian Fainelli
6e42e16a42 soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72116
72116 uses a quad core Brahma-B53 CPU complex which uses the same tuning
as done for previous chips, add that chip to the list.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-09-16 15:31:14 -07:00
Florian Fainelli
e8377f497d soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72113
72113 uses a dual core Cortex-A72 CPU complex which requires tuning of
its bus interface unit the same way that the existing Cortex-A72 based
systems are tuned.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-09-16 15:31:06 -07:00
David Virag
e37ef6dcdb soc: samsung: exynos-pmu: Fix compilation when nothing selects CONFIG_MFD_CORE
Commit 93618e344a ("soc: samsung: exynos-pmu: instantiate clkout
driver as MFD") adds a "devm_mfd_add_devices" call in the exynos-pmu
driver which depends on CONFIG_MFD_CORE. If no driver selects that
config, the build will fail if CONFIG_EXYNOS_PMU is enabled with the
following error:

  drivers/soc/samsung/exynos-pmu.c:137: undefined reference to `devm_mfd_add_devices'

Fix this by making CONFIG_EXYNOS_PMU select CONFIG_MFD_CORE.

Fixes: 93618e344a ("soc: samsung: exynos-pmu: instantiate clkout driver as MFD")
Cc: <stable@vger.kernel.org>
Signed-off-by: David Virag <virag.david003@gmail.com>
Link: https://lore.kernel.org/r/20210909222812.108614-1-virag.david003@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-15 09:48:46 +02:00
Cai Huoqing
9787ab5833 soc: bcm63xx-power: Make use of the helper function devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of
calling platform_get_resource() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-09-14 14:37:42 -07:00
Cai Huoqing
dc3401c83f soc: bcm: bcm-pmb: Make use of the helper function devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of
calling platform_get_resource() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-09-14 14:37:41 -07:00
Antonio Martorana
9c5a4ec69b soc: qcom: socinfo: Fixed argument passed to platform_set_data()
Set qcom_socinfo pointer as data being stored instead of pointer
to soc_device structure. Aligns with future calls to platform_get_data()
which expects qcom_socinfo pointer.

Fixes: efb448d0a3 ("soc: qcom: Add socinfo driver")
Signed-off-by: Antonio Martorana <amartora@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1629159879-95777-1-git-send-email-amartora@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-09-13 10:39:59 -05:00
Geert Uytterhoeven
2ed1e48159 soc: renesas: Identify more R-Car Gen3e SoCs
Add support for identifying the remaining R-Car Gen3e SoCs: R-Car H3e
(R8A779M0), M3e (R8A779M2), M3Ne (R8A779M4), M3Ne-2G (R8A779M5), E3e
(R8A779M6), D3e (R8A779M7), and H3Ne (R8A779M8).

As these are different gradings of the already supported R-Car Gen3
SoCs, support for them is enabled through the existing ARCH_R8A779*
configuration symbols.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/ccf2206b24147b3d977e4119bbdefaedceb28644.1628766192.git.geert+renesas@glider.be
2021-09-13 10:56:29 +02:00
Yongqiang Niu
d687e056a1 soc: mediatek: mmsys: Add mt8192 mmsys routing table
mt8192 has different routing registers than mt8183

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Link: https://lore.kernel.org/r/1627894773-23872-3-git-send-email-yongqiang.niu@mediatek.com
[mb: take mask into account]
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-09-13 10:52:13 +02:00
Cai Huoqing
d54dbe9f0e soc: amlogic: meson-clk-measure: Make use of the helper function devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of
calling platform_get_resource() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20210908071544.603-2-caihuoqing@baidu.com
2021-09-13 09:43:00 +02:00
Cai Huoqing
97a4a24087 soc: amlogic: canvas: Make use of the helper function devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of
calling platform_get_resource() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20210908071544.603-1-caihuoqing@baidu.com
2021-09-13 09:43:00 +02:00
Christian Hewitt
ca8d1fda5b soc: amlogic: meson-gx-socinfo: Add S905Y2 ID for Radxa Zero
Add the SOC ID for the S905Y2 used in the Radxa Zero. Before/After:

[    0.321650] soc soc0: Amlogic Meson G12A (Unknown) Revision 28:b (30:2) Detected
[    0.318533] soc soc0: Amlogic Meson G12A (S905Y2) Revision 28:b (30:2) Detected

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20210820012718.10761-1-christianshewitt@gmail.com
2021-09-13 09:38:20 +02:00
Cai Huoqing
1f3753a5f0 soc: sunxi_sram: Make use of the helper function devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of
calling platform_get_resource() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210908071716.772-1-caihuoqing@baidu.com
2021-09-13 09:04:05 +02:00
Linus Torvalds
866147b8fa Merge tag 'drivers-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
 "These are updates for drivers that are tied to a particular SoC,
  including the correspondig device tree bindings:

   - A couple of reset controller changes for unisoc, uniphier, renesas
     and zte platforms

   - memory controller driver fixes for omap and tegra

   - Rockchip io domain driver updates

   - Lots of updates for qualcomm platforms, mostly touching their
     firmware and power management drivers

   - Tegra FUSE and firmware driver updateѕ

   - Support for virtio transports in the SCMI firmware framework

   - cleanup of ixp4xx drivers, towards enabling multiplatform support
     and bringing it up to date with modern platforms

   - Minor updates for keystone, mediatek, omap, renesas"

* tag 'drivers-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (96 commits)
  reset: simple: remove ZTE details in Kconfig help
  soc: rockchip: io-domain: Remove unneeded semicolon
  soc: rockchip: io-domain: add rk3568 support
  dt-bindings: power: add rk3568-pmu-io-domain support
  bus: ixp4xx: return on error in ixp4xx_exp_probe()
  soc: renesas: Prefer memcpy() over strcpy()
  firmware: tegra: Stop using seq_get_buf()
  soc/tegra: fuse: Enable fuse clock on suspend for Tegra124
  soc/tegra: fuse: Add runtime PM support
  soc/tegra: fuse: Clear fuse->clk on driver probe failure
  soc/tegra: pmc: Prevent racing with cpuilde driver
  soc/tegra: bpmp: Remove unused including <linux/version.h>
  dt-bindings: soc: ti: pruss: Add dma-coherent property
  soc: ti: Remove pm_runtime_irq_safe() usage for smartreflex
  soc: ti: pruss: Enable support for ICSSG subsystems on K3 AM64x SoCs
  dt-bindings: soc: ti: pruss: Update bindings for K3 AM64x SoCs
  firmware: arm_scmi: Use WARN_ON() to check configured transports
  firmware: arm_scmi: Fix boolconv.cocci warnings
  soc: mediatek: mmsys: Fix missing UFOE component in mt8173 table routing
  soc: mediatek: mmsys: add MT8365 support
  ...
2021-09-01 15:25:28 -07:00
Linus Torvalds
634135a07b Merge tag 'soc-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC updates from Arnd Bergmann:
 "There are three noteworthy updates for 32-bit arm platforms this time:

   - The Microchip SAMA7 family based on Cortex-A7 gets introduced, a
     new cousin to the older SAM9 (ARM9xx based) and SAMA5 (Cortex-A5
     based) SoCs.

   - The ixp4xx platform (based on Intel XScale) is finally converted to
     device tree, and all the old board files are getting removed now.

   - The Cirrus Logic EP93xx platform loses support for the old
     MaverickCrunch FPU. Support for compiling user space applications
     was already removed in gcc-4.9, and the kernel support for old
     applications could not be built with clang ias. After confirming
     that there are no remaining users, removing this from the kernel
     seemed better than adding support for unused features to clang.

  There are minor updates to the aspeed, omap and samsung platforms"

* tag 'soc-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (48 commits)
  soc: aspeed-lpc-ctrl: Fix clock cleanup in error path
  ARM: s3c: delete unneed local variable "delay"
  soc: aspeed: Re-enable FWH2AHB on AST2600
  soc: aspeed: socinfo: Add AST2625 variant
  soc: aspeed: p2a-ctrl: Fix boundary check for mmap
  soc: aspeed: lpc-ctrl: Fix boundary check for mmap
  ARM: ixp4xx: Delete the Freecom FSG-3 boardfiles
  ARM: ixp4xx: Delete GTWX5715 board files
  ARM: ixp4xx: Delete Coyote and IXDPG425 boardfiles
  ARM: ixp4xx: Delete Intel reference design boardfiles
  ARM: ixp4xx: Delete Avila boardfiles
  ARM: ixp4xx: Delete the Arcom Vulcan boardfiles
  ARM: ixp4xx: Delete Gateway WG302v2 boardfiles
  ARM: ixp4xx: Delete Omicron boardfiles
  ARM: ixp4xx: Delete the D-Link DSM-G600 boardfiles
  ARM: ixp4xx: Delete NAS100D boardfiles
  ARM: ixp4xx: Delete NSLU2 boardfiles
  arm: omap2: Drop the unused OMAP_PACKAGE_* KConfig entries
  arm: omap2: Drop obsolete MACH_OMAP3_PANDORA entry
  ARM: ep93xx: remove MaverickCrunch support
  ...
2021-09-01 15:19:43 -07:00
Linus Torvalds
c6c3c5704b Merge tag 'driver-core-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core
Pull driver core updates from Greg KH:
 "Here is the big set of driver core patches for 5.15-rc1.

  These do change a number of different things across different
  subsystems, and because of that, there were 2 stable tags created that
  might have already come into your tree from different pulls that did
  the following

   - changed the bus remove callback to return void

   - sysfs iomem_get_mapping rework

  Other than those two things, there's only a few small things in here:

   - kernfs performance improvements for huge numbers of sysfs users at
     once

   - tiny api cleanups

   - other minor changes

  All of these have been in linux-next for a while with no reported
  problems, other than the before-mentioned merge issue"

* tag 'driver-core-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (33 commits)
  MAINTAINERS: Add dri-devel for component.[hc]
  driver core: platform: Remove platform_device_add_properties()
  ARM: tegra: paz00: Handle device properties with software node API
  bitmap: extend comment to bitmap_print_bitmask/list_to_buf
  drivers/base/node.c: use bin_attribute to break the size limitation of cpumap ABI
  topology: use bin_attribute to break the size limitation of cpumap ABI
  lib: test_bitmap: add bitmap_print_bitmask/list_to_buf test cases
  cpumask: introduce cpumap_print_list/bitmask_to_buf to support large bitmask and list
  sysfs: Rename struct bin_attribute member to f_mapping
  sysfs: Invoke iomem_get_mapping() from the sysfs open callback
  debugfs: Return error during {full/open}_proxy_open() on rmmod
  zorro: Drop useless (and hardly used) .driver member in struct zorro_dev
  zorro: Simplify remove callback
  sh: superhyway: Simplify check in remove callback
  nubus: Simplify check in remove callback
  nubus: Make struct nubus_driver::remove return void
  kernfs: dont call d_splice_alias() under kernfs node lock
  kernfs: use i_lock to protect concurrent inode updates
  kernfs: switch kernfs to use an rwsem
  kernfs: use VFS negative dentry caching
  ...
2021-09-01 08:44:42 -07:00
Yang Yingliang
51e321fed0 soc: aspeed-lpc-ctrl: Fix clock cleanup in error path
Move syscon_regmap_lookup_by_compatible() above the
devm_clk_get() to avoid missing clk_disable_unprepare().

Fixes: 2f9b25fa66 ("soc: aspeed: Re-enable FWH2AHB on AST2600")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210824085522.1849410-1-yangyingliang@huawei.com
Link: https://lore.kernel.org/r/20210825001214.3056193-1-joel@jms.id.au'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-26 11:31:22 +02:00