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1527 Commits

Author SHA1 Message Date
Swapnil Jakhade
4acea473f3 phy: cadence-torrent: Add PCIe + USB multilink configuration 
Add PCIe + USB Unique SSC multilink configuration sequences.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/1600327846-9733-13-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-18 10:47:22 +05:30
Swapnil Jakhade
9855d84b6b phy: cadence-torrent: Add single link USB register sequences 
Add support for single link USB configuration.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/1600327846-9733-12-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-18 10:47:21 +05:30
Swapnil Jakhade
9f33b76a35 phy: cadence-torrent: Add single link SGMII/QSGMII register sequences 
Add support for single link SGMII/QSGMII configuration.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/1600327846-9733-11-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-18 10:47:21 +05:30
Swapnil Jakhade
d66a636669 phy: cadence-torrent: Configure PHY_PLL_CFG as part of link_cmn_vals 
Include PHY_PLL_CFG as a first register value to configure in
link_cmn_vals array values.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/1600327846-9733-10-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-18 10:47:21 +05:30
Swapnil Jakhade
cd9aa94737 phy: cadence-torrent: Add PHY link configuration sequences for single link 
Add support to configure link_cmn_vals and xcvr_diag_vals in case of single
link PHY configuration.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/1600327846-9733-9-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-18 10:47:20 +05:30
Swapnil Jakhade
07084c9566 phy: cadence-torrent: Add clk changes for multilink configuration 
Prepare and enable clock in probe instead of phy_init.
Also, remove phy_exit callback.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/1600327846-9733-8-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-18 10:47:20 +05:30
Swapnil Jakhade
f0f1fa0458 phy: cadence-torrent: Update PHY reset for multilink configuration 
For multilink configuration, deassert PHY and link reset after PHY
registers are configured in probe and only check link status in
power_on callback.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/1600327846-9733-7-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-18 10:47:20 +05:30
Swapnil Jakhade
6bcf3cb300 phy: cadence-torrent: Add support for PHY multilink configuration 
Added support for multilink configuration of Torrent PHY. Currently,
maximum two links are supported. In case of multilink configuration,
PHY needs to be configured for both the protocols simultaneously at
the beginning as per the requirement of Torrent PHY.
Also, register sequences for PCIe + SGMII/QSGMII Unique SSC PHY multilink
configurations are added.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/1600327846-9733-6-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-18 10:47:19 +05:30
Swapnil Jakhade
15c6a048e5 phy: cadence-torrent: Add PHY APB reset support 
Add support for PHY APB reset and make it optional.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/1600327846-9733-4-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-18 10:47:19 +05:30
Swapnil Jakhade
8e4c95b9c9 phy: cadence-torrent: Check cmn_ready assertion during PHY power on 
Check if cmn_ready is set after both PLL0 and PLL1 are locked.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/1600327846-9733-3-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-18 10:47:18 +05:30
Swapnil Jakhade
b54b47bd03 phy: cadence-torrent: Add single link PCIe support 
Add single link PCIe register sequences in Torrent PHY driver.
Also, add support for getting SSC type from DT.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/1600327846-9733-2-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-18 10:47:18 +05:30
Swapnil Jakhade
d09945eaca phy: cadence-torrent: Check total lane count for all subnodes is within limit 
Add checking if total number of lanes for all subnodes is not greater than
number of lanes supported by PHY.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/1600280911-9214-6-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-18 10:34:47 +05:30
Swapnil Jakhade
2e70c84995 phy: cadence-torrent: Add separate regmap functions for torrent and DP 
Added separate functions for regmap initialization of torrent PHY
generic registers and DP specific registers.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/1600280911-9214-5-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-18 10:34:47 +05:30
Swapnil Jakhade
7c12b46c63 phy: cadence-torrent: Enable support for multiple subnodes 
Enable support for multiple subnodes in torrent PHY to
include multi-link combinations.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/1600280911-9214-4-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-18 10:34:47 +05:30
Swapnil Jakhade
46d205af30 phy: cadence-torrent: Use devm_platform_ioremap_resource() to get reg addresses 
Use devm_platform_ioremap_resource() to get register addresses instead of
boilerplate code.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/1600280911-9214-3-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-18 10:34:46 +05:30
Swapnil Jakhade
29d1fd2f2c phy: cadence-torrent: Use of_device_get_match_data() to get driver data 
Use of_device_get_match_data() to get driver data instead of boilerplate
code.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/1600280911-9214-2-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-18 10:34:46 +05:30
Wan Ahmad Zainie
885c4f4d6c phy: intel: Add Keem Bay eMMC PHY support 
Add support for eMMC PHY on Intel Keem Bay SoC.

Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200913235522.4316-4-wan.ahmad.zainie.wan.mohamad@intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-16 17:45:19 +05:30
Wan Ahmad Zainie
fa687038ba phy: intel: Rename phy-intel to phy-intel-lgm 
Rename phy-intel-{combo,emmc}.c to phy-intel-lgm-{combo,emmc}.c
to make drivers/phy/intel directory more generic for future use.

Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
Reviewed-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
Link: https://lore.kernel.org/r/20200913235522.4316-2-wan.ahmad.zainie.wan.mohamad@intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-16 17:45:19 +05:30
Rikard Falkeborn
57d39c7697 phy: cadence: torrent: Constify regmap_config structs 
The regmap_config structs are never modified and can be made const to
allow the compiler to put them in read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200912204639.501669-4-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-16 17:43:31 +05:30
Rikard Falkeborn
2f4a3d8b7c phy: cadence: salvo: Constify cdns_nxp_sequence_pair 
cdns_nxp_sequence_pair[] are never modified and can be made const to allow
the compiler to put them in read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Link: https://lore.kernel.org/r/20200912204639.501669-3-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-16 17:43:31 +05:30
Rikard Falkeborn
3cfb0e8e41 phy: cadence: Sierra: Constify static structs 
The static cdns_reg_pairs and regmap_config structs are not modified and
can be made const. This allows the compiler to put them in read-only
memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200912204639.501669-2-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-16 17:43:31 +05:30
Vinod Koul
5408b22043 Merge branch 'topic/phy_attrs' into next 2020-09-16 17:38:33 +05:30
Swapnil Jakhade
0ffcc3787e phy: cadence-torrent: Set Torrent PHY attributes 
Set Torrent PHY attributes bus_width, max_link_rate and mode
for DisplayPort.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/1599805114-22063-3-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-16 17:38:02 +05:30
chunhui dai
09e872d558 drm/mediatek: Disable tmds on mt2701 
Without that patch if you use specific resolutions like 1280x1024,
I can see distortion in the output. It seems as if the
frequency for updating the pixel of the image is out of sync.

For initialization tmds needs to be active, but can be disabled after init
to fix blurry display

Signed-off-by: chunhui dai <chunhui.dai@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
 2020-09-14 23:05:23 +08:00
Ramuthevar Vadivel Murugan
1cce8f73a5 phy: Add USB3 PHY support for Intel LGM SoC 
Add support for USB PHY on Intel LGM SoC.

Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/20200828022312.52724-3-vadivel.muruganx.ramuthevar@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-11 17:12:49 +05:30
Dan Carpenter
850280156f phy: ti: am654: Fix a leak in serdes_am654_probe() 
If devm_phy_create() fails then we need to call of_clk_del_provider(node)
to undo the call to of_clk_add_provider().

Fixes: 71e2f5c5c2 ("phy: ti: Add a new SERDES driver for TI's AM654x SoC")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Link: https://lore.kernel.org/r/20200905124648.GA183976@mwanda
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-08 16:23:09 +05:30
Grygorii Strashko
7f78322cdd phy: ti: gmii-sel: retrieve ports number and base offset from dt 
On K3 AM654x/J721E platforms the Port MII mode selection register(s) have
similar format and placed in the System Control Module (SCM) module
sequentially as one register per port, but, depending SOC and CPSW
instance, the base offset and number of ports can be different.

Hence, add possibility to retrieve number of ports and base registers
offset from DT and support for max possible number of ports supported by K3
SoCs like J721E.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Link: https://lore.kernel.org/r/20200828201943.29155-4-grygorii.strashko@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-08 15:53:10 +05:30
Grygorii Strashko
d3fa20b97c phy: ti: gmii-sel: use features mask during init 
Use features mask during PHYs initialization to simplify code.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Link: https://lore.kernel.org/r/20200828201943.29155-3-grygorii.strashko@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-08 15:53:10 +05:30
Grygorii Strashko
15819a6c9a phy: ti: gmii-sel: move phy init in separate function 
Move phy initialization in separate function to improve code readability
and simplify future changes.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Link: https://lore.kernel.org/r/20200828201943.29155-2-grygorii.strashko@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-08 15:53:10 +05:30
Chunfeng Yun
dce9d8129e phy: phy-pxa-28nm-usb2: convert to readl_poll_timeout() 
Use readl_poll_timeout() to simplify code

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1598320987-25518-6-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-08 09:56:11 +05:30
Chunfeng Yun
f63602b1c6 phy: phy-pxa-28nm-hsic: convert to readl_poll_timeout() 
Use readl_poll_timeout() to simplify code

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1598320987-25518-5-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-08 09:56:11 +05:30
Chunfeng Yun
38af68cb04 phy: phy-qcom-apq8064-sata: convert to readl_relaxed_poll_timeout() 
Use readl_relaxed_poll_timeout() to simplify code, rename local function
read_poll_timeout() as poll_timeout() to avoid repeated definition

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1598320987-25518-4-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-08 09:56:11 +05:30
Chunfeng Yun
6f2a721850 phy: phy-bcm-sr-usb: convert to readl_poll_timeout_atomic() 
Use readl_poll_timeout_atomic() to simplify code

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1598320987-25518-3-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-08 09:56:11 +05:30
Chunfeng Yun
01a4563300 phy: phy-bcm-ns2-usbdrd: convert to readl_poll_timeout_atomic() 
Use readl_poll_timeout_atomic() to simplify code

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1598320987-25518-2-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-08 09:56:10 +05:30
Chunfeng Yun
47da6aa776 phy: phy-bcm-ns-usb3: convert to readl_poll_timeout_atomic() 
Use readl_poll_timeout_atomic() to simplify code

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1598320987-25518-1-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-09-08 09:56:10 +05:30
CK Hu
b28be59a2e phy: mediatek: Move mtk_hdmi_phy driver into drivers/phy/mediatek folder 
mtk_hdmi_phy is currently placed inside mediatek drm driver, but it's
more suitable to place a phy driver into phy driver folder, so move
mtk_hdmi_phy driver into phy driver folder.

Signed-off-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Acked-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
 2020-09-06 07:03:21 +08:00
Greg Kroah-Hartman
e22a220515 Merge tag 'phy-fixes-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-misc-linus 
Vinod writes:

phy: fixes for 5.9

*) platform_no_drv_owner.cocci and return value check qcom ipq806x-usb driver
*) correcting register programming for ipq8074 phy
*) disable PHY charger detect for omap-usb2-phy

* tag 'phy-fixes-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy:
  phy: omap-usb2-phy: disable PHY charger detect
  phy: qcom-qmp: Use correct values for ipq8074 PCIe Gen2 PHY init
  phy: qualcomm: fix return value check in qcom_ipq806x_usb_phy_probe()
  phy: qualcomm: fix platform_no_drv_owner.cocci warnings
 2020-09-04 12:41:55 +02:00
Ezequiel Garcia
37abc181bb phy: Move phy-rockchip-dphy-rx0 out of staging 
There is no need for this driver to be in staging.
Let's promote it!

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Link: https://lore.kernel.org/r/20200825220710.634106-1-ezequiel@collabora.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 18:28:21 +05:30
Kunihiko Hayashi
a1bf1c60b5 phy: socionext: Add UniPhier AHCI PHY driver support 
Add a driver for PHY interface built into ahci controller implemented
in UniPhier SoCs. This supports PXs2 and PXs3 SoCs.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/1598352071-26675-3-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 17:07:53 +05:30
Rikard Falkeborn
23bea1be4e phy: qcom-ipq4019-usb: Constify static phy_ops structs 
Their only usages is to assign the address to the data field in the
of_device_id struct, which is a const void pointer. Make them const to
allow the compiler to put them in read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200823220025.17588-9-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 14:36:37 +05:30
Rikard Falkeborn
f9781f7f97 phy: samsung-ufs: Constify samsung_ufs_phy_ops 
The only usage is to pass its address to devm_phy_create() which takes a
const pointer. Make it const to allow the compiler to put it in
read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200823220025.17588-8-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 14:36:37 +05:30
Rikard Falkeborn
d6541a86ec phy: ralink-usb: Constify ralink_usb_phy_ops 
The only usage is to pass its address to devm_phy_create() which takes a
const pointer. Make it const to allow the compiler to put it in
read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200823220025.17588-7-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 14:36:37 +05:30
Rikard Falkeborn
b3c824bb64 phy: lantiq: vrx200-pcie: Constify ltq_vrx200_pcie_phy_ops 
The only usage is to pass its address to devm_phy_create() which takes a
const pointer. Make it const to allow the compiler to put it in
read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20200823220025.17588-6-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 14:36:37 +05:30
Rikard Falkeborn
b285d2ae91 phy: lantiq: rcu-usb2: Constify ltq_rcu_usb2_phy_ops 
The only usage is to pass its address to devm_phy_create() which takes a
const pointer. Make it const to allow the compiler to put it in
read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200823220025.17588-5-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 14:36:37 +05:30
Rikard Falkeborn
fdde71d351 phy: hisilicon; Constify hi3660_phy_ops 
The only usage is to pass its address to devm_phy_create() which takes a
const pointer. Make it const to allow the compiler to put it in
read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200823220025.17588-4-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 14:36:36 +05:30
Rikard Falkeborn
2bf314d66f phy: fsl-imx8mq-usb: Constify imx8mq_usb_phy_ops 
The only usage is to pass its address to devm_phy_create() which takes a
const pointer. Make it const to allow the compiler to put it in
read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200823220025.17588-3-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 14:36:36 +05:30
Rikard Falkeborn
e947ef4d96 phy: cadence: salvo: Constify cdns_salvo_phy_ops 
The only usage is to pass its address to devm_phy_create() which takes a
const pointer. Make it const to allow the compiler to put it in
read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200823220025.17588-2-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 14:36:36 +05:30
Li Jun
4708ee3782 phy: freescale: imx8mq-usb: add support for imx8mp usb phy 
Add initial support for imx8mp usb phy support, imx8mp usb has
a silimar phy as imx8mq, which has some different customizations
on clock and low power design when SoC integration.

Signed-off-by: Li Jun <jun.li@nxp.com>
Link: https://lore.kernel.org/r/1598276014-2377-2-git-send-email-jun.li@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 14:34:37 +05:30
Roger Quadros
8836e29bad phy: omap-usb2-phy: fix coding style issues 
Fix checkpatch warnings and sort the include files alphabetically.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Link: https://lore.kernel.org/r/20200824075127.14902-3-rogerq@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-08-31 14:31:31 +05:30
Vinod Koul
b6cc6cef1c Merge branch 'fixes' into next 2020-08-31 14:31:23 +05:30