The wakeup and sleep commands need to be sent to the WILC chip only
when it is in power save mode (PSM, as controlled by "iw dev wlan0 set
power_save on/off"). The commands are relatively costly, so it pays
to skip them when possible.
iperf3 without this patch (no significant different with PSM on/off):
TX 0.00-120.01 sec 140 MBytes 9.82 Mbits/sec
RX 0.00-120.69 sec 283 MBytes 19.6 Mbits/sec
with this patch applied:
PSM off (TX is 46% improved, RX slightly improved; may not be significant):
TX 0.00-120.00 sec 206 MBytes 14.4 Mbits/sec
RX 0.00-120.48 sec 322 MBytes 22.4 Mbits/sec
PSM on (no significant change):
TX 0.00-120.00 sec 140 MBytes 9.78 Mbits/sec
RX 0.00-120.08 sec 257 MBytes 18.0 Mbits/sec
Signed-off-by: David Mosberger-Tang <davidm@egauge.net>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20211210203016.3680425-2-davidm@egauge.net
Use the correct sequence to configure clockless registers for chip wake-up.
The following sequence is expected from WILC chip for wakeup:
- set wakeup bit in wakeup_reg register
- after setting the wakeup bit, read back the clock status bit for wakeup
complete.
For SDIO/SPI modules, the wakeup sequence is the same except uses different
register values so refactored the code to use common function for both
SDIO/SPI bus.
Signed-off-by: Ajay Singh <ajay.kathat@microchip.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20210916164902.74629-5-ajay.kathat@microchip.com
Added multiple queues[BK,BE,VI,VO] to handle different priority data
packets. Before adding a packet to the queue, checked its priority from
the header, and then add to the suitable queue. The limit for each queue
is maintained separately. Also while passing the packets to the firmware
via VMM take care to select data packets based on priority and available
space.
Signed-off-by: Ajay Singh <ajay.kathat@microchip.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20201125114059.10006-6-ajay.kathat@microchip.com
