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22 Commits

Author SHA1 Message Date
Dmitry Baryshkov
858c595a3f drm/msm/dsi: add continuous clock support for 7nm PHY 
Unlike previous generations, 7nm PHYs are required to collaborate with
the host for continuos clock mode. Add changes neccessary to enable
continuous clock mode in the 7nm DSI PHYs.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210805170817.3337665-1-dmitry.baryshkov@linaro.org
[Fix merge conflict, and $description typo]
Signed-off-by: Rob Clark <robdclark@chromium.org>
 2021-08-10 15:30:32 -07:00
Abhinav Kumar
24a5993e5b drm/msm/dsi: update dsi register header file for tpg 
Update the DSI controller header XML file to add registers
and bitfields to support rectangular checkered pattern
generator.

Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
Link: https://lore.kernel.org/r/1626922232-29105-1-git-send-email-abhinavk@codeaurora.org
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
[DB: removed headergen commit changes]
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
 2021-08-07 11:48:39 -07:00
Rob Clark
cc4c26d4ae drm/msm: Generated register update 
Based on mesa commit daa2ccff7a0201941db3901780d179e2634057d5

Small bit of .c churn in the phy code to adapt to split up of phy
related registers.

Signed-off-by: Rob Clark <robdclark@chromium.org>
 2021-06-23 07:33:54 -07:00
Jonathan Marek
1ef7c99d14 drm/msm/dsi: add support for 7nm DSI PHY/PLL 
This adds support for the 7nm ("V4") DSI PHY/PLL for sm8150 and sm8250.

Implementation is based on 10nm driver, but updated based on the downstream
7nm driver.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> (SM8250)
Signed-off-by: Rob Clark <robdclark@chromium.org>
 2020-09-12 09:59:58 -07:00
Rob Clark
c28c82e9db drm/msm: sync generated headers 
We haven't sync'd for a while.. pull in updates to get definitions for
some fields in pkt7 payloads.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Acked-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
 2020-07-31 06:46:16 -07:00
Rob Clark
2d75632253 drm/msm: update generated headers 
Resync generated headers to pull in a6xx registers.

Signed-off-by: Rob Clark <robdclark@gmail.com>
 2018-08-10 18:49:18 -04:00
Archit Taneja
6d5796af71 drm/msm/dsi: Update generated headers for 10nm PLL/PHY 
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
 2018-02-20 10:41:20 -05:00
Rob Clark
52260ae4c4 drm/msm: update generated headers 
Signed-off-by: Rob Clark <robdclark@gmail.com>
 2017-06-16 11:16:07 -04:00
Archit Taneja
cd576abfff drm/msm/dsi: Update generated headers 
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
 2017-02-06 11:28:43 -05:00
Rob Clark
a26ae754b0 drm/msm: update generated headers 
Pull in a5xx registers.

Signed-off-by: Rob Clark <robdclark@gmail.com>
 2016-11-28 15:14:10 -05:00
Rob Clark
a2272e48ee drm/msm: update generated headers 
Pull in additional regs needed for a430, etc.

Signed-off-by: Rob Clark <robdclark@gmail.com>
 2016-03-03 11:55:27 -05:00
Rob Clark
8217e97ab9 drm/msm: update generated headers 
Signed-off-by: Rob Clark <robdclark@gmail.com>
 2015-10-22 15:39:44 -04:00
Rob Clark
2d3584eb87 drm/msm: update generated headers 
Signed-off-by: Rob Clark <robdclark@gmail.com>
 2015-08-15 18:27:10 -04:00
Rob Clark
af6cb4c1a4 drm/msm: update generated headers 
Signed-off-by: Rob Clark <robdclark@gmail.com>
 2015-06-11 13:11:01 -04:00
Hai Li
3b3627a35d drm/msm/dsi: Update generated DSI header file 
Prepare for initial DSI implementation

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
 2015-04-01 19:29:35 -04:00
Rob Clark
8a264743b7 drm/msm: update generated headers 
Resync from rnndb database, to pull in register defines for:
 * eDP
 * HDMI/HDCP
 * mdp4/mdp5 YUV support
 * mdp5 hw cursor support

Signed-off-by: Rob Clark <robdclark@gmail.com>
 2015-02-01 15:30:33 -05:00
Rob Clark
bc00ae02e4 drm/msm: update generated headers 
Signed-off-by: Rob Clark <robdclark@gmail.com>
 2014-11-16 14:22:42 -05:00
Rob Clark
f9a1ca5c47 drm/msm: update generated headers 
In particular, pick up the definitions for a handful of LVDS related
registers.

Signed-off-by: Rob Clark <robdclark@gmail.com>
 2014-09-10 11:19:05 -04:00
Rob Clark
89301471e6 drm/msm: update generated headers 
Signed-off-by: Rob Clark <robdclark@gmail.com>
 2014-08-04 11:55:28 -04:00
Rob Clark
facb4f4e7f drm/msm: resync generated headers 
resync to latest envytools db, add mdp5 registers

Signed-off-by: Rob Clark <robdclark@gmail.com>
 2014-01-09 14:38:59 -05:00
Rob Clark
22ba8b6b23 drm/msm: resync generated headers 
resync to latest envytools db, fixes a typo: s/mpd4/mdp4/

Signed-off-by: Rob Clark <robdclark@gmail.com>
Acked-by: David Brown <davidb@codeaurora.org>
 2013-11-01 12:39:44 -04:00
Rob Clark
0cf6c71d70 drm/msm: add register definitions 
Generated from rnndb files in:

https://github.com/freedreno/envytools

Keep this split out as a separate commit to make it easier to review the
actual driver.

Signed-off-by: Rob Clark <robdclark@gmail.com>
 2013-08-24 14:33:01 -04:00