Commit Graph

23274 Commits

Author SHA1 Message Date
Rob Herring
319aeaf69c arm: dts: vexpress: Fix motherboard bus 'interrupt-map'
Commit 078fb7aa6a ("arm: dts: vexpress: Fix addressing issues with
'motherboard-bus' nodes") broke booting on a couple of 32-bit VExpress
boards. The problem is #address-cells size changed, but interrupt-map
was not updated. This results in the timer interrupt (and all the
other motherboard interrupts) not getting mapped.

As the 'interrupt-map' properties are all just duplicates across boards,
just move them into vexpress-v2m.dtsi and vexpress-v2m-rs1.dtsi.
Strictly speaking, 'interrupt-map' is dependent on the parent
interrupt controller, but it's not likely we'll ever have a different
parent than GICv2 on these old platforms. If there was one,
'interrupt-map' can still be overridden.

Link: https://lore.kernel.org/r/20210924214221.1877686-1-robh@kernel.org
Fixes: 078fb7aa6a ("arm: dts: vexpress: Fix addressing issues with 'motherboard-bus' nodes")
Cc: Guillaume Tucker <guillaume.tucker@collabora.com>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Reported-by: Reported-by: "kernelci.org bot" <bot@kernelci.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2021-09-26 15:33:30 +01:00
Bastien Roucariès
55dd7e0590 ARM: dts: sun7i: A20-olinuxino-lime2: Fix ethernet phy-mode
Commit bbc4d71d63 ("net: phy: realtek: fix rtl8211e rx/tx delay
config") sets the RX/TX delay according to the phy-mode property in the
device tree. For the A20-olinuxino-lime2 board this is "rgmii", which is the
wrong setting.

Following the example of a900cac375 ("ARM: dts: sun7i: a20: bananapro:
Fix ethernet phy-mode") the phy-mode is changed to "rgmii-id" which gets
the Ethernet working again on this board.

Signed-off-by: Bastien Roucariès <rouca@debian.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210916081721.237137-1-rouca@debian.org
2021-09-24 09:29:00 +02:00
Corentin Labbe
0f2752384f ARM: gemini: add device tree for ssi1328
The SSI 1328 is a NAS box running a SL3516 SoC.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-09-23 02:26:07 +02:00
Corentin Labbe
97b07ef09f ARM: gemini: add device tree for edimax NS2502
The edimax NS2502 is a NAS box running a SL3516 SoC.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-09-23 02:26:07 +02:00
Corentin Labbe
25848b04dc ARM: dts: gemini: add labels for USB, IDE, flash and ethernet
Adding label will help simplify boards's dts.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-09-23 02:26:05 +02:00
Arınç ÜNAL
beff77b934 ARM: dts: BCM5301X: Add DT for Asus RT-AC88U
Hardware Info
-------------

Processor	- Broadcom BCM4709C0KFEBG dual-core @ 1.4 GHz
Switch		- BCM53012 in BCM4709C0KFEBG & external RTL8365MB
DDR3 RAM	- 512 MB
Flash		- 128 MB (ESMT F59L1G81LA-25T)
2.4GHz		- BCM4366 4×4 2.4/5G single chip 802.11ac SoC
5GHz		- BCM4366 4×4 2.4/5G single chip 802.11ac SoC
Ports		- 8 Ports, 1 WAN Ports

Tested on OpenWrt on kernel 5.10 built with DSA driver.

Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-09-22 11:37:27 -07:00
Fabio Estevam
450e7fe9b1 ARM: dts: imx6qdl-pico: Fix Ethernet support
Currently, it is no longer possible to retrieve a DHCP address
on the imx6qdl-pico board.

This issue has been exposed by commit f5d9aa79df ("ARM: imx6q:
remove clk-out fixup for the Atheros AR8031 and AR8035 PHYs").

Fix it by describing the qca,clk-out-frequency property as suggested
by the commit above.

Fixes: 98670a0bb0 ("ARM: dts: imx6qdl: Add imx6qdl-pico support")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-09-22 16:34:45 +08:00
Yunus Bas
d555a22902 ARM: dts: imx6: phycore-som: Disable micro-SD write protection
The micro-SD card doesn't feature a write-protect pin. Set the
corresponding property in the devicetree to handle this behavior
correctly and suppress driver warnings.

Signed-off-by: Yunus Bas <y.bas@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-09-22 16:22:56 +08:00
Marek Vasut
5c187e2eb3 ARM: dts: imx: Fix USB host power regulator polarity on M53Menlo
The MIC2025 switch input signal nEN is active low, describe it as such
in the DT. The previous change to this regulator polarity was incorrectly
influenced by broken quirks in gpiolib-of.c, which is now long fixed. So
fix this regulator polarity setting here once and for all.

Fixes: 3c3601cd6a ("ARM: dts: imx53: Update USB configuration on M53Menlo")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-09-22 16:14:26 +08:00
Marek Vasut
c8c1efe14a ARM: dts: imx: Add missing pinctrl-names for panel on M53Menlo
The panel already contains pinctrl-0 phandle, but it is missing
the default pinctrl-names property, so the pin configuration is
ignored. Fill in the missing pinctrl-names property, so the pin
configuration is applied.

Fixes: d81765d693 ("ARM: dts: imx53: Update LCD panel node on M53Menlo")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-09-22 14:55:36 +08:00
Richard Zhu
63651ef23f ARM: dts: imx: fix the schema check errors
- ranges property should be grouped by region, with no functional
  changes. Otherwise, schema dtbs_check would report the following errors.
"linux-imx/arch/arm/boot/dts/imx6qp-vicutp.dt.yaml: pcie@1ffc000: ranges: 'oneOf' conditional failed, one must be fixed:
        linux-imx/arch/arm/boot/dts/imx6qp-vicutp.dt.yaml: pcie@1ffc000: ranges: 'oneOf' conditional failed, one must be fixed:
                [[2164260864, 0, 0, 33030144, 0, 65536, 2181038080, 0, 16777216, 16777216, 0, 15728640]] is not of type 'boolean'
                True was expected
                [[2164260864, 0, 0, 33030144, 0, 65536, 2181038080, 0, 16777216, 16777216, 0, 15728640]] is not of type 'null'
        [2164260864, 0, 0, 33030144, 0, 65536, 2181038080, 0, 16777216, 16777216, 0, 15728640] is too long
        From schema: linux-imx/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml"
- refer to commit 281f1f99cf ("PCI: dwc: Detect number of iATU windows").
  The num-viewport is not required anymore, remove them totally.
- dt_binding_check complains "compatible: ['fsl,imx6qp-pcie', 'snps,dw-pcie']
  is too long", remove "snps,dw-pcie" from the compatible string.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-09-22 14:44:21 +08:00
Eddie James
eaad40466b ARM: dts: aspeed: Add ADC for AST2600 and enable for Rainier and Everest
Add the ADC nodes to the AST2600 devicetree. Enable ADC1 for Rainier and
Everest systems and add an iio-hwmon node for the 7th channel to report
the battery voltage.

Tested on Rainier:
~# cat /sys/class/hwmon/hwmon11/in1_input
1347

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20210916210045.31769-1-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-09-22 13:01:04 +09:30
Ben Tyner
1390293eac ARM: dts: everest: Define name for gpio line B6
gpio-line-names B6 set to checkstop

Signed-off-by: Ben Tyner <ben.tyner@ibm.com>
Reviewed-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20210920150549.6431-4-bentyner@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-09-22 13:00:05 +09:30
Ben Tyner
d269f55815 ARM: dts: everest: Define name for gpio line Q2
gpio-line-names Q2 set to regulator-standby-faulted

Signed-off-by: Ben Tyner <ben.tyner@ibm.com>
Reviewed-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20210920150549.6431-3-bentyner@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-09-22 13:00:04 +09:30
Ben Tyner
2f2219c072 ARM: dts: rainier: Define name for gpio line Q2
gpio-line-names Q2 set to regulator-standby-faulted

Signed-off-by: Ben Tyner <ben.tyner@ibm.com>
Reviewed-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20210920150549.6431-2-bentyner@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-09-22 12:59:29 +09:30
Fabio Estevam
6c4183287a ARM: dts: imx7d-sdb: Fix the SPI chipselect polarity
The following warning is seen when the SPI GPIO driver probes:

gpio-expander@0 enforce active low on chipselect handle

The reason for this warning is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:

* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.

To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-09-22 11:09:47 +08:00
Fabio Estevam
e40d0706bf ARM: dts: imx6qdl-tqma6: Fix the SPI chipselect polarity
The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
helped to detect the following SPI chipselect polarity mismatch on an
imx6q-sabresd for example:

[    4.854337] m25p80@0 enforce active low on chipselect handle

Prior to the above commit, the chipselect polarity passed via cs-gpios
property was ignored and considered active-low.

The reason for such mismatch is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:

* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.

To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-09-22 11:09:47 +08:00
Fabio Estevam
70b211ddcf ARM: dts: imx6qp-prtwd3: Fix the SPI chipselect polarity
The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
helped to detect the following SPI chipselect polarity mismatch on an
imx6q-sabresd for example:

[    4.854337] m25p80@0 enforce active low on chipselect handle

Prior to the above commit, the chipselect polarity passed via cs-gpios
property was ignored and considered active-low.

The reason for such mismatch is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:

* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.

To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-09-22 11:09:47 +08:00
Fabio Estevam
97eb19d884 ARM: dts: imx6dl-alti6p: Fix the SPI chipselect polarity
The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
helped to detect the following SPI chipselect polarity mismatch on an
imx6q-sabresd for example:

[    4.854337] m25p80@0 enforce active low on chipselect handle

Prior to the above commit, the chipselect polarity passed via cs-gpios
property was ignored and considered active-low.

The reason for such mismatch is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:

* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.

To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-09-22 11:09:47 +08:00
Michal Vokáč
417a984570 ARM: dts: imx6dl-yapp4: Remove the unused white LED channel
Since the reg property was added to each channel node in commit
b86d3d21cd ("ARM: dts: imx6dl-yapp4: Add reg property to the lp5562
channel node") it is possible to skip unused channels.

Remove the actually unused white LED channel.

Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-09-22 11:09:47 +08:00
Michal Vokáč
9b663b34c9 ARM: dts: imx6dl-yapp4: Fix lp5562 LED driver probe
Since the LED multicolor framework support was added in commit
92a81562e6 ("leds: lp55xx: Add multicolor framework support to lp55xx")
LEDs on this platform stopped working.

Author of the framework attempted to accommodate this DT to the
framework in commit b86d3d21cd ("ARM: dts: imx6dl-yapp4: Add reg property
to the lp5562 channel node") but that is not sufficient. A color property
is now required even if the multicolor framework is not used, otherwise
the driver probe fails:

  lp5562: probe of 1-0030 failed with error -22

Add the color property to fix this.

Fixes: 92a81562e6 ("leds: lp55xx: Add multicolor framework support to lp55xx")
Cc: <stable@vger.kernel.org>
Cc: linux-leds@vger.kernel.org
Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-09-22 11:06:49 +08:00
Christian Lamparter
477ffdbdf3 ARM: BCM53016: MR32: get mac-address from nvmem
The MAC-Address of the MR32's sole ethernet port is
located in offset 0x66 of the attached AT24C64 eeprom.

Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-09-21 14:20:14 -07:00
Christian Lamparter
6abc4ca5a2 ARM: BCM53016: Specify switch ports for Meraki MR32
the switch identifies itself as a BCM53012 (rev 5)...
This patch has been tested & verified on OpenWrt's
snapshot with Linux 5.10 (didn't test any older kernels).
The MR32 is able to "talk to the network" as before with
OpenWrt's SWITCHDEV b53 driver.

| b53-srab-switch 18007000.ethernet-switch: found switch: BCM53012, rev 5
| libphy: dsa slave smi: probed
| b53-srab-switch 18007000.ethernet-switch poe (uninitialized):
|	PHY [dsa-0.0:00] driver [Generic PHY] (irq=POLL)
| b53-srab-switch 18007000.ethernet-switch: Using legacy PHYLIB callbacks.
|	Please migrate to PHYLINK!
| DSA: tree 0 setup

Reported-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-09-21 14:20:07 -07:00
Rafał Miłecki
6461282862 ARM: dts: BCM53573: Add Tenda AC9 switch ports
This router has 1 WAN and 4 LAN ports.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-09-21 14:19:50 -07:00
Rafał Miłecki
9fb90ae6ca ARM: dts: BCM53573: Describe on-SoC BCM53125 rev 4 switch
BCM53573 family SoC have Ethernet switch connected to the first Ethernet
controller (accessible over MDIO).

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-09-21 14:19:41 -07:00
Chuanjia Liu
adfaea2387 ARM: dts: mediatek: Update MT7629 PCIe node for new format
To match the new dts binding. Remove "subsys",unused
interrupt and slot node.Add "interrupt-names",
"linux,pci-domain" and pciecfg node.

Signed-off-by: Chuanjia Liu <chuanjia.liu@mediatek.com>
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
Link: https://lore.kernel.org/r/20210823032800.1660-7-chuanjia.liu@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-09-21 20:41:32 +02:00
Linus Walleij
41b086b22f ARM: dts: ux500: Skomer eMMC needs 300 ms power on
The partitions on the eMMC will not even appear sometimes, in the
datasheet for the Samsung KLMxGxxE4x we find that the power-on time
for a 4GB eMMC of this type is 300 ms and nowadays the block stack
is so fast so we are stressing it, and we need to specify that we
need this delay in the device tree.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-09-21 16:32:03 +02:00
Linus Walleij
1a4c270554 ARM: dts: ux500: Fix up SD card pin config
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-09-21 16:32:03 +02:00
Linus Walleij
7aee0288be ARM: dts: ux500: Skomer regulator fixes
AUX2 has slightly wrong voltage and AUX5 doesn't need to be
always on.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-09-21 16:32:03 +02:00
Hari Prasath
4c46b991ba ARM: at91: dts: sama5d29: Add dtsi file for sama5d29
A new dtsi file for sama5d29 SoC is added which basically inherits the sama5d2
dtsi with the mac controller compatible property updated.

Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210812140758.28273-1-Hari.PrasathGE@microchip.com
2021-09-21 12:37:07 +02:00
Durai Manickam KR
0d83e4c43a ARM: dts: at91-sama5d2_icp.dts: Added I2C bus recovery support
SDA and SCL is configured as GPIO for I2C bus to recover during
I2C bus malfunction.

Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210921064344.889304-1-durai.manickamkr@microchip.com
2021-09-21 11:17:49 +02:00
Peter Rosin
dcdbc335a9 ARM: dts: at91: tse850: the emac<->phy interface is rmii
This went unnoticed until commit 7897b071ac ("net: macb: convert
to phylink") which tickled the problem. The sama5d3 emac has never
been capable of rgmii, and it all just happened to work before that
commit.

Fixes: 21dd0ece34 ("ARM: dts: at91: add devicetree for the Axentia TSE-850")
Signed-off-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/ea781f5e-422f-6cbf-3cf4-d5a7bac9392d@axentia.se
2021-09-21 11:13:31 +02:00
Johan Jonker
3e6f8124a7 ARM: dts: rockchip: swap timer clock-names
With the conversion of rockchip,rk-timer.yaml the clock-names order
was set to "pclk", "timer", but nothing was fixed in the ARM dts section
of the mainline kernel, so the swap timer clock-names that don't fit.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/timer/rockchip,rk-timer.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210828102659.7348-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-20 15:22:48 +02:00
Johan Jonker
e220e0b00f ARM: dts: rockchip: add more angle brackets to operating-points property on rk3066a
After the conversion to YAML of the Operating Performance Points(OPP)
binding the operating-points property expects values in
a uint32-matrix with 2 items, so fix the notifications by adding
angle brackets.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/opp/opp-v1.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210828091233.19992-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-20 15:22:44 +02:00
Johan Jonker
33a2a4b2b9 ARM: dts: rockchip: rename opp-table node names
After the conversion to YAML of the Operating Performance Points(OPP)
binding the operating-points-v2 property expects the nodename to have
the '^opp-table(-[a-z0-9]+)?$' format, so rename all Rockchip ARM dts
opp-table node names.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/opp/opp-v2.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210828094512.26862-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-20 15:22:37 +02:00
Johan Jonker
f0f56c1144 ARM: dts: rockchip: change rv1108 gmac nodename
The rv1108 gmac node is checked with rockchip-dwmac.yaml,
snps,dwmac.yaml and ethernet-controller.yaml.
The nodename should have a pattern: "^ethernet(@.*)?$",
so change to nodename.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210828114240.12231-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-20 15:22:33 +02:00
Johan Jonker
d7197d56c9 ARM: dts: rockchip: add adc-keys node to rk3066a-mk808
The MK808 has a button inside the cover for the boot loader to do
some action. Add the adc-keys node to the rk3066a-mk808.dts file.
The rk3066 has a higher maximum DC supply voltage for the analog part of
SAR-ADC VDDA_SARADC of 2.75V then other Rockchip SoCs.
For the "rockchip,saradc" node is a vref-supply property required,
so add a regulator for it as well.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210828092755.24560-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-20 15:22:29 +02:00
Frank Wunderlich
235e40fd00 arm: dts: mt7623: add otg nodes for bpi-r2
Add OTG-Nodes for BananaPi-R2

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20210830145958.108605-1-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-09-20 14:00:55 +02:00
Sungbo Eo
f5f54d00f2 arm: dts: mt7623: add musb device nodes
MT7623 has an musb controller that is compatible with the one from MT2701.

Signed-off-by: Sungbo Eo <mans0n@gorani.run>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210830155903.13907-2-mans0n@gorani.run
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-09-20 14:00:24 +02:00
Geert Uytterhoeven
b80795509e ARM: dts: rza2mevb: Add I2C EEPROM support
Enable the third I2C channel, and describe the I2C EEPROM connected to
it.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/786f0354fb30b183d5bccb2f12b13e6535b9ace1.1626267234.git.geert+renesas@glider.be
2021-09-20 12:07:05 +02:00
Marijn Suijten
8ccecf6c71 ARM: dts: qcom: msm8974: Add xo_board reference clock to DSI0 PHY
According to YAML validation, and for a future patchset putting this
xo_board reference clock to use as VCO reference parent, add the missing
clock to dsi_phy0.

Fixes: 5a9fc531f6 ("ARM: dts: msm8974: add display support")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210830175739.143401-1-marijn.suijten@somainline.org
2021-09-19 23:24:49 -05:00
David Heidelberg
af85135026 ARM: dts: qcom: fill secondary compatible for multiple boards
To comply with device-tree definition.

Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210909060343.9665-1-david@ixit.cz
2021-09-19 23:17:25 -05:00
David Heidelberg
a1c1b985bd ARM: dts: qcom: apq8064: adjust memory node according to specs
Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210908172544.55666-1-david@ixit.cz
2021-09-19 23:13:34 -05:00
David Heidelberg
8db0b6c7b6 ARM: dts: qcom: apq8064: Convert adreno from legacy gpu-pwrlevels to opp-v2
APQ8064 was last user of gpu-pwrlevels inside mainline tree, so convert
it now.

Tested on Nexus 7 2013, no functional changes.

Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210829133918.57780-3-david@ixit.cz
2021-09-19 23:12:39 -05:00
David Heidelberg
ecf5b34cd5 ARM: dts: qcom: apq8064: update Adreno clock names
The legacy clock names (including the _clk suffix) was dropped from the
driver, so update the dts accordingly).

Tested on Nexus 7 2013, no functional changes.

Signed-off-by: David Heidelberg <david@ixit.cz>
[bjorn: Updated commit message]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210829133918.57780-2-david@ixit.cz
2021-09-19 23:11:27 -05:00
Rob Herring
078fb7aa6a arm: dts: vexpress: Fix addressing issues with 'motherboard-bus' nodes
The 'motherboard-bus' node in Arm Ltd boards fails schema checks as
'simple-bus' child nodes must have a unit-address. The 'ranges' handling is
also wrong (or at least strange) as the mapping of SMC chip selects should
be in the 'arm,vexpress,v2m-p1' node rather than a generic 'simple-bus'
node. Either there's 1 too many levels of 'simple-bus' nodes or 'ranges'
should be moved down a level. The latter change is more simple, so let's do
that. As the 'ranges' value doesn't vary for a given motherboard instance,
we can move 'ranges' into the motherboard dtsi files.

Link: https://lore.kernel.org/r/20210819184239.1192395-6-robh@kernel.org
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2021-09-17 10:23:41 +01:00
Owen Kirby
8c8b997c34 ARM: dts: at91: add Exegin Q5xR5 board
Add Exegin Q5xR5. The base device tree is from OpenWrt tree and with
the addition of this patch there will be no need to maintain it
separatelly in OpenWrt.

[osk: original author of patch in OpenWrt]
[claudiu.beznea: use "&<label> {" syntax, sorted nodes in alphabetical
 order, adapted flash to new support in kernel 5.14, use proper
 compatibles according to kernel 5.14, use macros instead of
 hardcoded numbers for pinctrl phandles and for all pinctrl references,
 add pinctrl-names, pinctrl-X where necessaray]

Signed-off-by: Owen Kirby <osk@exegin.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210816064416.1630674-8-claudiu.beznea@microchip.com
2021-09-15 12:21:15 +02:00
Adam Porter
6dcb573a0a ARM: dts: at91: add CalAmp LMU5000 board
Add CalAmp LMU5000 board. The base device tree is from OpenWrt tree and
with the addition of this patch there will be no need to maintain it
separatelly in OpenWrt.

[porter.adam: original author of patch in OpenWrt]
[claudiu.beznea: fixed compilation warnings, use &<lable> syntax,
 sorted nodes in alphabetical order, adapted flash to new support
 in kernel 5.14, use proper compatibles according to kernel 5.14,
 use macros instead of hard coded numbers for pinctrl phandles and
 for all pinctrl references, add pinctrl-names, pinctrl-X where
 necessary]

Signed-off-by: Adam Porter <porter.adam@gmail.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210816064416.1630674-5-claudiu.beznea@microchip.com
2021-09-15 12:21:15 +02:00
Claudiu Beznea
fcc090f9e3 ARM: dts: at91: at91sam9260: add pinctrl label
Add label for pinctrl node.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210816064416.1630674-2-claudiu.beznea@microchip.com
2021-09-15 12:16:45 +02:00
Durai Manickam KR
6a1ca035d2 ARM: dts: at91-sama5d27_som1_ek: Added I2C bus recovery support
SDA and SCL is configured as GPIO for I2C bus to recover during
I2C bus malfunction.

Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210914052113.85695-1-durai.manickamkr@microchip.com
2021-09-15 11:01:06 +02:00