The pattern: "^(|usb-|usb2-|usb3-|pci-|pcie-|sata-)phy(@[0-9a-f,]+)*$"
in phy-provider.yaml has required "#phy-cells" for phy nodes.
The "phy-cells" in rockchip-inno-usb2 nodes are located in subnodes.
Rename the nodename to pattern "usb2phy@[0-9a-f]+$" to prevent
notifications.
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/
phy/phy-provider.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210601164800.7670-4-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Most of the aspeed boards have copied the 'earlyprink' string in
the bootargs. However, there's no earlyprink driver configured in the
defconfigs, so this does nothing.
A combination of setting stdout in the chosen node and adding earlycon
to bootargs causes early serial output to appear early. This changes all
boards to use this option.
The console=ttyS4,115200 option is still required, as this is used by
the run time uart driver.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Alexander Filippov <a.filippov@yadro.com>
Link: https://lore.kernel.org/r/20210526051220.136432-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
Fix following warning observed with "make dtbs_check W=1" command.
It concerns f429 eval and disco boards, f769 disco board.
Warning (unit_address_vs_reg): /gpio_keys/button@0: node has a unit name,
but no reg or ranges property
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
The microSD card detect pin is physically connected to the MPU pin PI3.
The Device Tree configuration of the card detect pin was wrong—it was
set to pin PB7 instead. If such configuration was used, the kernel would
hang on “Waiting for root device” when booting from a microSD card.
Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Configure qspi's mdma from buffer transfer (max 128 bytes) to
block transfer (max 64K bytes).
mtd_speedtest shows that write throughtput increases :
- from 734 to 782 KiB/s (~6.5%) with s25fl512s SPI-NOR.
- from 4848 to 5319 KiB/s (~9.72%) with Micron SPI-NAND.
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
The Microchip LAN8710Ai PHY requires XTAL1/CLKIN external clock to be
enabled when the nRST is toggled according to datasheet Microchip
LAN8710A/LAN8710Ai DS00002164B page 35 section 3.8.5.1 Hardware Reset:
"
A Hardware reset is asserted by driving the nRST input pin low. When
driven, nRST should be held low for the minimum time detailed in
Section 5.5.3, "Power-On nRST & Configuration Strap Timing," on page
59 to ensure a proper transceiver reset. During a Hardware reset, an
external clock must be supplied to the XTAL1/CLKIN signal.
"
This is accidentally fulfilled in the current setup, where ETHCK_K is used
to supply both PHY XTAL1/CLKIN and is also fed back through eth_clk_fb to
supply ETHRX clock of the DWMAC. Hence, the DWMAC enables ETHRX clock,
that has ETHCK_K as parent, so ETHCK_K clock are also enabled, and then
the PHY reset toggles.
However, this is not always the case, e.g. in case the PHY XTAL1/CLKIN
clock are supplied by some other clock source than ETHCK_K or in case
ETHRX clock are not supplied by ETHCK_K. In the later case, ETHCK_K would
be kept disabled, while ETHRX clock would be enabled, so the PHY would
not be receiving XTAL1/CLKIN clock and the reset would fail.
Improve the DT by adding the PHY clock phandle into the PHY node, which
then also requires moving the PHY reset GPIO specifier in the same place
and that then also requires correct PHY reset GPIO timing, so add that
too.
A brief note regarding the timing, the datasheet says the reset should
stay asserted for at least 100uS and software should wait at least 200nS
after deassertion. Set both delays to 500uS which should be plenty.
Fixes: 34e0c7847d ("ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
The ACTMON module monitors activity of memory clients and then devfreq
driver makes decisions about a required memory frequency based on info
from ACTMON. Add ACTMON device to the thermal zone of Ouya in order to
use it as a cooling device which throttles memory freq on overheat.
Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Matt Merhar <mattmerhar@protonmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The ACTMON module monitors activity of memory clients and then devfreq
driver makes decisions about a required memory frequency based on info
from ACTMON. Add ACTMON device to the thermal zone of Nexus 7 in order
to use it as a cooling device which throttles memory freq on overheat.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The ACTMON module monitors activity of memory clients and decisions
about a minimum required memory frequency are made based on info from
ACTMON. Add cooling cells to ACTMON device-tree node in order to turn
it into a cooling device that will throttle memory freq on overheat.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The 3v3 regulator GPIO is GP6 and not GP7, which is the DDR regulator.
Both regulators are always-on, nevertheless the DT model needs to be
corrected, fix it.
Reported-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The bq27541 Linux kernel driver will try to reprogram controller based
on the values from monitored-battery node, but it fails to do so because
controller was locked by manufacturer. Still this is a very undesirable
behaviour, hence let's remove the optional battery node.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Remove unused thermal zone just to clean up device-tree and set critical
temperature further apart from the passive cooling trip point since
during or thermal testing of Asus Transformer devices we found that CPU
could reach the critical temperature in a certain kernel configurations
for a brief moment if critical trip point is set close to the passive
trip point and then device will be immediately shut off without getting
a chance to cool down using passive cooling.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add i2c-thermtrip node which enables emergency shutdown by PMC on
SoC die overheat detected by TSENSOR.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add thermal zone with a passive cooling trip for CPU. Attach it to the
LM90 sensor which monitors CPU temperature. Now CPU frequencies will be
throttled once trip point is reached, preventing critical overheat.
Tested-by: Agneli <poczt@protonmail.ch>
Tested-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
All Tegra boards which use WM8903 audio codec are specifying a wrong
polarity for the headphones detection GPIO. The kernel driver hardcodes
the polarity to active-low, which is the correct polarity, so we can fix
the device-trees safely.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The reg property is now specified for the emc-tables nodes in the Tegra20
device-tree binding. Add reg property to the EMC table device-tree nodes
of Tegra20 board device-trees in order to silence dt_binding_check warning
about the missing property.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
It's possible to hit the temperature of the thermal zone in a very warm
environment under a constant load, like watching a video using software
decoding. It's even easier to hit the limit with a slightly overclocked
CPU. Bump the temperature limit by 10C in order to improve user
experience. Acer A500 has a large board and 10" display panel which are
used for the heat dissipation, the SoC is placed far away from battery,
hence we can safely bump the temperature limit.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra20 has v2.00 SDMMC controller which doesn't support voltage
switching and the WiFi SDIO bus voltage is fixed to 1.8v in accordance
to the board's schematics, while MMC core confusingly saying that it's
3.3v because of the v2.00. Let's correct the voltage in the device-tree
just for consistency. This is a minor improvement which doesn't fix any
problems.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Use edge-triggered interrupt and set delay to 100ms for microphone hook
detection. This doesn't fix any known problems, but there is a smaller
chance to miss insertion of the microphone now, which previously happened
rarely.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The GPIO pins connected to the 4 Software Switches ("SOFT_SW", SW12) do
not have external pull-up resistors, but rely on internal pull-ups being
enabled. Fortunately this is satisfied by the initial state of these
pins.
Make this explicit by enabling bias-pull-up, to remove the dependency on
initial state and/or boot loader configuration.
While at it, rename the surrounding device node from "gpio-keys" to
"keyboard", to comply with generic node name recommendations.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/45f38a5333feba9bea80efeb5a41a6c3f60deda2.1619785905.git.geert+renesas@glider.be
The GPIO pins connected to the 4 Software Switches ("SOFT_SW", SW2) do
not have external pull-up resistors, but rely on internal pull-ups being
enabled. Fortunately this is satisfied by the initial state of these
pins.
Make this explicit by enabling bias-pull-up, to remove the dependency on
initial state and/or boot loader configuration.
While at it, rename the surrounding device node from "gpio-keys" to
"keyboard", to comply with generic node name recommendations.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/1cdec892b1491309b12bdaf7bc8428b3a19b1ed5.1619785905.git.geert+renesas@glider.be
The GPIO pins connected to the 4 Software Switches (SW2) and the second
Tact Switch (SW25) do not have external pull-up resistors, but rely on
internal pull-ups being enabled. Fortunately this is satisfied by the
initial state of these pins.
Make this explicit by enabling bias-pull-up, to remove the dependency on
initial state and/or boot loader configuration.
Note that the GPIO pin connected to the first Tact Switch (SW24) does
have an external pull-up resistor.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/011e4c461767f2dd690b655b3dd501eb554184c1.1619785905.git.geert+renesas@glider.be
A number of sub-mailbox node names in various OMAP2+ dts files are
currently using underscores. This is not adhering to the node name
convention, fix all of these to use hiphens.
These nodes are already using the prefix mbox, so they will be in
compliance with the sub-mailbox node name convention being added in
the OMAP Mailbox YAML binding as well.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The OMAP sub-mailbox used to communicate with the Wakeup M3 remote
processor is currently named wkup_m3. This name can be confused with
the remote processor node. So, rename this to mbox-wkup-m3 to remove
the ambiguity and to also adhere to the sub-mailbox node name convention
being added in the OMAP Mailbox YAML binding.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The OMAP sub-mailbox used to communicate with the DSP and IVA remote
processors are currently named after the processor name. These can be
confused with the remote processors themselves. Rename them to remove
the ambiguity and use the prefix mbox to also adhere to the sub-mailbox
node name convention being added in the OMAP Mailbox YAML binding.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The interrupt-names property is neither defined nor used in either
of the OMAP Mailbox binding or the driver. So, drop them. This is
in preparation for converting the OMAP Mailbox binding to YAML
format.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
