Commit Graph

23274 Commits

Author SHA1 Message Date
Grygorii Strashko
c477358e66 ARM: dts: am335x-bone: switch to new cpsw switch drv
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, Switch BeagleBone boards to use new cpsw switch driver. Those boards
have or 2 Ext. port wired and configured in dual_mac mode by default, or
only 1 Ext. port.

For am335x-sancloud-bbe-common.dtsi also removed duplicated davinci_mdio DT
nodes which already defined in am335x-bone-common.dtsi.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06 09:26:51 +03:00
Grygorii Strashko
d22e0e1afa ARM: dts: am33xx: update ethernet aliases
Update ethernet aliases to point at CPSW switchdev driver.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06 09:25:38 +03:00
Grygorii Strashko
0a8eb8d7f0 ARM: dts: am335x-sl50: switch to new cpsw switch drv
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch Toby Churchill SL50 Series to use new cpsw switch driver.
Those boards have or 2 Ext. port wired and configured in dual_mac mode by
default, or only 1 Ext. port.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06 09:25:37 +03:00
Grygorii Strashko
a5cacca25e ARM: dts: am335x-shc: switch to new cpsw switch drv
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch Bosch SHC to use new cpsw switch driver.
Those boards have or 2 Ext. port wired and configured in dual_mac mode by
default, or only 1 Ext. port.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06 09:25:37 +03:00
Grygorii Strashko
a71c1446b5 ARM: dts: am335x-phycore: switch to new cpsw switch drv
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch Phytec AM335x phyCORE SOM, phyBOARD-WEGA, phyBOARD-REGOR,
PCM-953 to use new cpsw switch driver. Those boards have or 2 Ext. port
wired and configured in dual_mac mode by default, or only 1 Ext. port.

Cc: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06 09:25:37 +03:00
Grygorii Strashko
2bd4332705 ARM: dts: am335x-pepper: switch to new cpsw switch drv
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch Gumstix Pepper to use new cpsw switch driver.
Those boards have or 2 Ext. port wired and configured in dual_mac mode by
default, or only 1 Ext. port.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06 09:25:36 +03:00
Grygorii Strashko
a2f2cd466e ARM: dts: am335x-pdu001: switch to new cpsw switch drv
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch EETS,PDU001 to use new cpsw switch driver. Those boards have or
2 Ext. port wired and configured in dual_mac mode by default, or only 1
Ext. port.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06 09:25:36 +03:00
Grygorii Strashko
c2fe8276b3 ARM: dts: am335x-osd3358-sm-red: switch to new cpsw switch drv
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch Octavo Systems OSD3358-SM-RED to use new cpsw switch driver.
Those boards have or 2 Ext. port wired and configured in dual_mac mode by
default, or only 1 Ext. port.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06 09:25:35 +03:00
Grygorii Strashko
4c0b47f322 ARM: dts: am335x-myirtech: switch to new cpsw switch drv
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch MYIR MYC-AM335X/MYD-AM335X to use new cpsw switch driver. Those
boards have or 2 Ext. port wired and configured in dual_mac mode by
default, or only 1 Ext. port.

Cc: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06 09:25:35 +03:00
Grygorii Strashko
5578b73024 ARM: dts: am335x-moxa-uc: switch to new cpsw switch drv
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch Moxa am335x-moxa-uc-210x/8100 to use new cpsw switch driver.
Those boards have or 2 Ext. port wired and configured in dual_mac mode by
default, or only 1 Ext. port.

Cc: Johnson Chen <johnsonch.chen@moxa.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06 09:25:35 +03:00
Grygorii Strashko
843470ac18 ARM: dts: am335x-lxm: switch to new cpsw switch drv
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch NovaTech OrionLXm to use new cpsw switch driver. Those boards
have or 2 Ext. port wired and configured in dual_mac mode by default, or
only 1 Ext. port

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06 09:25:35 +03:00
Grygorii Strashko
45b2c44aa5 ARM: dts: am335x-igep0033: switch to new cpsw switch drv
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch am335x-igep0033 to use new cpsw switch driver. Those boards have
or 2 Ext. port wired and configured in dual_mac mode by default, or only 1
Ext. port.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06 09:25:34 +03:00
Grygorii Strashko
1d3e27982c ARM: dts: am335x-cm-t335: switch to new cpsw switch drv
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch CompuLab CM-T335 to use new cpsw switch driver. Those boards
have or 2 Ext. port wired and configured in dual_mac mode by default, or
only 1 Ext. port.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06 09:25:34 +03:00
Grygorii Strashko
17d03506dd ARM: dts: am335x-chiliboard: switch to new cpsw switch drv
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch AM335x Chiliboard to use new cpsw switch driver. Those boards
have or 2 Ext. port wired and configured in dual_mac mode by default, or
only 1 Ext. port.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06 09:25:33 +03:00
Grygorii Strashko
0a8c054def ARM: dts: am335x-nano: switch to new cpsw switch drv
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch Newflow AM335x NanoBone to use new cpsw switch driver. Those
boards have or 2 Ext. port wired and configured in dual_mac mode by
default, or only 1 Ext. port.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06 09:25:33 +03:00
Grygorii Strashko
1c7ba565e7 ARM: dts: am335x-baltos: switch to new cpsw switch drv
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch OnRISC Baltos and NetCom/Cam boards to use new cpsw switch
driver. Those boards have or 2 Ext. port wired and configured in dual_mac
mode by default, or only 1 Ext. port.

Cc: Yegor Yefremov <yegorslists@googlemail.com>
Cc: Christina Quast <cquast@hanoverdisplays.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06 09:25:33 +03:00
Matthew Hagan
f95c4c56d6 ARM: dts: qcom: add ahb reset to ipq806x-gmac
Add GMAC_AHB_RESET to the resets property of each gmac node.

Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Link: https://lore.kernel.org/r/20210605173546.4102455-2-mnhagan88@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05 09:24:37 -05:00
Linus Walleij
4cae3413c5 ARM: dts: qcom: Fix up APQ8060 DragonBoard license
This file is licensed in some kind of BSD manner, put it under
the combined GPL+BSD license like what the bindings use, it
seems most helpful.

I wrote the whole file so whatever. Those are my principles,
if you don't like them: I have others.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20210409124954.320529-1-linus.walleij@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05 09:24:37 -05:00
Bjorn Andersson
8822c0d49c ARM: dts: qcom: msm8974: castor: Add Bluetooth-related nodes
Castor has a BCM4339 attached to BLSP2 UART7, add the necessary nodes to
define the uart as well as the serdev BCM.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Julian Weigt <juw@posteo.de>
Link: https://lore.kernel.org/r/20210723202101.65371-2-juw@posteo.de
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05 09:24:33 -05:00
Craig Tatlor
b05f82b152 ARM: dts: qcom: msm8974: Add blsp2_uart7 for bluetooth on sirius
Signed-off-by: Craig Tatlor <ctatlor97@gmail.com>
Signed-off-by: Julian Weigt <juw@posteo.de>
Link: https://lore.kernel.org/r/20210723202101.65371-1-juw@posteo.de
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05 09:24:29 -05:00
Sebastian Reichel
cd7cd5b716 ARM: dts: imx53-ppd: Fix ACHC entry
PPD has only one ACHC device, which effectively is a Kinetis
microcontroller. It has one SPI interface used for normal
communication. Additionally it's possible to flash the device
firmware using NXP's EzPort protocol by correctly driving a
second chip select pin and the device reset pin.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20210802172309.164365-3-sebastian.reichel@collabora.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-08-05 14:29:27 +02:00
Krzysztof Kozlowski
6cad6db752 ARM: dts: exynos: add CPU topology to Exynos5422
Describe Exynos5422 CPU topology.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210731092409.31496-7-krzysztof.kozlowski@canonical.com
2021-08-05 09:24:04 +02:00
Krzysztof Kozlowski
a73d3069f6 ARM: dts: exynos: add CPU topology to Exynos5420
Describe Exynos5420 CPU topology.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210731092409.31496-6-krzysztof.kozlowski@canonical.com
2021-08-05 09:24:02 +02:00
Krzysztof Kozlowski
fa0c56dbc3 ARM: dts: exynos: add CPU topology to Exynos5260
Describe Exynos5260 CPU topology.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210731092409.31496-5-krzysztof.kozlowski@canonical.com
2021-08-05 09:24:00 +02:00
Krzysztof Kozlowski
fc6d5c9953 ARM: dts: exynos: add CPU topology to Exynos5250
Describe Exynos5250 CPU topology.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210731092409.31496-4-krzysztof.kozlowski@canonical.com
2021-08-05 09:23:56 +02:00
Krzysztof Kozlowski
1fb5b5b0dc ARM: dts: exynos: add CPU topology to Exynos4412
Describe Exynos4412 CPU topology.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210731092409.31496-3-krzysztof.kozlowski@canonical.com
2021-08-05 09:23:51 +02:00
Krzysztof Kozlowski
900dd07d13 ARM: dts: exynos: add CPU topology to Exynos4210
Describe Exynos4210 CPU topology.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210731092409.31496-2-krzysztof.kozlowski@canonical.com
2021-08-05 09:23:49 +02:00
Krzysztof Kozlowski
a2798e309f ARM: dts: exynos: add CPU topology to Exynos3250
Describe Exynos3250 CPU topology.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210731092409.31496-1-krzysztof.kozlowski@canonical.com
2021-08-05 09:23:48 +02:00
Frank Wunderlich
293cb6b0ea arm: dts: mt7623: increase passive cooling trip
MT7623/BPI-R2 has idle temperature after bootup from 48 degrees celsius
increase the passive trip temp threshold to not trottle CPU frequency at
this temperature

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20210725163451.217610-1-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-08-04 19:14:26 +02:00
Arnd Bergmann
8e816b9915 Merge tag 'at91-dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt
AT91 dt for 5.15:

- add sama7g5 SoC and associated evaluation kit, the sama7g5-ek
- adaptation of some DT for sama5d27 som1 ek, sama5d4 xplained and
  sama5d2 icp boards
- fixes to gpio and shutdown controller nodes for all boards

* tag 'at91-dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: at91: use the right property for shutdown controller
  ARM: dts: at91: sama5d2_icp: enable digital filter for I2C nodes
  ARM: dts: at91: sama5d4_xplained: change the key code of the gpio key
  ARM: dts: at91: add conflict note for d3
  ARM: dts: at91: add pinctrl-{names, 0} for all gpios
  ARM: dts: at91: sama5d27_som1_ek: enable ADC node
  ARM: dts: at91: sama5d4_xplained: Remove spi0 node
  dt-bindings: atmel-sysreg: add bindings for sama7g5
  ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek
  dt-bindings: ARM: at91: document sama7g5ek board

Link: https://lore.kernel.org/r/20210804085000.13233-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-04 14:31:32 +02:00
Arnd Bergmann
72ee3b4dc2 Merge tag 'ux500-dts-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt
Ux500 Device Tree updates for the v5.15 kernel cycle:

- New device trees for these mobile phones:
  - Samsung Gavini
  - Samsung Codina
  - Samsung Kyle
- Flag eMMC cards as non-SD non-SDIO to save time
- Link USB PHY to USB controller in the device tree
- Fix up the operating points to the actual clock frequencies

* tag 'ux500-dts-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
  ARM: dts: ux500: Adjust operating points to reality
  ARM: dts: ux500: Add a device tree for Kyle
  ARM: dts: ux500: Add devicetree for Codina
  ARM: dts: ux500: ab8500: Link USB PHY to USB controller node
  ARM: dts: ux500: Flag eMMCs as non-SDIO/SD
  ARM: dts: ux500: Add device tree for Samsung Gavini

Link: https://lore.kernel.org/r/CACRpkdbjBv5ywZZD8rK07d5sLcHsG8o4iYD-3jHO=HLg6-nKnA@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-04 14:30:29 +02:00
Arnd Bergmann
19c1eb3605 Merge tag 'omap-for-v5.14/fixes-rc5-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes
Fixes for omaps for v5.14-rc series

Some fixes for regressions and boot issues for various devices:

- Fix gpt12 system timer regression on earlier beagleboard revisions

- Fix potential NULL pointer access for omap_hwmod_get_pwrdm()

- Disable RNG on secure am335x variants as it's not accessible

- Fix flakey DCDC2 voltage causing hangs on am43x-epos-evm by reducing
  i2c0 bus speed for tps65218

- Fix typo for am437x-l4 can@0 node

- Fix omap5 regression caused by vdds_1v8_main fixed-regulator

* tag 'omap-for-v5.14/fixes-rc5-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  omap5-board-common: remove not physically existing vdds_1v8_main fixed-regulator
  ARM: dts: am437x-l4: fix typo in can@0 node
  ARM: dts: am43x-epos-evm: Reduce i2c0 bus speed for tps65218
  bus: ti-sysc: AM3: RNG is GP only
  ARM: omap2+: hwmod: fix potential NULL pointer access
  bus: ti-sysc: Fix gpt12 system timer issue with reserved status

Link: https://lore.kernel.org/r/pull-1627995895-406133@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-03 17:05:36 +02:00
Suman Anna
8c054cd281 ARM: dts: am57xx: Add PRUSS MDIO controller nodes
The PRUSSs on AM57xx SoCs contain an MDIO controller that can
be used to control external PHYs associated with the Industrial
Ethernet peripherals within each PRUSS. The MDIO module used
within the PRU-ICSS is an instance of the MDIO Controller used
in TI Davinci SoCs. The same bus frequency of 1 MHz is chosen as
the regular MDIO node.

The nodes are added in the common am57-pruss.dtsi file and enabled
by default, but are disabled in all the existing AM57xx board dts
files. These nodes need pinctrl lines, and so should be enabled
only on boards where they are actually wired and pinned out for
PRUSS Ethernet. Any new board dts file should disable these if
they are not sure.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-03 15:25:14 +03:00
Suman Anna
b8afeaee9d ARM: dts: am57xx: Add PRU-ICSS nodes
Add the DT nodes for the PRU-ICSS1 and PRU-ICSS2 processor subsystems
that are present on AM57xx family of SoCs. Each PRU-ICSS instance is
represented by a pruss node and other child nodes. The two PRU-ICSSs
are identical to each other. They are not supported on DRA7xx SoCs in
general, so the nodes are added under the respective interconnect target
module nodes in a common am57-pruss.dtsi file. The file is already
included only in the AM57xx related board files.

The PRU-ICSSs on AM57xx are very similar to the PRUSS in AM33xx and AM437x
except for variations in the RAM sizes and the number of interrupts coming
into the MPU INTC. The interrupt events into the PRU-ICSS also requires
programming of the corresponding crossbars properly.

The PRUSS subsystem node contains the entire address space. The various
sub-modules of the PRU-ICSS are represented as individual child nodes
(so platform devices themselves) of the PRUSS subsystem node. These
include the two PRU cores and the interrupt controller. All the Data
RAMs are represented within a child node of its own named 'memories'
without any compatible. The Real Time Media Independent Interface
controller (MII_RT), and the CFG sub-module are represented as syscon
nodes. The PRUSS CFG module has a clock mux for IEP clock, this clk
node is added under the CFG child node 'clocks'. The default source
for this mux clock is the ICSS_IEP_CLK clock.

The DT nodes use all standard properties. The regs property in the PRU
nodes define the addresses for the Instruction RAM, the Debug and Control
sub-modules for that PRU core. The firmware for each PRU core is defined
through a 'firmware-name' property.

The default names for the firmware images for each PRU core are defined
as follows (these can be adjusted either in derivative board dts files or
through sysfs at runtime if required):
    PRU-ICSS1 PRU0 Core: am57xx-pru1_0-fw
    PRU-ICSS1 PRU1 Core: am57xx-pru1_1-fw
    PRU-ICSS2 PRU0 Core: am57xx-pru2_0-fw
    PRU-ICSS2 PRU1 Core: am57xx-pru2_1-fw

Note:
1. There are few more sub-modules like the Industrial Ethernet Peripheral
   (IEPs), MDIO, UART, eCAP that do not have bindings and so will be added
   in the future.
2. The PRUSS INTC on AM57xx SoCs also connect the host interrupts 6 and 7
   as possible DMA events, so use the 'ti,irqs-reserved' property in
   derivative board dts files _if_ any of them should not be handled by
   the host OS.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-03 15:25:14 +03:00
Andrew F. Davis
670be468b3 ARM: dts: am4372: Add PRUSS MDIO controller node
The PRU-ICSS1 instance on AM437x SoCs has a MDIO sub-module that
can be used to control external PHYs associated with the Industrial
Ethernet peripherals within the PRUSS. The MDIO module used within
this PRU-ICSS is an instance of the MDIO Controller used in TI
Davinci SoCs. The same bus frequency of 1 MHz is chosen as the
regular MDIO node. Note that there is no MDIO node added to the
smaller PRU-ICSS0 instance as the MDIO pins are not pinned out.

The node is added and enabled in the common am4372.dtsi file by
default, and disabled in all the existing AM437x board dts files.
This node needs pinctrl lines, and so should be enabled only on
boards where they are actually wired and pinned out for PRUSS
Ethernet. Any new board dts file should disable these if they
are not sure.

Signed-off-by: Andrew F. Davis <afd@ti.com>
[s-anna@ti.com: fix reg address, add commit description]
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-03 15:25:13 +03:00
Suman Anna
0de8049ed4 ARM: dts: am4372: Add the PRU-ICSS0 DT node
The AM4376+ SoCs have a second smaller PRU-ICSS subsystem (PRUSS0) in
addition to the primary PRUSS1 instance. The PRUSS0 has less DRAM
per PRU, and no Shared DRAM among other minor differences. The IEP
and MII_RT modules even though present within the IP are not pinned
out.

This PRUSS0 instance has a weird SoC integration. It shares the same
L3 OCP interconnect interface with PRUSS1, and also shares its reset
line and clocks. Any external accesses from PRUSS0 requires the PRUSS1's
PRUSS_SYSCFG register to be programmed properly. That said, it is its
own IP instance (a cut-down version), and so it has been added as an
independent node (sibling node to PRUSS1 node) and a child node of the
corresponding PRUSS target module interconnect node. This allows the
PRUSS0 instance to be enabled/disabled independently of the PRUSS1
instance.

The nodes are added under the corresponding interconnect target module
node in the common am4372 dtsi file. The PRU-ICSS instances are not
supported on AM4372 SoC though in the AM437x family, so the interconnect
target module node should be disabled in any derivative board dts file that
uses AM4372 SoCs. The individual PRUSS node can be disabled in the
corresponding board dts file if desired.

The default names for the firmware images for each PRU core are defined
as follows (these can be adjusted either in derivative board dts files or
through sysfs at runtime if required):
     PRU-ICSS0 PRU0 Core: am437x-pru0_0-fw
     PRU-ICSS0 PRU1 Core: am437x-pru0_1-fw

Note:
1. There are few more sub-modules like the Industrial Ethernet Peripheral
   (IEP), eCAP, UART, that do not have bindings and so will be added in the
   future. Only UART is pinned out, so others should be added in disabled
   state if added.
2. The PRUSS0 INTC on AM437x SoCs routes the host interrupt 5 to the other
   PRUSS1, so it is already marked reserved through the 'ti,irqs-reserved'
   property.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-03 15:25:13 +03:00
Suman Anna
152b53b41d ARM: dts: am4372: Add the PRU-ICSS1 DT node
Add the DT node for the PRU-ICSS1 instance on the AM437x family of SoCs.
Each PRU-ICSS instance is represented by a pruss node and other child
nodes. The nodes are added under the interconnect target module node in
the common am4372 dtsi file. The PRU-ICSS instances are supported only
on AM4376+ SoCs though in the AM437x family, so the interconnect target
module node should be disabled in any derivative board dts file that
uses AM4372 SoCs.

The PRU-ICSS1 on AM437x is very similar to the PRUSS in AM33xx, except
for variations in the RAM sizes, bus addresses and the number of
interrupts coming into the MPU INTC (host interrupt 5 is routed to
the other PRUSS instead of MPU).

The PRUSS subsystem node contains the entire address space. The various
sub-modules of the PRU-ICSS are represented as individual child nodes
(so platform devices themselves) of the PRUSS subsystem node. These
include the two PRU cores and the interrupt controller. All the Data
RAMs are represented within a child node of its own named 'memories'
without any compatible. The Real Time Media Independent Interface
controller (MII_RT), and the CFG sub-module are represented as syscon
nodes. The PRUSS CFG module has a clock mux for IEP clock, this clk
node is added under the CFG child node 'clocks'. The default source
for this mux clock is the PRU_ICSS_IEP_GCLK clock.

The DT nodes use all standard properties. The regs property in the PRU
nodes define the addresses for the Instruction RAM, the Debug and Control
sub-modules for that PRU core. The firmware for each PRU core is defined
through a 'firmware-name' property.

The default names for the firmware images for each PRU core are defined
as follows (these can be adjusted either in derivative board dts files
or through sysfs at runtime if required):
     PRU-ICSS1 PRU0 Core: am437x-pru1_0-fw
     PRU-ICSS1 PRU1 Core: am437x-pru1_1-fw

Note:
1. There are few more sub-modules like the Industrial Ethernet Peripheral
   (IEP), MDIO, UART, eCAP that do not have bindings and so will be added
   in the future.
2. The PRUSS INTC on AM437x SoCs also connect the host interrupt 0 to ADC0
   and ADC1; 6 and 7 as possible DMA events, so use the 'ti,irqs-reserved'
   property in derivative board dts files _if_ any of them should not be
   handled by the host OS. Host interrupt 5 is already marked reserved as
   it is connected to the other PRUSS instance.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-03 15:25:12 +03:00
Suman Anna
8668711b00 ARM: dts: am335x-icev2: Enable PRU-ICSS module
The PRU-ICSS target module node was left in disabled state in the
base am33xx-l4.dtsi file. PRU-ICSS is supported on the AM335x ICEv2
board, so enable this node to support PRUSS on this board. The PRUSS
node and most of its child nodes are already enabled in the base dts
file, and so become effective automatically with the enabling of
this PRU-ICSS target module node.

The corresponding PRU nodes can be disabled later on if there are
no use-cases defined to use a particular PRU core or the whole
PRU-ICSS subsystem itself if both its PRU cores are unused.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-03 15:25:11 +03:00
Suman Anna
7acf5661b6 ARM: dts: am335x-evmsk: Enable PRU-ICSS module
The PRU-ICSS target module node was left in disabled state in the
base am33xx-l4.dtsi file. PRU-ICSS is supported on the AM335x SK
EVM board, so enable this node to support PRUSS on this board. The
PRUSS node and most of its child nodes are already enabled in the
base dts file, and so become effective automatically with the
enabling of this PRU-ICSS target module node.

The corresponding PRU nodes can be disabled later on if there are
no use-cases defined to use a particular PRU core or the whole
PRU-ICSS subsystem itself if both its PRU cores are unused.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-03 15:25:11 +03:00
Suman Anna
6bcf2b67e0 ARM: dts: am335x-evm: Enable PRU-ICSS module
The PRU-ICSS target module node was left in disabled state in the
base am33xx-l4.dtsi file. PRU-ICSS is supported on the AM335x EVM,
so enable this node on the AM335x EVM. The PRUSS node and most of
its child nodes are already enabled in the base dts file, and so
become effective automatically with the enabling of this PRU-ICSS
target module node.

The corresponding PRU nodes can be disabled later on if there are
no use-cases defined to use a particular PRU core or the whole
PRU-ICSS subsystem itself if both its PRU cores are unused.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-03 15:25:10 +03:00
Suman Anna
7c6a0fdcd4 ARM: dts: am335x-bone-common: Enable PRU-ICSS node
The PRU-ICSS target module node was left in disabled state in the base
am33xx-l4.dtsi file. Enable this node on all the AM335x beaglebone
boards as they mostly use a AM3358 or a AM3359 SoC which do contain
the PRU-ICSS IP. The PRUSS node and most of its child nodes are already
enabled in the base dts file, and so become effective automatically
with the enabling of this PRU-ICSS target-module node.

The corresponding PRU nodes can be disabled later on if there are
no use-cases defined to use a particular PRU core or the whole
PRU-ICSS subsystem itself if both its PRU cores are unused.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-03 15:25:09 +03:00
Suman Anna
984ba7ee45 ARM: dts: am33xx-l4: Add PRUSS MDIO controller node
The PRUSS on AM335x SoCs has a MDIO sub-module that can be used
to control external PHYs associated with the Industrial Ethernet
peripherals within the PRUSS. The MDIO module used within the
PRU-ICSS is an instance of the MDIO Controller used in TI Davinci
SoCs. The same bus frequency of 1 MHz is chosen as the regular
MDIO node.

The node is added to the common am33xx-l4.dtsi file and is disabled.
This needs to be enabled in the respective board files using the
relevant AM335x SoCs supporting PRUSS and where the ethernet is
pinned out and connected properly.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-03 15:25:09 +03:00
Suman Anna
9b694bea4b ARM: dts: am33xx-l4: Add PRUSS node
Add the DT nodes for the PRU-ICSS on AM33xx family of SoCs. The AM33xx
SoCs contain a single PRU-ICSS instance and is represented by a pruss
node and other child nodes. PRU-ICSS is supported only on AM3356+ SoCs
though in the AM33xx family, so the nodes are added under the
corresponding disabled interconnect target module node in the common
am33xx-l4 dtsi file. The target module node should be enabled in only
those derivative board files that use a SoC containing PRU-ICSS.

The PRUSS subsystem node contains the entire address space. The various
sub-modules of the PRU-ICSS are represented as individual child nodes
(so platform devices themselves) of the PRUSS subsystem node. These
include the two PRU cores and the interrupt controller. All the Data
RAMs are represented within a child node of its own named 'memories'
without any compatible. The Real Time Media Independent Interface
controller (MII_RT), and the CFG sub-module are represented as syscon
nodes. The PRUSS CFG module has a clock mux for IEP clock, this clk
node is added under the CFG child node 'clocks'. The default source
for this mux clock is the PRU_ICSS_IEP_GCLK clock.

The DT nodes use all standard properties. The regs property in the PRU
nodes define the addresses for the Instruction RAM, the Debug and Control
sub-modules for that PRU core. The firmware for each PRU core is defined
through a 'firmware-name' property.

The default names for the firmware images for each PRU core are defined
as follows (these can be adjusted either in derivative board dts files
or through sysfs at runtime if required):
     PRU-ICSS PRU0 Core: am335x-pru1_0-fw
     PRU-ICSS PRU1 Core: am335x-pru1_1-fw

Note:
1. There are few more sub-modules like the Industrial Ethernet Peripheral
   (IEP), MDIO, UART, eCAP that do not have bindings and so will be added
   in the future.
2. The PRUSS INTC on AM335x SoCs also connect the host interrupts 0 to
   TSC_ADC; 6 and 7 as possible DMA events, so use the 'ti,irqs-reserved'
   property in derivative board dts files _if_ any of them should not be
   handled by the host OS.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-03 15:25:08 +03:00
Steven Lee
dbc9776532 ARM: dts: aspeed-g5: Remove ngpios from sgpio node.
Remove ngpios property from sgpio node as it should be defined in the
platform dts.

Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20210712100317.23298-5-steven_lee@aspeedtech.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-08-03 15:22:39 +09:30
Steven Lee
09eccdc9eb ARM: dts: aspeed-g6: Add SGPIO node.
AST2600 supports 2 SGPIO master interfaces one with 128 pins another one
with 80 pins.

Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
Link: https://lore.kernel.org/r/20210712100317.23298-4-steven_lee@aspeedtech.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-08-03 15:22:39 +09:30
Arnd Bergmann
272614ec1b Merge tag 'renesas-arm-dt-for-v5.15-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.15

  - Switches support for the Draak and Ebisu development boards,
  - I2C support on RZ/G2L,
  - I2C EEPROM support on the Ebisu development board,
  - Sound support for the R-Car D3 SoC and the Draak development board,
  - Support for the new R-Car H3e-2G and M3e-2G SoCs on the Salvator-XS
    and ULCB development boards,
  - IOMMU support for DMAC, EtherAVB, and SDHI on the R-Car M3-W+ SoC,
  - Miscellaneous fixes and improvements.

* tag 'renesas-arm-dt-for-v5.15-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (29 commits)
  arm64: dts: renesas: r8a77961: Add iommus to ipmmu_ds[01] related nodes
  arm64: dts: renesas: Add support for M3ULCB+Kingfisher with R-Car M3e-2G
  arm64: dts: renesas: Add support for M3ULCB with R-Car M3e-2G
  arm64: dts: renesas: Add support for Salvator-XS with R-Car M3e-2G
  arm64: dts: renesas: Add support for H3ULCB+Kingfisher with R-Car H3e-2G
  arm64: dts: renesas: Add support for H3ULCB with R-Car H3e-2G
  arm64: dts: renesas: Add support for Salvator-XS with R-Car H3e-2G
  arm64: dts: renesas: Add Renesas R8A779M3 SoC support
  arm64: dts: renesas: Add Renesas R8A779M1 SoC support
  arm64: dts: renesas: hihope-rzg2-ex: Add EtherAVB internal rx delay
  arm64: dts: renesas: r8a77995: draak: Add R-Car Sound support
  arm64: dts: renesas: r8a77995: Add R-Car Sound support
  arm64: dts: renesas: rcar-gen3: Add SoC model to comment headers
  arm64: dts: renesas: r8a77990: ebisu: Add I2C EEPROM for PMIC
  arm64: dts: renesas: r8a77995: draak: Remove bogus adv7511w properties
  arm64: dts: renesas: beacon: Enable micbias
  arm64: dts: renesas: r9a07g044: Add I2C nodes
  arm64: dts: renesas: r8a779a0: Restore sort order
  arm64: dts: renesas: r8a77990: ebisu: Add SW4 support
  arm64: dts: renesas: r8a77995: draak: Add SW56 support
  ...

Link: https://lore.kernel.org/r/cover.1627650696.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-02 15:23:22 +02:00
Cristian Ciocaltea
062f82a0b7 ARM: dts: owl-s500-roseapplepi: Add ethernet support
Add pinctrl configuration for enabling the Ethernet MAC on RoseapplePi
SBC. Additionally, provide the necessary properties for the generic S500
ethernet node in order to setup PHY and MDIO.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/d0e1fbf81984127f0352eb740c7129424b5e40f9.1623401998.git.cristian.ciocaltea@gmail.com
Link: https://lore.kernel.org/r/20210628072817.8269-3-mani@kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-02 15:22:55 +02:00
Cristian Ciocaltea
df5060dce7 ARM: dts: owl-s500: Add ethernet support
Add Ethernet MAC device tree node for Actions Semi S500 SoC.

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/222ee0c2cb431619f558dce9726585ac92f65e00.1623401998.git.cristian.ciocaltea@gmail.com
Link: https://lore.kernel.org/r/20210628072817.8269-2-mani@kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-02 15:22:55 +02:00
Arnd Bergmann
b07bf042e6 Merge tag 'stm32-dt-for-v5.14-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/fixes
STM32 DT fixes for v5.14, round 1

Highlights:
-----------

 -Fixes are for DHCOM/DHCOR boards:
  - Set HW RTC ad default RTC
  - Disable EDPD LAN8710 feature as it is not a stable feature.
  - Fix touchscreen IRQ line assignment

* tag 'stm32-dt-for-v5.14-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  ARM: dts: stm32: Fix touchscreen IRQ line assignment on DHCOM
  ARM: dts: stm32: Disable LAN8710 EDPD on DHCOM
  ARM: dts: stm32: Prefer HW RTC on DHCOM SoM

Link: https://lore.kernel.org/r/c0b6031b-2de7-2ef8-71b2-a0af8f475932@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-02 14:37:14 +02:00
Arnd Bergmann
bee7574851 Merge tag 'imx-fixes-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.14:

- A couple of fixes on MMDC driver to add missing iounmap() and
  clk_disable_unprepare(), and a follow-up fix.
- Fix missing-prototypes warning in SRC driver.
- Revert commit 7d981405d0 ("soc: imx8m: change to use platform
  driver"), which breaks i.MX8M system that has CAAM driver enabled.
- One fix on imx53-m53menlo pinctrl configuration.
- Increase the PHY reset duration for imx6qdl-sr-som to fix intermittent
  issues where the PHY would be unresponsive every once in a while.
- Add missing flag for in-band signalling between PHY and MAC on
  kontron-sl28-var2 board to fix network support.
- Limit the SDIO Clock on Colibri iMX6ULL to 25MHz for fixing wireless
  noise issue.
- Fix sysclk node name for LS1028A so that U-Boot is able to update the
  "clock-frequency" property.

* tag 'imx-fixes-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: dts: imx: Swap M53Menlo pinctrl_power_button/pinctrl_power_out pins
  ARM: imx: fix missing 3rd argument in macro imx_mmdc_perf_init
  ARM: dts: colibri-imx6ull: limit SDIO clock to 25MHz
  arm64: dts: ls1028: sl28: fix networking for variant 2
  Revert "soc: imx8m: change to use platform driver"
  ARM: dts: imx6qdl-sr-som: Increase the PHY reset duration to 10ms
  ARM: imx: common: Move prototype outside the SMP block
  ARM: imx: add missing clk_disable_unprepare()
  ARM: imx: add missing iounmap()
  arm64: dts: ls1028a: fix node name for the sysclk

Link: https://lore.kernel.org/r/20210726023221.GF5901@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-02 14:33:45 +02:00