Ben Skeggs
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f7cc47e436
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drm/nouveau/fifo/gm200-: read pbdma count more directly
The trick we used (and still use for older GPUs) doesn't work on Turing.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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2018-12-11 15:37:48 +10:00 |
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Ben Skeggs
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fb80ad15f8
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drm/nouveau/fifo/gk104-: group pbdma functions together
We're about to be adding more of them.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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2018-12-11 15:37:48 +10:00 |
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Ben Skeggs
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eda12417d3
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drm/nouveau/fifo/gm107-: write instance address in channel runlist entry
RM does this for some reason.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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2018-05-18 15:01:22 +10:00 |
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Ben Skeggs
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79bb4b617f
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drm/nouveau/fifo/gk208-: write pbdma timeout regs during initialisation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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2018-05-18 15:01:22 +10:00 |
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Ben Skeggs
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8c4e9f9dff
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drm/nouveau/fifo/gk110-: support writing channel group runlist entries
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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2018-05-18 15:01:22 +10:00 |
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Ben Skeggs
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665870837a
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drm/nouveau/fifo/gk104-: add interfaces to support different runlist layouts
This will be required to support features on newer hardware.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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2018-05-18 15:01:21 +10:00 |
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Ben Skeggs
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f9360c3aa6
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drm/nouveau/fifo/gk104-: simplify definition of channel classes
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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2018-05-18 15:01:21 +10:00 |
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Ben Skeggs
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ddc669e256
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drm/nouveau/fifo/gk104-: allow fault recovery code to be called by other subdevs
This will be required to support Volta.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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2018-05-18 15:01:21 +10:00 |
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Ben Skeggs
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0cdc3fdfb7
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drm/nouveau/fifo/gm107-: remove engines from mmu engine mapping array
These are specified by PTOP on Maxwell GPUs.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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2016-05-20 14:43:04 +10:00 |
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Ben Skeggs
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91419acf78
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drm/nouveau/fifo/gk104-: abstract mmu fault data structures
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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2016-05-20 14:43:04 +10:00 |
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Ben Skeggs
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98ac3f061a
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drm/nouveau/fifo/gk104-: subclass func
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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2016-05-20 14:43:04 +10:00 |
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Ben Skeggs
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db1eb52846
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drm/nouveau: s/gm204/gm200/ in a number of places
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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2016-03-14 10:13:12 +10:00 |
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Ben Skeggs
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13de7f4629
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drm/nouveau/fifo: convert to new-style nvkm_engine
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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2015-08-28 12:40:46 +10:00 |
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Alexandre Courbot
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3326060a17
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drm/nouveau/fifo: add GM20B fifo
GM20B has a 512-channels FIFO similar to GK104.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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2015-08-28 12:40:02 +10:00 |
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