To avoid a recently added warning:
Bogus possible_crtcs: [ENCODER:65:TMDS-65] possible_crtcs=0xf (full crtc mask=0x7)
WARNING: CPU: 3 PID: 439 at drivers/gpu/drm/drm_mode_config.c:617 drm_mode_config_validate+0x178/0x200 [drm]
In this case the warning is harmless, but confusing to users.
Bug: https://bugzilla.kernel.org/show_bug.cgi?id=209123
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_helpers.c: In function ‘dm_dtn_log_append_v’:
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_helpers.c:345:2: warning: function ‘dm_dtn_log_append_v’ might be a candidate for ‘gnu_printf’ format attribute [-Wsuggest-attribute=format]
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_helpers.c:375:3: warning: function ‘dm_dtn_log_append_v’ might be a candidate for ‘gnu_printf’ format attribute [-Wsuggest-attribute=format]
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Leo Li <sunpeng.li@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Christian König" <christian.koenig@amd.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.c:538:6: warning: no previous prototype for ‘pp_rv_set_wm_ranges’ [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.c:590:6: warning: no previous prototype for ‘pp_rv_set_pme_wa_enable’ [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.c:601:6: warning: no previous prototype for ‘pp_rv_set_active_display_count’ [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.c:614:6: warning: no previous prototype for ‘pp_rv_set_min_deep_sleep_dcfclk’ [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.c:627:6: warning: no previous prototype for ‘pp_rv_set_hard_min_dcefclk_by_freq’ [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.c:640:6: warning: no previous prototype for ‘pp_rv_set_hard_min_fclk_by_freq’ [-Wmissing-prototypes]
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Leo Li <sunpeng.li@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Christian König" <christian.koenig@amd.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_color.c:128: warning: Function parameter or member 'lut' not described in '__drm_lut_to_dc_gamma'
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_color.c:128: warning: Function parameter or member 'gamma' not described in '__drm_lut_to_dc_gamma'
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_color.c:128: warning: Function parameter or member 'is_legacy' not described in '__drm_lut_to_dc_gamma'
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_color.c:426: warning: Function parameter or member 'dc_plane_state' not described in 'amdgpu_dm_update_plane_color_mgmt'
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Leo Li <sunpeng.li@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Christian König" <christian.koenig@amd.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
Whenever DSC parameters are changed we need to perform full modeset to commit
DSC changes to DC.
[How]
If dsc_force_changed is set, need to set mode_changed on new CRTC state
Signed-off-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Mikita Lipski <Mikita.Lipski@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
The DSCL memory blocks should be powered down when they're not in use.
This will reduce power consumption.
[How]
1. Write to DSCL_MEM_PWR_FORCE to put memory to shutdown when DSCL is not
used.
2. Added a debug option to allow this behaviour to be turned off
Signed-off-by: Jacky Liao <ziyu.liao@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
While booting into OS, driver updates DPP/DISP CLKs.
But init clock value is zero which is invalid.
[How]
Get current clocks value to update init clocks.
To avoid underflow.
Signed-off-by: Brandon Syu <Brandon.Syu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
enable_link_dp_mst checks that cur_link_settings != unknown to determine
that the link is already enabled, to skip redundant enablement calls for
multiple streams on the same link. During dc_reinitialize_hardware,
cur_link_settings on previously-active links is not cleared, which blocks
MST links from being re-enabled after a reinitialization.
[How]
- check for link_status->link_active instead, as it's the real intent
- clear cur_link_settings when we clear link_active
Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
dram clock change latencies get updated using ddr4 latency table, but
does that update does not happen before validation. This value
should not be the default and should be number received from
df for better mode support.
This may cause a PState hang on high refresh panels with short vblanks
such as on 1080p 360hz or 300hz panels.
[HOW]
Update latency from 23.84 to 11.72.
Signed-off-by: Sung Lee <sung.lee@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
The HDR3DLUT and SHAPER memory blocks should be powered down when
they're not in use. This will reduce power consumption.
[How]
1. Write to HDR3DLUT_MEM_PWR_FORCE to put memory to shutdown
when HDR3DLUT is not used.
2. Write to SHAPER_MEM_PWR_FORCE to put memory to shutdown
when SHAPER is not used.
Signed-off-by: Jacky Liao <ziyu.liao@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why&How]
Set dpms off on the connector that was unplugged, for the side effect of
releasing some references held through deallocation of MST payload. This is
the expected behaviour for non MST devices as well.
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Eryk Brol <eryk.brol@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why&How]
Recent changes to upstream mst code remove the callback which
cleared the internal state for mst. Move the missing functionality
that was previously called through the destroy call back for mst connector
destroy
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Eryk Brol <eryk.brol@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Setting any rotation on the cursor plane is ignored by amdgpu.
Because of DCE/DCN design, it's not possible to rotate the cursor.
Instead of displaying the wrong result, stop advertising the rotation
property for the cursor plane.
Now that we check all cursor plane properties in amdgpu_dm_atomic_check,
remove the TODO.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Simon Ser <contact@emersion.fr>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Harry Wentland <hwentlan@amd.com>
Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This patch expands the cursor checks added in "drm/amd/display: add basic
atomic check for cursor plane" to also include a FB size check. Without
this patch, setting a FB smaller than max_cursor_size with an invalid
width would result in amdgpu error messages and a fallback to a 64-byte
width:
[drm:hubp1_cursor_set_attributes [amdgpu]] *ERROR* Invalid cursor pitch of 100. Only 64/128/256 is supported on DCN.
Note that DC uses the word "pitch" when actually checking the FB width.
Indeed, the function handle_cursor_update does this:
attributes.pitch = attributes.width;
In my tests, the cursor FB actually had a pitch of 512 bytes.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Simon Ser <contact@emersion.fr>
Reported-by: Pierre-Loup A. Griffais <pgriffais@valvesoftware.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Harry Wentland <hwentlan@amd.com>
Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
Cached backlight is never being updated since panel_cntl specific
registers were moved from abm to panel_cntl.
[How]
Update cached backlight in set_abm_immediate_disable as what we used to
do. Also, update the priority of backlight restore mechanism so that
cached backlight has the highest priority since it is always correct.
Signed-off-by: Camille Cho <Camille.Cho@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
The GAMCOR memory blocks should be powered down when they're not in use.
This will reduce power consumption.
[How]
Write to GAMCOR_MEM_PWR_FORCE to put memory to shutdown
when GAMCOR is not used.
Signed-off-by: Jacky Liao <ziyu.liao@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
The BLNDGAM memory blocks should be powered down when they're not in
use. This will reduce power consumption.
[How]
1. Write to BLNDGAM_MEM_PWR_FORCE to put memory to shutdown when BLNDGAM
is not used.
2. Added a debug option to allow this behaviour to be turned off
Signed-off-by: Jacky Liao <ziyu.liao@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
t9 delay func is called twice after setting power off, the unexpected
action results in a doubling of the added 140ms t9 delay
[How]
If the backlight has been turned off, does not turn it off again
Signed-off-by: Sherry <Yao.Wang1@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
The MPCC may change and request data when the pipes are switching from 2
to 1 or 1 to 2. During the switch there is a possibility of underflow
and flicker/missing data.
[How]
During VBlank the MPCC won't request data. The trick is to delay and
wait on VBlank, ONLY when pipes are either turning on or off, right
before MPCC is reset for the pipes.
Signed-off-by: Tashfique Abdullah <tabdullah@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
On some platforms, DMCU is no longer used. In these cases, some DMCU
memory should be completely powered off to save power.
[How]
1. Set DMCU_ERAM_MEM_PWR_FORCE to shutdown memory when DMCU is not in
use
2. Added a debug option to allow this behaviour to be turned off
3. Set all memory low power debug options to off first, to not
immediately cause problems
Signed-off-by: Jacky Liao <ziyu.liao@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
Incorrect panel register settings are applied for power sequence because
the register macro is not defined in resource.
[How]
Implement same register space to future resource files.
Signed-off-by: Chris Park <Chris.Park@amd.com>
Reviewed-by: Joshua Aberback <Joshua.Aberback@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[why]
HDCP 1.4 failed on SL8800 SW w/a test driver use.
[how]
slower down the HW i2c speed when used by HW i2c.
this request: each acquired_i2c_engine setup the i2c speed needed.
and set the I2c engine for HDCP use at release_engine.
this covers SW using HW I2c engine and HDCP using HW I2c engine. for
dmcu using HW I2c engine, needs add similar logic in dmcufw.
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Reviewed-by: Chris Park <Chris.Park@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
In preparation to enable -Wimplicit-fallthrough for Clang, fix multiple
warnings by explicitly adding multiple break statements instead of just
letting the code fall through to the next case.
Link: https://github.com/KSPP/linux/issues/115
Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
