Commit Graph

2069 Commits

Author SHA1 Message Date
Alex Deucher
e1188aacad drm/amdgpu/smu11: add support for SMU AC/DC interrupts
Driver needs to send the ack message when it receives the
AC/DC interrupt from the SMU.

TODO: verify the client and src ids.

Bug: https://gitlab.freedesktop.org/drm/amd/issues/1043
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-25 17:00:11 -04:00
Alex Deucher
9644bf5f4a drm/amdgpu/swSMU: handle manual AC/DC notifications
For boards that do not support automatic AC/DC transitions
in firmware, manually tell the firmware when the status
changes.

Bug: https://gitlab.freedesktop.org/drm/amd/issues/1043
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-25 17:00:11 -04:00
Alex Deucher
f5cdd2bdd9 drm/amdgpu/swSMU: handle DC controlled by GPIO for navi1x
Check the platform caps in the vbios pptable to decide
whether to enable automatic AC/DC transitions.

Bug: https://gitlab.freedesktop.org/drm/amd/issues/1043
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-25 17:00:11 -04:00
Alex Deucher
75610fdd38 drm/amdgpu/swSMU: set AC/DC mode based on the current system state (v2)
Check of the pointer exists and we are actually on AC power.

v2: fix error message to reflect AC/DC mode.

Bug: https://gitlab.freedesktop.org/drm/amd/issues/1043
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-25 17:00:11 -04:00
Evan Quan
66c2f5db1f drm/amdgpu/swSMU: correct the bootup power source for Navi1X (v2)
PMFW may boots those ASICs with DC mode. Need to set it back
to AC mode.

v2: split from Evan's original patch (Alex)

Bug: https://gitlab.freedesktop.org/drm/amd/issues/1043
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-25 17:00:11 -04:00
Alex Deucher
fa34520c95 drm/amdgpu/swSMU: use the smu11 power source helper for navi1x
The smu_v11_0 version works for navi1x.

Bug: https://gitlab.freedesktop.org/drm/amd/issues/1043
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-25 17:00:11 -04:00
Alex Deucher
f8c83215bf drm/amdgpu/smu11: add a helper to set the power source
Add a common smu11 helper to set the AC/DC power source.

Bug: https://gitlab.freedesktop.org/drm/amd/issues/1043
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-25 17:00:11 -04:00
Evan Quan
2c02b38a10 drm/amd/swSMU: add callback to set AC/DC power source (v2)
This is needed to tell the SMU firmware what state is in
in certain cases.  DC mode does not allow overclocking
for example.

v2: split Evan's original patch (Alex)

Bug: https://gitlab.freedesktop.org/drm/amd/issues/1043
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-25 17:00:11 -04:00
John Clements
8e025615cf amd/powerplay: arcturus baco reset disable all features
issue smu cmd to disable all features upon baco entry for arcturus

to mitigate potential dirty I2C controller on boot

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-19 00:03:05 -04:00
Andrey Grodzovsky
9015d60c9e drm/amdgpu: Move EEPROM I2C adapter to amdgpu_device
Puts the i2c adapter in common place for sharing by RAS
and upcoming data read from FRU EEPROM feature.

v2:
Move i2c adapter to amdgpu_pm and rename it.

v3: Move i2c adapter init to ASIC specific code and get rid
of the switch case in amdgpu_device

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-16 16:21:32 -04:00
Kevin Wang
f88ef3ca86 drm/amdgpu/swsmu: clean up unused header in swsmu
clean up unused header in swsmu driver stack:
1. pp_debug.h
2. amd_pcie.h
3. soc15_common.h

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-13 11:52:36 -04:00
Joe Perches
3738de3474 drm/amd/powerplay: Move fallthrough; into containing #ifdef/#endif
The automated conversion of /* fallthrough */ comments converted
a comment outside of an #ifdef/#endif case block that should be
inside the block.

Move the fallthrough inside the block to silence the warning.

Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-13 11:52:35 -04:00
Joe Perches
45ce19eb8f AMD POWERPLAY: Use fallthrough;
Convert the various uses of fallthrough comments to fallthrough;

Done via script
Link: https://lore.kernel.org/lkml/b56602fcf79f849e733e7b521bb0e17895d390fa.1582230379.git.joe@perches.com/

Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-13 11:52:34 -04:00
Prike Liang
7bef6ea972 drm/amd/powerplay: fix the coverity warning about negative check for an unsigned value
There will be a coverity warning because min and max are both unsigned.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-10 15:54:56 -04:00
Xiaojie Yuan
c1b6921209 drm/amd/powerplay: add smu if version for navi12
Fix version for navi12.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-09 13:51:08 -04:00
Prike Liang
781345f9ef drm/amd/powerplay: map mclk to fclk for COMBINATIONAL_BYPASS case
When hit COMBINATIONAL_BYPASS the mclk will be bypass and can export
fclk frequency to user usage.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-05 00:32:16 -05:00
Prike Liang
ffbed184d2 drm/amd/powerplay: fix pre-check condition for setting clock range
This fix will handle some MP1 FW issue like as mclk dpm table in renoir has a reverse
dpm clock layout and a zero frequency dpm level as following case.

cat pp_dpm_mclk
0: 1200Mhz
1: 1200Mhz
2: 800Mhz
3: 0Mhz

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-05 00:32:05 -05:00
Chengming Gui
0cf64555fe drm/amdgpu: Add debugfs interface to set arbitrary sclk for navi14 (v2)
add debugfs interface amdgpu_force_sclk
to set arbitrary sclk for navi14

v2: Add lock

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-05 00:27:50 -05:00
Chengming Gui
31faff1a1c drm/amdgpu: add lock option for smu_set_soft_freq_range()
Add lock_needed param for smu_set_soft_freq_range()

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-05 00:27:38 -05:00
Matt Coffin
eb696d041f drm/amdgpu/smu: Add message sending lock
This adds a message lock to the smu_send_smc_msg* implementations to
protect against concurrent access to the mmu registers used to
communicate with the SMU

v2: Implement for smu_v12_0 as well

v3: Add mutex_init for message_lock

Signed-off-by: Matt Coffin <mcoffin13@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-28 16:59:23 -05:00
Matt Coffin
ae458c7b9d drm/amdgpu/powerplay: Remove deprecated smc_read_arg
The new interface reads the argument in the call to send the message, so
this is no longer needed, and shouldn't be used for concurrency safety
reasons.

Signed-off-by: Matt Coffin <mcoffin13@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-28 16:59:23 -05:00
Matt Coffin
1c58267cbe drm/amdgpu/powerplay: Refactor SMU message handling for safety
Move the responsibility for reading argument registers into the
smu_send_smc_msg* implementations, so that adding a message-sending lock
to protect the SMU registers will result in the lock still being held
when the argument is read.

v2: transition smu_v12_0, it's asics, and vega20

Signed-off-by: Matt Coffin <mcoffin13@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-28 16:59:23 -05:00
Hersen Wu
2622e2ae27 drm/amdgpu/powerplay: nv1x, renior copy dcn clock settings of watermark to smu during boot up
dc to pplib interface is changed for navi1x, renoir.
display_config_changed is not called by dc anymore.
smu_write_watermarks_table is not executed for navi1x, renoir
during boot up.

solution: call smu_write_watermarks_table just after dc pass
watermark clock settings to pplib

Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-28 16:59:22 -05:00
Hawking Zhang
7af8bc5016 drm/amd/powerplay: add DFCstate control pptable func for arct
This is the callback function that is going to be invoked
when amdgpu_dpm_set_df_cstate is called to toggle DFCstate

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-26 14:20:57 -05:00
Hawking Zhang
41a468a531 drm/amd/powerplay: update arcturus ppsmc header to 54.15.0
two new smc messages added for arcturus with pmfw 54.15.0

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-26 14:20:49 -05:00
Chen Zhou
4302c9c13a drm/amd/powerplay: Use bitwise instead of arithmetic operator for flags
This silences the following coccinelle warning:

"WARNING: sum of probable bitmasks, consider |"

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Chen Zhou <chenzhou10@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-26 14:17:33 -05:00
Monk Liu
9cfb06920e drm/amdgpu: fix memory leak during TDR test(v2)
fix system memory leak

v2:
fix coding style

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-25 11:01:25 -05:00
Evan Quan
c16904b0f3 drm/amd/powerplay: correct the way for checking SMU_FEATURE_BACO_BIT support
Since 'smu_feature_is_enabled(smu, SMU_FEATURE_BACO_BIT)' will always return
false considering the 'smu_system_features_control(smu, false)' disabled
all SMU features.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-13 16:16:45 -05:00
Kent Russell
00151afc6f drm/powerplay: Ratelimit PP_ASSERT warnings
In certain situations the message could be reported dozens-to-hundreds of
times, based on how often the function is called.
E.g. If MCLK DPM, any calls to get/set MCLK will result in a failure
message, potentially flooding dmesg. Ratelimit the warnings to avoid
this flood.

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-12 16:04:31 -05:00
Evan Quan
79275af61e drm/amd/powerplay: always refetch the enabled features status on dpm enablement
Otherwise, the cached dpm features status may be inconsistent under some
case(e.g. baco reset of Navi asic).

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-12 16:04:18 -05:00
Alex Deucher
d7c7195466 drm/amdgpu/powerplay: fix baco check for vega20
We need to handle the runpm case as well as GPU reset.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11 11:51:58 -05:00
Alex Deucher
5d8b936df2 drm/amdgpu/smu: properly handle runpm/suspend/reset
We need some special handling when using baco vs. other
things.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11 11:51:55 -05:00
Alex Deucher
0a28eee97b drm/amdgpu:/navi10: use the ODCAP enum to index the caps array
Rather than the FEATURE_ID flags.  Avoids a possible reading past
the end of the array.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Reported-by: Aleksandr Mezin <mezin.alexander@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11 11:51:49 -05:00
Alex Deucher
17b9998441 drm/amdgpu: update smu_v11_0_pptable.h
Update to the latest changes.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11 11:51:44 -05:00
Prike Liang
6a52d4641c drm/amd/powerplay: suppress nonsupport profile mode overrun message
SMU12 not support WORKLOAD_DEFAULT_BIT and WORKLOAD_PPLIB_POWER_SAVING_BIT.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11 11:51:22 -05:00
Evan Quan
54c96f8679 drm/amd/powerplay: update smu11_driver_if_navi10.h
To pair the latest SMU firmwares.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11 11:51:14 -05:00
Jack Zhang
4bcbc25ce7 drm/amdgpu/sriov set driver_table address in VF
With the recent patch to unify VRAM address for driver
table(a83f82e). VF cannot dump table info any more because
SMU_MSG_SetDriverDramAddrHigh/Low were deleted in the
function of smu_update_table.

Therefore, VF also needs to set driver_table address
in smu_hw_init to fix this regression issue.

Signed-off-by: Jack Zhang <Jack.Zhang1@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11 11:48:58 -05:00
Evan Quan
4a6f8f01ef drm/amd/powerplay: handle features disablement for baco reset in SMU FW
SMU FW will handle the features disablement for baco reset
on Arcturus.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-07 11:44:43 -05:00
Jack Zhang
86b93fd62d drm/amdgpu/sriov Don't send msg when smu suspend
For sriov and pp_onevf_mode, do not send message to set smu
status, because smu doesn't support these messages under VF.

Besides, it should skip smu_suspend when pp_onevf_mode is disabled.

Signed-off-by: Jack Zhang <Jack.Zhang1@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-07 11:44:24 -05:00
Alex Deucher
7b913a76a6 drm/amdgpu: update default voltage for boot od table for navi1x
It needed to be updated as well so it will show the proper values
if you reset to the defaults.

Bug: https://gitlab.freedesktop.org/drm/amd/issues/1020
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-04 23:30:38 -05:00
Alex Deucher
1064ad4aee drm/amdgpu/smu10: fix smu10_get_clock_by_type_with_voltage
Cull out 0 clocks to avoid a warning in DC.

Bug: https://gitlab.freedesktop.org/drm/amd/issues/963
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-04 10:37:52 -05:00
Alex Deucher
4d0a72b660 drm/amdgpu/smu10: fix smu10_get_clock_by_type_with_latency
Only send non-0 clocks to DC for validation.  This mirrors
what the windows driver does.

Bug: https://gitlab.freedesktop.org/drm/amd/issues/963
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-04 10:37:52 -05:00
Alex Deucher
0531aa6eb3 drm/amdgpu: fetch default VDDC curve voltages (v2)
Ask the SMU for the default VDDC curve voltage values.  This
properly reports the VDDC values in the OD interface.

v2: only update if the original values are 0

Bug: https://gitlab.freedesktop.org/drm/amd/issues/1020
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org # 5.5.x
2020-02-04 10:37:52 -05:00
Matt Coffin
93c5f1f66c drm/amdgpu/smu_v11_0: Correct behavior of restoring default tables (v2)
Previously, the syfs functionality for restoring the default powerplay
table was sourcing it's information from the currently-staged powerplay
table.

This patch adds a step to cache the first overdrive table that we see on
boot, so that it can be used later to "restore" the powerplay table

v2: sqaush my original with Matt's fix

Bug: https://gitlab.freedesktop.org/drm/amd/issues/1020
Signed-off-by: Matt Coffin <mcoffin13@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org # 5.5.x
2020-02-04 10:37:51 -05:00
Alex Deucher
ee23a518fd drm/amdgpu/navi10: add OD_RANGE for navi overclocking
So users can see the range of valid values.

Bug: https://gitlab.freedesktop.org/drm/amd/issues/1020
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org # 5.5.x
2020-02-04 10:37:51 -05:00
Alex Deucher
45826e9c4e drm/amdgpu/navi: fix index for OD MCLK
You can only adjust the max mclk, not the min.

Bug: https://gitlab.freedesktop.org/drm/amd/issues/1020
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org # 5.5.x
2020-02-04 10:37:51 -05:00
Evan Quan
1cf8c930b3 drm/amd/powerplay: fix navi10 system intermittent reboot issue V2
This workaround is needed only for Navi10 12 Gbps SKUs.

V2: added SMU firmware version guard

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2020-02-04 10:37:08 -05:00
Alex Deucher
e0d5322c29 drm/amdgpu/navi10: add mclk to navi10_get_clock_by_type_with_latency
Doesn't seem to be used, but add it just in case.

Reviewed-by: Matt Coffin <mcoffin13@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-01-30 17:15:43 -05:00
Colin Ian King
269a0bf79b drm/amd/powerplay: fix spelling mistake "Attemp" -> "Attempt"
There are several spelling mistakes in PP_ASSERT_WITH_CODE messages.
Fix these.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-01-27 16:46:45 -05:00
zhengbin
a16afcdd8c drm/amd/powerplay: use true, false for bool variable in smu7_hwmgr.c
Fixes coccicheck warning:

drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c:723:2-50: WARNING: Assignment of 0/1 to bool variable
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c:733:3-52: WARNING: Assignment of 0/1 to bool variable
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c:747:3-51: WARNING: Assignment of 0/1 to bool variable

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: zhengbin <zhengbin13@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-01-27 16:46:44 -05:00