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312 Commits

Author SHA1 Message Date
Xiaojian Du
492af34c9f drm/amdgpu: add header files for MP 13.0.4 
This patch will add header files for MP 13.0.4.

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Tim Huang <Tim.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-07-29 15:24:38 -04:00
Chengming Gui
7c8e4a2572 drm/amd/amdgpu: add additional page fault settings for gfx11 
Add three additional page fault settings.

V2: move reg offset definition to header file. (Alex)
V3: add all shift/mask definitions of used reg. (Hawking)

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-07-28 16:19:59 -04:00
YiPeng Chai
75510fac07 drm/amdgpu: add umc v8_10_0 ip headers 
Add umc v8_10_0 register offset and shift masks
header files

Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Alexander Deucher <Alexander.Deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-07-18 16:37:38 -04:00
Roman Li
8955ff11f5 drm/amdgpu: Add reg headers for DCN314 
Register headers for the following IPs:
- DCN  3.1.4
- DPCS 3.1.4

v2:(squash) clean up (Alex)

Signed-off-by: Roman Li <roman.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-07-13 20:57:04 -04:00
Alex Deucher
0a94608f0f drm/amdgpu: fix file permissions on some files 
Drop execute.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2085
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-07-13 11:25:18 -04:00
Alan Liu
7c50a3e99a drm/amd/display: Program ACP related register 
- Setup the shift and mask of HDMI_ACP_SEND register
- Program the register in hdmi stream encoder
- Also update ACP register in azalia configuration

Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alan Liu <HaoPing.Liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-07-05 16:13:18 -04:00
Rodrigo Siqueira
e72f03f4bd drm/amd/display: Add missing registers for ACP 
We are missing some ACP registers/mask value for some specific ASICs.
This commit includes it to those ASICs that support it.

Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-07-05 16:10:28 -04:00
Aurabindo Pillai
262236b4f5 drm/amd/display: add missing reg defs for DCN3x HUBBUB 
[Why&How]
The omitted register definition caused call traces like:

[    3.811215] WARNING: CPU: 7 PID: 794 at drivers/gpu/drm/amd/amdgpu/../display/dc/dc_helper.c:120 set_reg_field_values.constprop.0+0xc7/0xe0 [amdgpu]
[    3.811406] Modules linked in: amdgpu(+) drm_ttm_helper ttm iommu_v2 gpu_sched drm_kms_helper cfbfillrect syscopyarea cfbimgblt sysfillrect sysimgblt fb_sys_fops cfbcopyarea drm i2c_piix4 drm_panel_orientation_quirks
[    3.811419] CPU: 7 PID: 794 Comm: systemd-udevd Not tainted 5.16.0-kfd+ #132
[    3.811422] Hardware name: System manufacturer System Product Name/ROG STRIX B450-F GAMING, BIOS 3003 12/09/2019
[    3.811425] RIP: 0010:set_reg_field_values.constprop.0+0xc7/0xe0 [amdgpu]
[    3.811615] Code: 08 49 89 51 08 8b 08 48 8d 42 08 49 89 41 08 44 8b 02 48 8d 50 08 0f b6 c9 49 89 51 08 8b 00 45 85 c0 75 b3 0f 0b eb af 5d c3 <0f> 0b e9 48 ff ff ff 49 8b 51 08 eb d0 49 8b 41 08 eb d5 66 0f 1f
[    3.811619] RSP: 0018:ffffb8c1c04cf640 EFLAGS: 00010246
[    3.811621] RAX: 0000000000000000 RBX: ffff96f2100d8800 RCX: 0000000000000000
[    3.811623] RDX: 0000000000000000 RSI: 0000000000000001 RDI: ffffb8c1c04cf650
[    3.811625] RBP: ffffb8c1c04cf640 R08: 000000000000047f R09: ffffb8c1c04cf658
[    3.811627] R10: ffff96f5161ff000 R11: ffff96f5161ff000 R12: ffff96f204afb9c0
[    3.811629] R13: 0000000000000000 R14: ffff96f202b94c00 R15: ffffb8c1c04cf718
[    3.811631] FS:  00007fe07c2e2880(0000) GS:ffff96f5059c0000(0000) knlGS:0000000000000000
[    3.811634] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[    3.811636] CR2: 0000559634ab57b8 CR3: 0000000120674000 CR4: 00000000003506e0
[    3.811637] Call Trace:
[    3.811640]  <TASK>
[    3.811642]  generic_reg_update_ex+0x69/0x200 [amdgpu]
[    3.811831]  ? _printk+0x58/0x6f
[    3.811836]  dcn32_init_crb+0x18f/0x1b0 [amdgpu]
[    3.812031]  dcn32_init_hw+0x379/0x6a0 [amdgpu]
[    3.812223]  dc_hardware_init+0xba/0x100 [amdgpu]
[    3.812415]  amdgpu_dm_init.isra.0.cold+0x166/0x1867 [amdgpu]
[    3.812616]  ? dev_vprintk_emit+0x139/0x15d
[    3.812621]  ? dev_printk_emit+0x4e/0x65
[    3.812624]  dm_hw_init+0x12/0x30 [amdgpu]
[    3.812820]  amdgpu_device_init.cold+0x130d/0x178c [amdgpu]
[    3.813017]  ? pci_read_config_word+0x25/0x40
[    3.813021]  amdgpu_driver_load_kms+0x1a/0x130 [amdgpu]
[    3.813178]  amdgpu_pci_probe+0x130/0x330 [amdgpu]

Fixes: 4f29f9cf09 ("drm/amd: add register headers for DCN32/321")
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-21 18:17:22 -04:00
Evan Quan
62f8f5c3bf drm/amdgpu: enable ASPM support for PCIE 7.4.0/7.6.0 
Enable ASPM support for PCIE 7.4.0 and 7.6.0.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-08 11:43:00 -04:00
Alan Liu
8b67e738ca drm/amdgpu/display/dc: Add ACP_DATA register 
Define ixAZALIA_F0_CODEC_PIN_CONTROL_ACP_DATA
Define AZALIA_F0_CODEC_PIN_CONTROL_ACP_DATA__SUPPORTS_AI_MASK/SHIFT

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-03 16:45:01 -04:00
Xiaojian Du
cb12d72b42 drm/amdgpu: add CSDMA reg offsets for NBIO v7.7.0 
This patch will add CSDMA reg offsets for NBIO v7.7.0

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-03 16:44:15 -04:00
Huang Rui
d57716702d drm/amdgpu: add mmhub v3_0_1 headers 
Add mmhub v3_0_1 headers, because there are many differeces with v3_0_0.

v2: squash in updates (Alex)

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Tim Huang <Tim.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-03 16:44:15 -04:00
Aurabindo Pillai
4f29f9cf09 drm/amd: add register headers for DCN32/321 
Add register headers for DCN 3.2.0 and 3.2.1.

Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-03 16:43:37 -04:00
Alan Liu
6880ed280e drm/amd/display: Add HDMI_ACP_SEND register 
Define HDMI_ACP_SEND register shift/mask.

Signed-off-by: Alan Liu <HaoPing.Liu@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-26 14:56:32 -04:00
Hawking Zhang
81570d6dc2 drm/amdgpu: add lsdma v6_0_0 ip headers 
Add lsdma v6_0_0 register offset and shift masks
header files

v2: squash in updates (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-10 17:53:11 -04:00
Andrey Grodzovsky
bce04f216d drm/amd/psp: Add C2P registers to mp_13_0_2 header 
Add additional registers.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-06 16:58:10 -04:00
Huang Rui
c4d1c905ba drm/amdgpu: add hdp v5_2_1 ip headers 
Add hdp v5.2.1 offset and shift mask ip header files.

v2: squash in updates (Alex)

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-06 10:36:13 -04:00
Huang Rui
4debe75395 drm/amdgpu: add nbio v7_7_0 ip headers 
Add nbio v7.7.0 offset and shift mask ip header files.

v2: squash in updates (Alex)

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-06 10:36:13 -04:00
Hawking Zhang
fd1e77d915 drm/amdgpu: add mmhub v3_0_2 ip headers 
Add mmhub v3_0_2 register offset and shift masks

v2: update to latest headers

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-05 16:51:45 -04:00
Leo Liu
ed1db32e33 drm/amdgpu: add vcn 4_0_0 header files v7 
Add VCN 4.0.0 registers

Signed-off-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-04 10:43:55 -04:00
Hawking Zhang
9f99d98305 drm/amdgpu: add mmhub v3_0_0 ip headers v6 
Add mmhub v3_0_0 register offset and shift masks
header files (Hawking)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-04 09:57:16 -04:00
Hawking Zhang
f41c963972 drm/amdgpu: add athub v3_0_0 ip headers v6 
Add athub v3_0_0 register offset and shift masks
header files (Hawking)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-04 09:57:06 -04:00
Hawking Zhang
55437d3bf4 drm/amdgpu: add smuio v13_0_6 ip headers v4 
Add smuio v13_0_6 register offset and shift masks
header files (Hawking)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-04 09:54:35 -04:00
Hawking Zhang
11c4328a82 drm/amdgpu: add hdp v6_0_0 ip headers v4 
Add hdp v6_0_0 register offset and shift masks
header files (Hawking)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-04 09:53:34 -04:00
Hawking Zhang
d71093aa15 drm/amdgpu: add osssys v6_0_0 ip headers v4 
Add osssys v6_0_0 register offset and shift masks
header files (Hawking)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-04 09:52:56 -04:00
Hawking Zhang
e19920c6a0 drm/amdgpu: add nbio v4_3_0 ip headers v6 
Add nbio v4_3_0 register offset and shift masks
header files (Hawking)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-04 09:52:41 -04:00
Hawking Zhang
f33ac92f9c drm/amdgpu: add gc v11_0_0 ip headers v11 
Add gc v11_0_0 register offset and shift masks
header files (Hawking)

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-04-28 17:48:28 -04:00
Hawking Zhang
85a41b429d drm/amdgpu: add mp v13_0_0 ip headers v7 
Add mp v13_0_0 register offset and shift masks
header files (Hawking)

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-04-28 17:48:25 -04:00
Mohammad Zafar Ziya
f0a339a8c0 drm/amdgpu/vcn: Add vcn and jpeg ver 2.6 ras register definition 
Adding vcn and jpeg ver 2.6 ras register definition

Signed-off-by: Mohammad Zafar Ziya <Mohammadzafar.ziya@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-03-28 12:54:39 -04:00
Xiaogang Chen
45f0ff404c drm/amdgpu: config HDP_MISC_CNTL.READ_BUFFER_WATERMARK 
To fix applications running across multiple GPU config hang.

Signed-off-by: Xiaogang Chen <xiaogang.chen@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-02-24 17:24:43 -05:00
Qingqing Zhuo
5b723b1230 drm/amd/include: add DCN 3.1.5 registers 
Add DCN 3.1.5 and DPCS 4.2.2 register headers.

Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Change-Id: I5588a1c422ae384cc76aa42380545dfc1aad1948
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-02-18 14:07:00 -05:00
Yifan Zhang
62640f251f drm/amdgpu: add mp 13.0.5 header files 
This patch is to add mp 13.0.5 header files.

v2: update headers

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-02-18 14:07:00 -05:00
Leo Li
f3f6eff85f drm/amd/include: Add MP 13.0.8 register headers 
Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-02-17 15:45:07 -05:00
Leo Li
64b14a184e drm/amd/include: Add register headers for DCN 3.1.6 
Add register headers for the following IPs:
- DCN 3.1.6
- DPCS 4.2.3

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-02-17 15:44:45 -05:00
Stanley.Yang
1ec1944eb5 drm/amdgpu: print more error info 
print more error info when deferred uncorrectable ras error

changed from V1:
    move Defferred error msg into query uncorrectable error
    count function.

Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-02-14 15:08:41 -05:00
Alex Deucher
4a5dc6c73d drm/amdgpu: move dpcs_3_0_3 headers from dcn to dpcs 
To align with other headers.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-02-07 18:03:50 -05:00
Alex Deucher
68550cbc61 drm/amdgpu: move dpcs_3_0_0 headers from dcn to dpcs 
To align with other headers.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-02-07 18:03:50 -05:00
Alex Deucher
120cc6e67a drm/amdgpu: add missing license to dpcs_3_0_0 headers 
MIT.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-02-07 18:03:50 -05:00
Alex Deucher
109a357f28 drm/amdgpu: clean up some leftovers from bring up 
Some old registers leftover from pre-silicon.  No longer
relevant on real hardware.  Remove.

Reviewed-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-12-16 14:08:20 -05:00
Andrey Grodzovsky
db5b5c679e drm/amd/pm: Add STB support in sienna_cichlid 
Add STB implementation for sienna_cichlid

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Luben Tuikov <luben.tuikov@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-11-22 14:58:54 -05:00
Jake Wang
e7414a1a18 drm/amd/display: Disable hdmistream and hdmichar clocks 
[Why & How]
Disable hdmistream and hdmichar root clocks when not being used.

Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Jake Wang <haonan.wang2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-10-19 17:20:28 -04:00
Zhan Liu
0ad53fe3ae drm/amdgpu: add cyan_skillfish asic header files 
This patch is to add cyan_skillfish asic header files.

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Zhan Liu <zhan.liu@amd.com>
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Jun Lei <jun.lei@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-09-29 17:30:00 -04:00
Tom St Denis
ce9c1d8c71 drm/amd/amdgpu: Add missing mp_11_0_8_sh_mask.h header 
The commit 2766534b76 added the offset
header but didn't add the masks.  This adds the masks based on what
was selected for the offsets.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-09-29 17:30:00 -04:00
Tao Zhou
ca5c636dc6 drm/amdgpu: add poison mode query for DF (v2) 
Add ras poison mode query interface for DF.

v2: replace RREG32_PCIE with RREG32_SOC15.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-09-28 09:30:06 -04:00
Liu, Zhan
bdd1a21b52 drm/amd/display: Fix B0 USB-C DP Alt mode 
[Why]
Starting from B0, along with RDPCSTX, RDPCSPIPE registers are also used.

[How]
Make sure RDPCSPIPE registers are programmed correctly.

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Zhan Liu <Zhan.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-09-23 15:17:30 -04:00
Evan Quan
d9ca7567b8 drm/amd/pm: correct the fan speed RPM retrieving 
The relationship "PWM = RPM / smu->fan_max_rpm" between fan speed
PWM and RPM is not true for SMU11 ASICs. So, we need a new way to
retrieving the fan speed RPM.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-08-16 15:35:56 -04:00
Evan Quan
fb1f667e71 drm/amd/pm: correct the fan speed PWM retrieving 
The relationship "PWM = RPM / smu->fan_max_rpm" between fan speed
PWM and RPM is not true for SMU11 ASICs. So, we need a new way to
retrieving the fan speed PWM.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-08-16 15:35:56 -04:00
Tom St Denis
d2a266fad5 drm/amd/amdgpu: add regCP_MEx_INT_STAT_DEBUG for Aldebaran debugging 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-08-05 21:17:59 -04:00
Lang Yu
2766534b76 drm/amdgpu: add mp 11.0.8 header for cyan_skillfish 
The cyan_skillfish will use the mp 11.0.8.

Signed-off-by: Lang Yu <lang.yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-07-23 10:08:01 -04:00
Xiaomeng Hou
dde5864539 drm/amd/pm: drop smu_v13_0_1.c|h files for yellow carp 
Since there's nothing special in smu implementation for yellow carp,
it's better to reuse the common smu_v13_0 interfaces and drop the
specific smu_v13_0_1.c|h files.

v2: remove the duplicate register offset and shift mask header files as
well.

Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-07-08 17:47:28 -04:00