leandrof/linux
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
364,941 Commits 2 Branches 0 Tags
c15da0a87c33e32b4984d367799b32dda2024af8
Commit Graph

19 Commits

Author SHA1 Message Date
Ralf Baechle
7034228792 MIPS: Whitespace cleanup. 
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2013-02-01 10:00:22 +01:00
Ralf Baechle
382fc33b4a Merge branch 'master' of git://dev.phrozen.org/mips-next into mips-for-linux-next 2012-10-05 15:56:28 +02:00
Kevin Cernekee
5fd66c2b2b MIPS: BCM63XX: Add register and IRQ definitions for USB 2.0 device 
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4084/
Signed-off-by: John Crispin <blogic@openwrt.org>
 2012-08-30 20:15:52 +02:00
Kevin Cernekee
a56e853805 MIPS: BCM63XX: Fix USB IRQ definitions for 6328 
OHCI/EHCI are in the high (second) word.  Not currently used by any
driver.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4026/
Signed-off-by: John Crispin <blogic@openwrt.org>
 2012-08-30 20:15:52 +02:00
Kevin Cernekee
18ec0e7079 MIPS: BCM63XX: Add register definitions for USBD dependencies 
The USB 2.0 device depends on some functionality in other blocks, such
as GPIO and USBH.  Add those register definitions here.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4025/
Signed-off-by: John Crispin <blogic@openwrt.org>
 2012-08-30 20:15:52 +02:00
Jonas Gorski
986936d7c2 MIPS: BCM63XX: remove bogus ENETSW_TXDMA interrupts from BCM6328 
These were erroneously copied from BCM6368. BCM6328 does not expose the
ENETSW_TXDMA interrupts, and BCM_6328_HIGH_IRQ_BASE + 7 is actually used
for the second UART.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4090/
Signed-off-by: John Crispin <blogic@openwrt.org>
 2012-08-24 20:35:56 +02:00
Jonas Gorski
19c860d932 MIPS: BCM63XX: Add PCIe Support for BCM6328 
Add support for the PCIe port found on BCM6328.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/3956/
Reviewed-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2012-07-24 16:33:13 +02:00
Jonas Gorski
e5766aea5b MIPS: BCM63XX: Add basic BCM6328 support 
This includes CPU speed, memory size detection and working UART, but
lacking the appropriate drivers, no support for attached flash.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/3951/
Reviewed-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2012-07-24 16:33:12 +02:00
Florian Fainelli
8aecfe9462 MIPS: BCM63XX: add RNG peripheral definitions 
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: mpm@selenic.com
Cc: herbert@gondor.apana.org.au
Patchwork: https://patchwork.linux-mips.org/patch/3326/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2012-07-24 16:33:10 +02:00
Florian Fainelli
15514e7838 MIPS: BCM63xx: Remove SPI2 register 
This register was introduced with the support of the BCM6368 CPU in the idea
that its internal layout was different from the other CPUs SPI controller.
The controller is actually the same as the one present on BCM6358 so we can
remove this register and use the usual SPI register instead.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: grant.likely@secretlab.ca
Cc: spi-devel-general@lists.sourceforge.net
Patchwork: https://patchwork.linux-mips.org/patch/3316/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2012-07-23 13:54:33 +01:00
Florian Fainelli
7546d71a9c MIPS: BCM63xx: Define SPI register sizes. 
There are two distinct sizes for the SPI register depending on the SoC
generation (6338 & 6348 vs 6358 & 6368).

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: grant.likely@secretlab.ca
Cc: spi-devel-general@lists.sourceforge.net
Patchwork: https://patchwork.linux-mips.org/patch/3314/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2012-07-23 13:54:33 +01:00
Florian Fainelli
9e368e49da MIPS: BCM63xx: Define BCM6358 SPI base address 
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: grant.likely@secretlab.ca
Cc: spi-devel-general@lists.sourceforge.net
Patchwork: https://patchwork.linux-mips.org/patch/3315/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2012-07-23 13:54:32 +01:00
Florian Fainelli
0aeee715b0 MIPS: BCM63xx: Add IRQ_SPI and CPU specific SPI IRQ values 
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: grant.likely@secretlab.ca
Cc: spi-devel-general@lists.sourceforge.net
Patchwork: https://patchwork.linux-mips.org/patch/3320/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2012-07-23 13:54:32 +01:00
Florian Fainelli
e1c96c8620 MIPS: BCM63xx: Remove BCM6345 hacks to read base boot address 
Though BCM6345 does not technically have the same MPI register layout
than the other SoCs, reading the chip-select registers is done the same
way, and particularly for chip-select 0, which is the boot flash.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3009/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:04 +00:00
Maxime Bizon
04712f3ff6 MIPS: BCM63XX: Add support for bcm6368 CPU. 
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2892/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:04 +00:00
Maxime Bizon
d430b6c5e7 MIPS: BCM63XX: Add more register sets & missing register definitions. 
Needed for upcoming 6368 CPU support.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2893/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:03 +00:00
Maxime Bizon
ec68c5206a MIPS: BCM63XX: Cleanup cpu registers. 
Use preprocessor when possible to avoid duplicated and error-prone
code.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2897/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:03 +00:00
Maxime Bizon
524ef29cff MIPS: BCM63xx: Add support for second uart. 
The BCm63xx SOC has two uarts.  Some boards use the second one for
bluetooth.  This patch changes platform device registration code to
handle this.  Changes to the UART driver were already merged in
6a2c7eabfd.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
To: linux-mips@linux-mips.org
Cc: Maxime Bizon <mbizon@freebox.fr>
Patchwork: http://patchwork.linux-mips.org/patch/900/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2010-04-12 17:26:18 +01:00
Maxime Bizon
e7300d04bd MIPS: BCM63xx: Add support for the Broadcom BCM63xx family of SOCs. 
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2009-09-17 20:07:52 +02:00