Commit Graph

79961 Commits

Author SHA1 Message Date
Gabor Juhos
fb167e891d MIPS: pci-ar71xx: convert into a platform driver
The patch converts the pci-ar71xx driver into a
platform driver. This makes it possible to register
the PCI controller as a plain platform device.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4906/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:35 +01:00
Gabor Juhos
58d2e9bcd6 MIPS: pci-ar724x: convert into a platform driver
The patch converts the pci-ar724x driver into a
platform driver. This makes it possible to register
the PCI controller as a plain platform device.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4905/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:35 +01:00
Gabor Juhos
d3d2b4200b MIPS: ralink: add CPU interrupt controller to of_irq_ids
Convert the ralink IRQ code to make use of the new MIPS IRQ controller OF
mappings.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Acked-by: David Daney <david.daney@cavium.com>
Patchwork: http://patchwork.linux-mips.org/patch/4900/
2013-02-17 01:25:34 +01:00
Gabor Juhos
0916b46962 MIPS: add irqdomain support for the CPU IRQ controller
Add code to load a irq_domain for the MIPS IRQ controller from a devicetree
file.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Acked-by: David Daney <david.daney@cavium.com>
Patchwork: http://patchwork.linux-mips.org/patch/4902/
2013-02-17 01:25:34 +01:00
John Crispin
6d63d70f9f MIPS: ralink: adds default config file
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:33 +01:00
John Crispin
ae2b5bb657 MIPS: ralink: adds Kbuild files
Add the Kbuild symbols and Makefiles needed to actually build the ralink code
from this series

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4899/
2013-02-17 01:25:32 +01:00
John Crispin
5644da4f63 MIPS: ralink: adds rt305x devicetree
This adds the devicetree file that describes the rt305x evaluation kit.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4898/
2013-02-17 01:25:32 +01:00
John Crispin
2809b31770 MIPS: ralink: adds support for RT305x SoC family
Add support code for rt3050, rt3052, rt3350, rt3352 and rt5350 SOC.

The code detects the SoC and registers the clk / pinmux settings.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4896/
2013-02-17 01:25:31 +01:00
John Crispin
5fff610b7c MIPS: ralink: adds early_printk support
Add the code needed to make early printk work.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4897/
2013-02-17 01:25:31 +01:00
John Crispin
3a5bfe7bdb MIPS: ralink: adds OF code
Until there is a generic MIPS way of handing the DTB over from bootloader to
kernel we rely on a built in devicetrees. The OF code also remaps those register
ranges that we use global in our drivers.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4895/
2013-02-17 01:25:31 +01:00
John Crispin
3f0a06b036 MIPS: ralink: adds clkdev code
These SoCs have a limited number of fixed rate clocks. Add support for the
clk and clkdev api.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4894/
2013-02-17 01:25:30 +01:00
John Crispin
7e47cefa69 MIPS: ralink: adds prom and cmdline code
Add minimal code to handle commandlines.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4892/
2013-02-17 01:25:30 +01:00
John Crispin
c06e836ada MIPS: ralink: adds reset code
Resetting these SoCs requires no real magic. The code is straight forward.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4891/
2013-02-17 01:25:29 +01:00
John Crispin
19d3814e7b MIPS: ralink: adds irq code
All of the Ralink Wifi SoC currently supported by this series share the same
interrupt controller (INTC).

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4890/
2013-02-17 01:25:29 +01:00
John Crispin
8563991026 MIPS: ralink: adds include files
Before we start adding the platform code we add the common include files.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4893/
2013-02-17 01:25:28 +01:00
Gabor Juhos
9c099c4e79 MIPS: ath79: simplify MISC IRQ handling
The current code uses multiple if statements for
demultiplexing the different interrupt sources.
Additionally, the MISC interrupt controller has
32 interrupt sources and the current code does not
handles all of them.

Get rid of the if statements and process all interrupt
sources in a loop to fix these issues.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4874/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:27 +01:00
Gabor Juhos
f160a289e0 MIPS: ath79: simplify ath79_gpio_function_* routines
Make ath79_gpio_function_{en,dis}able to be wrappers
around ath79_gpio_function_setup.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4871/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:27 +01:00
Gabor Juhos
8838becdf5 MIPS: ath79: fix GPIO function selection for AR934x SoCs
GPIO function selection is not working on the AR934x
SoCs because the offset of the function selection
register is different on those.

Add a helper routine which returns the correct
register address based on the SoC type, and use
that in the 'ath79_gpio_function_*' routines.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4870/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:27 +01:00
Steven J. Hill
778eeb1b19 MIPS: Add new GIC clocksource.
Add new clocksource that uses the counter present on the MIPS
Global Interrupt Controller.

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Patchwork: http://patchwork.linux-mips.org/patch/4681/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:21 +01:00
Steven J. Hill
4cb764b454 MIPS: dsp: Simplify the DSP macros.
Simplify the DSP macros for vanilla (non-microMIPS) kernels and
toolchains that do not support the DSP ASEs.

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Patchwork: http://patchwork.linux-mips.org/patch/4687/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:24 +01:00
Steven J. Hill
d0c1b478e0 MIPS: dsp: Support toolchains without DSP ASE and microMIPS.
Add macros to support the DSP ASE with microMIPS kernels when the
toolchain does not have support.

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Patchwork: http://patchwork.linux-mips.org/patch/4686/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:24 +01:00
Steven J. Hill
32a7ede673 MIPS: dsp: Add assembler support for DSP ASEs.
Newer toolchains support the DSP and DSP Rev2 instructions. This patch
performs a check for that support and adds compiler and assembler
flags for only the files that need use those instructions.

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Acked-by: Florian Fainelli <florian@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4752/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:23 +01:00
Steven J. Hill
f8fa4811db MIPS: Add support for the M14KEc core.
Signed-off-by: Steven J. Hill <sjhill@mips.com>
Patchwork: http://patchwork.linux-mips.org/patch/4682/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:23 +01:00
Steven J. Hill
127993e561 MIPS: Clean-ups for MIPS Technologies Inc. generic header file.
Clean up standard header text and remove unused #define.

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Patchwork: http://patchwork.linux-mips.org/patch/4703/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:22 +01:00
Jayachandran C
7b53eb4d40 MIPS: PCI: Multi-node PCI support for Netlogic XLP
On a multi-chip XLP board, each node can have 4 PCIe links. Update
XLP PCI code to initialize PCIe on all the nodes.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4803/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:22 +01:00
Jayachandran C
cba3b64303 MIPS: Netlogic: Fix for quad-XLP boot
On multi-chip boards, the first core on slave SoCs may take much
more time to wakeup. Add code to wait for the core to come up before
proceeding with the rest of the boot up.

Update xlp_wakeup_core to also skip the boot node and the boot CPU
initialization which is already complete.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4783/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:22 +01:00
Jayachandran C
37a7059bc4 MIPS: Netlogic: use preset loops per jiffy
Doing calibrate delay on a hardware thread will be inaccurate since
it depends on the load on other threads in the core. It will also
slow down the boot process when done for 128 hardware threads. Switch
to a pre-computed loops per jiffy based on the core frequency. The
value is computed based on the core frequency and roughly matches the
value calculated by calibrate_delay().

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4791/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:21 +01:00
Jayachandran C
5a4cbe3811 MIPS: Netlogic: No hazards needed for XLR/XLS
TLB and COP0 hazards are handled in hardware for Netlogic XLR/XLS
SoCs. Update hazards.h to pick more optimal set of definitions when
compiling for XLR/XLS.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4788/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:21 +01:00
Jayachandran C
8cd3d64c57 MIPS: PCI: Prevent hang on XLP reg read
Reading PCI extended register at 0x255 on a bridge will hang if there
is no device connected on the link. Make PCI read routine skip this
register.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4789/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:20 +01:00
Jayachandran C
4e45e542cd MIPS: Netlogic: Use PIC timer as a clocksource
The XLR/XLS/XLP PIC has a 8 countdown timers which run at the PIC
frequencey. One of these can be used as a clocksource to provide
timestamps that is common across cores. This can be used in place
of the count/compare clocksource which is per-CPU.

On XLR/XLS PIC registers are 32-bit, so we just use the lower 32-bits
of the PIC counter. On XLP, the whole 64-bit can be used.

Provide common macros and functions for PIC timer registers on XLR/XLS
and XLP, and use them to register a PIC clocksource.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4786/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:20 +01:00
Jayachandran C
a69ba6293d MIPS: Netlogic: Split XLP L1 i-cache among threads
Since we now use r4k cache code for Netlogic XLP, it is
better to split L1 icache among the active threads, so that
threads won't step on each other while flushing icache.

The L1 dcache is already split among the threads in the core.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4787/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:20 +01:00
Jayachandran C
a264b5e8dc MIPS: PCI: Byteswap not needed in little-endian mode
Rename function xlp_enable_pci_bswap() to xlp_config_pci_bswap(), which
is a better description for its functionality.  When compiled in
big-endian mode, xlp_config_pci_bswap() will configure the PCIe links
to byteswap.  In little-endian mode, no swap configuration is needed
for the PCIe controller, and the function is empty.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4802/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:19 +01:00
Jayachandran C
220d9122e8 MIPS: Netlogic: Optimize EIMR/EIRR accesses in 32-bit
Provide functions ack_c0_eirr(), set_c0_eimr(), clear_c0_eimr()
and read_c0_eirr_and_eimr() that do the EIMR and EIRR operations
and update the interrupt handling code to use these functions.
Also, use the EIMR register functions to mask interrupts in the
irq code.

The 64-bit interrupt request and mask registers (EIRR and EIMR) are
accessed when the interrupts are off, and the common operations are
to set or clear a bit in these registers. Using the 64-bit c0 access
functions for these operations is not optimal in 32-bit, because it
will disable/restore interrupts and split/join the 64-bit value during
each register access.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4790/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:19 +01:00
Jayachandran C
f0cb40e5c3 MIPS: Netlogic: add XLS6xx to FMN config
Add support for XLS6xx CPUs to the Fast Message Network (FMN)
configuration.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4785/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:18 +01:00
John Crispin
2636562594 MIPS: lantiq: rework external irq code
This code makes the irqs used by the EIU loadable from the DT. Additionally we
add a helper that allows the pinctrl layer to map external irqs to real irq
numbers.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4818/
2013-02-17 00:15:18 +01:00
John Crispin
bae696a267 MIPS: lantiq: improve pci reset gpio handling
We need to make sure that the reset gpio is available and also set a sane
default state.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4817/
2013-02-17 00:15:17 +01:00
John Crispin
d0c550dc36 MIPS: lantiq: add GPHY clock gate bits
Explicitly enable the clock gate of the internal GPHYs found on xrx200.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4816/
2013-02-17 00:15:17 +01:00
John Crispin
740c606e8e MIPS: lantiq: adds static clock for PP32
The Lantiq DSL SoCs have an internal networking processor. Add code to read
the static clock rate.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4815/
2013-02-17 00:15:17 +01:00
John Crispin
3d18c17e4f MIPS: lantiq: trivial typo fix
"nodes" is written with a single "s"

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4814/
2013-02-17 00:15:16 +01:00
John Crispin
42f3caef03 MIPS: show correct cpu name for 24KEc
Make sure 24KEc is properly identified inside /proc/cpuinfo

Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:16 +01:00
Ben Dooks
251019fb97 ARM: 7650/1: mm: replace direct access to mm->context.id with new macro
The mmid macro is meant to be used to get the mm->context.id data
from the mm structure, but it seems to have been missed in a cuple
of files.

Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-02-16 17:54:27 +00:00
Ben Dooks
9520a5bece ARM: 7649/1: mm: mm->context.id fix for big-endian
Since the new ASID code in b5466f8728
("ARM: mm: remove IPI broadcasting on ASID rollover") was changed to
use 64bit operations it has broken the BE operation due to an issue
with the MM code accessing sub-fields of mm->context.id.

When running in BE mode we see the values in mm->context.id are stored
with the highest value first, so the LDR in the arch/arm/mm/proc-macros.S
reads the wrong part of this field. To resolve this, change the LDR in
the mmid macro to load from +4.

Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-02-16 17:54:26 +00:00
Thierry Reding
352af7d4dd ARM: 7648/1: pci: Allow passing per-controller private data
In order to allow drivers to specify private data for each controller,
this commit adds a private_data field to the struct hw_pci. This field
is an array of nr_controllers pointers that will be used to initialize
the private_data field of the corresponding controller's pci_sys_data
structure.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-02-16 17:54:25 +00:00
Thierry Reding
276fd3c5f8 ARM: 7647/1: pci: Keep pci_common_init() around after init
When using deferred driver probing, PCI host controller drivers may
actually require this function after the init stage.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-02-16 17:54:24 +00:00
Russell King
bce2bd3cda ARM: fix warnings introduced by previous patch
869486d5f51 (ARM: 7646/1: mm: use static_vm for managing static mapped
areas) introduced new warnings:

arch/arm/mm/mmu.c: In function 'pci_reserve_io':
arch/arm/mm/mmu.c:888:16: warning: unused variable 'addr'
arch/arm/mm/mmu.c:887:20: warning: unused variable 'vm'

because it failed to delete the two local variables it no longer used.
Fix this.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-02-16 17:54:23 +00:00
Joonsoo Kim
101eeda38c ARM: 7646/1: mm: use static_vm for managing static mapped areas
A static mapped area is ARM-specific, so it is better not to use
generic vmalloc data structure, that is, vmlist and vmlist_lock
for managing static mapped area. And it causes some needless overhead and
reducing this overhead is better idea.

Now, we have newly introduced static_vm infrastructure.
With it, we don't need to iterate all mapped areas. Instead, we just
iterate static mapped areas. It helps to reduce an overhead of finding
matched area. And architecture dependency on vmalloc layer is removed,
so it will help to maintainability for vmalloc layer.

Reviewed-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Joonsoo Kim <iamjoonsoo.kim@lge.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-02-16 17:54:22 +00:00
Joonsoo Kim
ed8fd2186a ARM: 7645/1: ioremap: introduce an infrastructure for static mapped area
In current implementation, we used ARM-specific flag, that is,
VM_ARM_STATIC_MAPPING, for distinguishing ARM specific static mapped area.
The purpose of static mapped area is to re-use static mapped area when
entire physical address range of the ioremap request can be covered
by this area.

This implementation causes needless overhead for some cases.
For example, assume that there is only one static mapped area and
vmlist has 300 areas. Every time we call ioremap, we check 300 areas for
deciding whether it is matched or not. Moreover, even if there is
no static mapped area and vmlist has 300 areas, every time we call
ioremap, we check 300 areas in now.

If we construct a extra list for static mapped area, we can eliminate
above mentioned overhead.
With a extra list, if there is one static mapped area,
we just check only one area and proceed next operation quickly.

In fact, it is not a critical problem, because ioremap is not frequently
used. But reducing overhead is better idea.

Another reason for doing this work is for removing architecture dependency
on vmalloc layer. I think that vmlist and vmlist_lock is internal data
structure for vmalloc layer. Some codes for debugging and stat inevitably
use vmlist and vmlist_lock. But it is preferable that they are used
as least as possible in outside of vmalloc.c

Now, I introduce an ARM-specific infrastructure for static mapped area. In
the following patch, we will use this and resolve above mentioned problem.

Reviewed-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Joonsoo Kim <iamjoonsoo.kim@lge.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-02-16 17:54:22 +00:00
Joonsoo Kim
48dc369d21 ARM: 7644/1: vmregion: remove vmregion code entirely
Now, there is no user for vmregion.
So remove it.

Acked-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Joonsoo Kim <iamjoonsoo.kim@lge.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-02-16 17:54:21 +00:00
Will Deacon
5d1c20bce5 ARM: 7637/1: memory: use SZ_ constants for defining the virtual memory layout
Parts of the virtual memory layout (mainly the modules area) are
described using open-coded immediate values.

Use the SZ_ definitions from linux/sizes.h instead to make the code
clearer.

Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-02-16 17:54:17 +00:00
Jacob Shin
e259514eef perf/x86/amd: Enable northbridge performance counters on AMD family 15h
On AMD family 15h processors, there are 4 new performance
counters (in addition to 6 core performance counters) that can
be used for counting northbridge events (i.e. DRAM accesses).

Their bit fields are almost identical to the core performance
counters. However, unlike the core performance counters, these
MSRs are shared between multiple cores (that share the same
northbridge).

We will reuse the same code path as existing family 10h
northbridge event constraints handler logic to enforce
this sharing.

Signed-off-by: Jacob Shin <jacob.shin@amd.com>
Acked-by: Stephane Eranian <eranian@google.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Jacob Shin <jacob.shin@amd.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1360171589-6381-7-git-send-email-jacob.shin@amd.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2013-02-16 09:37:27 +01:00
Ralf Baechle
5b003119ab MIPS: Cleanup break and trap codes.
Very ancient out-of-tree KDB versions were using BRK_KDB code but it's
unused in modern kernels since a long time.  Delete it.

The microMIPS encoding only reserves 4 bits for a trap code so it's time
for further weedkilling.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-15 23:07:38 +01:00
Steven J. Hill
8e8dc33543 MIPS: Redefine value of BRK_BUG.
The BRK_BUG value is used in the BUG and __BUG_ON inline macros. For
standard MIPS cores the code in the 'tne' instruction is 10-bits long.
In microMIPS, the 'tne' instruction is recoded and the code can only be
4-bits long. We change the value to 12 instead of 512 so that both classic
and microMIPS kernels build.

[ralf@linux-mips.org: Many of the break codes starting from 0 are used
across many MIPS UNIX variants.  Codes starting from 512 are operating
system specific additions.  1023 again is also used by other operating
systems]

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-15 23:07:38 +01:00
Steven J. Hill
a96102be70 MIPS: Add printing of ISA version in cpuinfo.
Display the MIPS ISA version release in the /proc/cpuinfo file.

[ralf@linux-mips.org: Add support for MIPS I ... IV legacy architecture
revisions.  Also differenciate between MIPS32 and MIPS64 versions instead
of lumping them together as just r1 and r2.

Note to application programmers: this indicates the CPU's ISA level
It does not imply the current execution environment does support it.  For
example an O32 application seeing "mips64r2" would still be restricted by
by the execution environment to 32-bit - but the kernel could run mips64r2
code.  The same for a 32-bit kernel running on a 64-bit processor.  This
field doesn't include ASEs or optional architecture modules nor other
detailed flags such as the availability of an FPU.]

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/4714/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-15 23:07:38 +01:00
Venkat Subbiah
0e49caf661 MIPS: Octeon: Adding driver to measure interrupt latency on Octeon.
Signed-off-by: Venkat Subbiah <venkat.subbiah@cavium.com>
[Rewrote timeing calculations]
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4660/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-15 23:07:37 +01:00
Julia Lawall
42913c7992 MIPS: Loongson2: Use clk API instead of direct dereferences
A struct clk value is intended to be an abstract pointer, so it should be
manipulated using the various API functions.

clk_put is additionally added on the failure paths.

The semantic match that finds the first problem is as follows:
(http://coccinelle.lip6.fr/)

// <smpl>
@@
expression e,e1;
identifier i;
@@

*e = clk_get(...)
 ... when != e = e1
     when any
*e->i
// </smpl>

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: kernel-janitors@vger.kernel.org
Cc: linux-mips@linux-mips.org,
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/4751/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-15 23:07:37 +01:00
Scott Wood
64871ff6e8 powerpc/e500/qemu-e500: enable coreint
The MPIC code will disable coreint if it detects an insufficient
MPIC version.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-02-15 14:13:26 -06:00
Scott Wood
7c509ee014 powerpc/mpic: allow coreint to be determined by MPIC version
This will be used by the qemu-e500 platform, as the MPIC version (and
thus whether we have coreint) depends on how QEMU is configured.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-02-15 14:13:22 -06:00
Linus Torvalds
f741656d64 Revert the PVonHVM kexec. The patch introduces a regression
with older hypervisor stacks, such as Xen 4.1.
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Merge tag 'stable/for-linus-3.8-rc7-tag-two' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen

Pull xen fixes from Konrad Rzeszutek Wilk:
 "Two fixes:

   - A simple bug-fix for redundant NULL check.

   - CVE-2013-0228/XSA-42: x86/xen: don't assume %ds is usable in
     xen_iret for 32-bit PVOPS

  and two reverts:

   - Revert the PVonHVM kexec.  The patch introduces a regression with
     older hypervisor stacks, such as Xen 4.1."

* tag 'stable/for-linus-3.8-rc7-tag-two' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen:
  Revert "xen PVonHVM: use E820_Reserved area for shared_info"
  Revert "xen/PVonHVM: fix compile warning in init_hvm_pv_info"
  xen: remove redundant NULL check before unregister_and_remove_pcpu().
  x86/xen: don't assume %ds is usable in xen_iret for 32-bit PVOPS.
2013-02-15 12:12:55 -08:00
Varun Sethi
52c5affc54 powerpc/fsl_pci: Store the pci ctlr device ptr in the pci ctlr struct
The pci controller structure has a provision to store the device structure
pointer of the corresponding platform device. Currently this information is
not stored during fsl pci controller initialization. This information is
required while dealing with iommu groups for pci devices connected to the
fsl pci controller. For the case where the pci devices can't be paritioned,
they would fall under the same device group as the pci controller.

This patch stores the platform device information in the pci controller
structure during initialization.

Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-02-15 14:10:32 -06:00
Linus Torvalds
11e7651432 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc
Pull sparc fixes from David Miller:
 "A couple small fixes for sparc including some THP brown-paper-bag
  material:

   1) During the merging of all the THP support for various
      architectures, sparc missed adding a
      HAVE_ARCH_TRANSPARENT_HUGEPAGE to it's Kconfig, oops.

   2) Sparc needs to be mindful of hugepages in get_user_pages_fast().

   3) Fix memory leak in SBUS probe, from Cong Ding.

   4) The sunvdc virtual disk client driver has a test of the bitmask of
      vdisk server supported operations which was off by one bit"

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc:
  sunvdc: Fix off-by-one in generic_request().
  sparc64: Fix get_user_pages_fast() wrt. THP.
  sparc64: Add missing HAVE_ARCH_TRANSPARENT_HUGEPAGE.
  sparc: kernel/sbus.c: fix memory leakage
2013-02-15 12:05:57 -08:00
Stef van Os
e0e8398e3a powerpc/85xx: Board support for ppa8548
Initial board support for the Prodrive PPA8548 AMC module. Board
is an MPC8548 AMC platform used in RapidIO systems. This module is
also used to test/work on mainline linux RapidIO software.

PPA8548 overview:
- 1.3 GHz Freescale PowerQUICC III MPC8548 processor
- 1 GB DDR2 @ 266 MHz
- 8 MB NOR flash
- Serial RapidIO 1.2
- 1 x 10/100/1000 BASE-T front ethernet
- 1 x 1000 BASE-BX ethernet on AMC connector

Signed-off-by: Stef van Os <stef.van.os@prodrive.nl>
Acked-by: Timur Tabi <timur@tabi.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-02-15 13:54:10 -06:00
Timur Tabi
d4d801d13b powerpc/fsl: remove extraneous DIU platform functions
The Freescale DIU driver was recently updated to not require every DIU
platform function, so now we can remove the unneeded functions from
some boards.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-02-15 13:53:50 -06:00
Julia Lawall
4700ebd1c3 arch/powerpc/platforms/85xx/p1022_ds.c: adjust duplicate test
Delete successive tests to the same location.  The code tested the result
of a previous call, that itself was already tested.  It is changed to test
the result of the most recent call.

A simplified version of the semantic match that finds this problem is as
follows: (http://coccinelle.lip6.fr/)

// <smpl>
@s exists@
local idexpression y;
expression x,e;
@@

*if ( \(x == NULL\|IS_ERR(x)\|y != 0\) )
 { ... when forall
   return ...; }
... when != \(y = e\|y += e\|y -= e\|y |= e\|y &= e\|y++\|y--\|&y\)
    when != \(XT_GETPAGE(...,y)\|WMI_CMD_BUF(...)\)
*if ( \(x == NULL\|IS_ERR(x)\|y != 0\) )
 { ... when forall
   return ...; }
// </smpl>

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-02-15 13:53:47 -06:00
Arnd Bergmann
69eb383ab7 ARM: imx: MACH_MX31ADS_WM1133_EV1 needs REGULATOR_WM8350
MACH_MX31ADS_WM1133_EV1 already depends on REGULATOR_WM8350,
but that still allows REGULATOR_WM8350 to be a loadable
module. Depending on REGULATOR_WM8350 to be built-in
ensures we cannot create a broken configuration.

Without this patch, building allmodconfig results in:

arch/arm/mach-imx/built-in.o: In function `mx31_wm8350_init':
arch/arm/mach-imx/mach-mx31ads.c:461: undefined reference to `wm8350_register_regulator'
arch/arm/mach-imx/mach-mx31ads.c:471: undefined reference to `wm8350_dcdc_set_slot'
arch/arm/mach-imx/mach-mx31ads.c:473: undefined reference to `wm8350_isink_set_flash'
arch/arm/mach-imx/mach-mx31ads.c:480: undefined reference to `wm8350_dcdc25_set_mode'
arch/arm/mach-imx/mach-mx31ads.c:485: undefined reference to `wm8350_register_led'

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Axel Lin <axel.lin@gmail.com>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
2013-02-15 19:34:05 +01:00
Arnd Bergmann
fe7dc7202d ARM: arch_timer: include linux/errno.h
Patch 8a4da6e "arm: arch_timer: move core to drivers/clocksource"
moved a lot of code out of arch_timer.c, but ended up deleting
too much, which broke some configurations.

Obviously, include linux/errno.h is required to return error
values.

Without this patch, building allmodconfig results in:

arch/arm/kernel/arch_timer.c: In function 'arch_timer_sched_clock_init':
arch/arm/kernel/arch_timer.c:55:11: error: 'ENXIO' undeclared (first use in this function)
arch/arm/kernel/arch_timer.c:55:11: note: each undeclared identifier is reported only once for each function it appears in

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
2013-02-15 19:32:03 +01:00
Hauke Mehrtens
6404b7cb83 MIPS: BCM47XX: use fallback sprom var for board_{rev,type}
An SoC normally do not define path variables for board_rev and
board_type and the Broadcom SDK also uses the nvram values without a
prefix in such cases. Do the same to fill these sprom attributes from
nvram and do not leave them empty, because brcmsmac do not like this.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4679/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-15 19:01:57 +01:00
Hauke Mehrtens
dd54dedd94 MIPS: BCM47XX: select NO_EXCEPT_FILL
The kernel is loaded to 0x80001000 so there is some space left for the
exception handlers and the kernel do not have to reserve some extra
space for them.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4747/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-15 19:01:57 +01:00
Hauke Mehrtens
fe08f8c2c5 MIPS: BCM47XX: select BOOT_RAW
All the boot loaders I have seen are booting the kernel in raw mode by
default. CFE seems to support elf kernel images too, but the default
case is raw for the devices I know of. Select this option to make the
kernel boot on most of the devices with the default options.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4746/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-15 19:01:57 +01:00
Hauke Mehrtens
924ffb7dba MIPS: BCM47XX: trim the nvram values for parsing
Some nvram values on some devices have a newline character at the end
of the value, that caused read errors. Trim the string before reading
the number.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4745/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-15 19:01:57 +01:00
Hauke Mehrtens
111bd981e2 MIPS: BCM47XX: add bcm47xx prefix in front of nvram function names
The nvram functions are exported and used by some normal drivers. To
prevent name clashes with ofter parts of the kernel code add a bcm47xx_
prefix in front of the function names and the header file name.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4744/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-15 19:01:57 +01:00
Hauke Mehrtens
f36738ddfe MIPS: BCM47XX: handle different nvram sizes
The old code just worked for nvram with a size of 0x8000 bytes. This
patch adds support for reading nvram from partitions of 0xF000 and
0x10000 bytes.

There is just 32KB space for the nvram, but most devices do not use the
full size and this code reads the first 32KB in that case and prints a
warning.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4743/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-15 19:01:56 +01:00
Hauke Mehrtens
e58da16f71 MIPS: BCM47XX: rename early_nvram_init to nvram_init
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4742/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-15 19:01:56 +01:00
Hauke Mehrtens
c4485671fb MIPS: BCM47XX: nvram add nand flash support
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4741/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-15 19:01:56 +01:00
Hauke Mehrtens
cc4403e025 MIPS: BCM47XX: return error when init of nvram failed
This makes it possible to handle the case of not being able to read the
nvram ram. This could happen when the code searching for the specific
flash chip have not run jet.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4740/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-15 19:01:56 +01:00
Hauke Mehrtens
ee7e2f3c23 MIPS: BCM47XX: use common error codes in nvram reads
Instead of using our own error codes use some common codes.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4739/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-15 19:01:56 +01:00
Rafał Miłecki
bb76563214 MIPS: bcm47xx: separate functions finding flash window addr
Also check if parallel flash is present at all before accessing it and
add support for serial flash on BCMA bus.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4738/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-15 19:01:56 +01:00
Vineet Gupta
fc32781bfd ARC: [plat-arcfpga] DT arc-uart bindings change: "baud" => "current-speed"
Per Grant's review comment - driver changes via tty tree

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:16:22 +05:30
Vineet Gupta
70b319f2be ARC: Ensure CONFIG_VIRT_TO_BUS is not enabled
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Reported-by: James Hogan <james.hogan@imgtec.com>
2013-02-15 23:16:21 +05:30
Vineet Gupta
3eb3e7dd53 ARC: Fix pt_orig_r8 access
Syscall restarting fixes made pt_regs->orig_r8 a short word, which was
not reflected in the assembler code - thus could potentially break gdb
debugging.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:16:21 +05:30
Vineet Gupta
7f85e5ec0d ARC: [3.9] Fallout of hlist iterator update
Commit 0bbacca "hlist: drop the node parameter from iterators" changed
the iterator across the board - but ARC port being out-of-tree missed
it.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:16:20 +05:30
Vineet Gupta
1e26662993 ARC: 64bit RTSC timestamp hardware issue
The 64bit RTSC is not reliable, causing spurious "jumps" in higher word,
making Linux timekeeping go bonkers. So as of now just use the lower
32bit timestamp.

A cleaner approach would have been removing RTSC support altogether as the
32bit RTSC is equivalent to old TIMER1 based solution, but some customers
can use the 32bit RTSC in SMP syn fashion (vs. TIMER1 which being incore
can't be done easily).

A fallout of this is sched_clock()'s hardware assisted version needs to
go away since it can't use 32bit wrapping counter - instead we use the
generic "weak" jiffies based version.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:16:20 +05:30
Vineet Gupta
d626f547dd ARC: Don't fiddle with non-existent caches
!CONFIG_ARC_HAS_(I|D)CACHE makes Linux disable caches (assuming they
exist in hardware) - mostly for debugging issues with new peripherals.
However, independent of CONFIG_ARC_HAS_(I|D)CACHE, Linux also needs to
handle, non-existant caches, using the information in Cache BCRs (Build
Configuration Reg)

Reported-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:16:19 +05:30
Vineet Gupta
0208c96a9d ARC: Provide a default serial.h for uart drivers needing BASE_BAUD
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:16:18 +05:30
Vineet Gupta
95461a64e9 ARC: [plat-arcfpga] defconfig for fully loaded ARC Linux
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:16:17 +05:30
Vineet Gupta
b830cde5a4 ARC: [Review] Multi-platform image #8: platform registers SMP callbacks
Platforms export their SMP callbacks by populating arc_smp_ops.
The population itself needs to be done pretty early, from init_early
callback.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Arnd Bergmann <arnd@arndb.de>
2013-02-15 23:16:17 +05:30
Vineet Gupta
10b1271875 ARC: [Review] Multi-platform image #7: SMP common code to use callbacks
This again is for switch from singleton platform SMP API to
multi-platform paradigm

Platform code is not yet setup to populate the callbacks, that happens
in next commit

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-02-15 23:16:16 +05:30
Vineet Gupta
fc7943d29e ARC: [Review] Multi-platform image #6: cpu-to-dma-addr optional
All the current platforms can work with 0x8000_0000 based dma_addr_t
since the Bus Bridges typically ignore the top bit (the only excpetion
was Angel4 PCI-AHB bridge which we no longer care for).
That way we don't need plat-specific cpu-addr to bus-addr conversion.

Hooks still provided - just in case a platform has an obscure device
which say needs 0 based bus address.

That way <asm/dma_mapping.h> no longer needs to unconditinally include
<plat/dma_addr.h>

Also verfied that on Angel4 board, other peripherals (IDE-disk / EMAC)
work fine with 0x8000_0000 based dma addresses.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-02-15 23:16:15 +05:30
Vineet Gupta
decae9d3e8 ARC: [Review] Multi-platform image #5: NR_IRQS defined by ARC core
For now this will suffice for all platforms, later exotic ones needs to
get this from DeviceTree

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Arnd Bergmann <arnd@arndb.de>
2013-02-15 23:16:15 +05:30
Vineet Gupta
e97ff121ae ARC: [Review] Multi-platform image #4: Isolate platform headers
-Top level ARC makefile removes -I for platform headers
-asm/irq.h no longer includes plat/irq.h

-platform makefile adds -I for it's specfic platform headers
-platform code to directly include it's plat/irq.h

-Linker script needed plat/memmap.h for CCM info, already in .config

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-02-15 23:16:14 +05:30
Vineet Gupta
877768c84d ARC: [Review] Multi-platform image #3: switch to board callback
-platform API is retired and instead callbacks are used

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-02-15 23:16:14 +05:30
Vineet Gupta
03a6d28cdd ARC: [Review] Multi-platform image #2: Board callback Infrastructure
The orig platform code orgnaization was singleton design pattern - only
one platform (and board thereof) would build at a time.

Thus any platform/board specific code (e.g. irq init, early init ...)
expected by ARC common code was exported as well defined set of APIs,
with only ONE instance building ever.

Now with multiple-platform build requirement, that design of code no
longer holds - multiple board specific calls need to build at the same
time - so ARC common code can't use the API approach, it needs a
callback based design where each board registers it's specific set of
functions, and at runtime, depending on board detection, the callbacks
are used from the registry.

This commit adds all the infrastructure, where board specific callbacks
are specified as a "maThine description".

All the hooks are placed in right spots, no board callbacks registered
yet (with MACHINE_STARt/END constructs) so the hooks will not run.

Next commit will actually convert the platform to this infrastructure.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-02-15 23:16:13 +05:30
Vineet Gupta
93ad700de2 ARC: Fold boards sub-menu into platform/SoC menu
This is more natural and is now doable since the choice constructs are
gone.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-02-15 23:16:13 +05:30
Vineet Gupta
53d98958f5 ARC: [Review] Multi-platform image #1: Kconfig enablement
This mini patchseries addresses the lack of multi-platform-image support
in ARC port.

Older build system only supported one platform(soc) to build at a time
and further only one board of that platform could be built. There was no
technical reason for that - we just didn't have the need.

So the first step towards multi-platform (and multi-board) builds it to
allow build system to do that.

So as applicable, <choice .. endchoice> => <menu .. endmenu>

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-02-15 23:16:12 +05:30
Gilad Ben-Yossef
4368902bb9 ARC: Add support for ioremap_prot API
Implement ioremap_prot() to allow mapping IO memory with variable
protection
via TLB.

Implementing this allows the /dev/mem driver to use its generic access()
VMA callback, which in turn allows ptrace to examine data in memory
mapped regions mapped via /dev/mem, such as Arc DCCM.

The end result is that it is possible to examine values of variables
placed into DCCM in user space programs via GDB.

CC: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
CC: Noam Camus <noamc@ezchip.com>
Acked-by: Vineet Gupta <vgupta@synopsys.com>
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:16:11 +05:30
Vineet Gupta
8c2f4a8dd0 ARC: UAPI Disintegrate arch/arc/include/asm
1. ./genfilelist.pl arch/arc/include/asm/

2. Create arch/arc/include/uapi/asm/Kbuild as follows

	+# UAPI Header export list
	+include include/uapi/asm-generic/Kbuild.asm

3. ./disintegrate-one.pl arch/arc/include/{,uapi/}asm/<above-list>

4. Edit arch/arc/include/asm/Kbuild to remove ref to
	asm-generic/Kbuild.asm

- To work around empty uapi/asm/setup.h added a placholder comment.
- Also a manual #ifdef __ASSEMBLY__ for a late ptrace change

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: David Howells <dhowells@redhat.com>
2013-02-15 23:16:11 +05:30
Vineet Gupta
cbe056f76a ARC: Hostlink Pseudo-Driver for Metaware Debugger
This allows ARC Target to do I/O to host in absence of any peripherals
whatsoever, assisted by Metaware Hostlink facility.

Further we have a FUSE based filesystem which makes us mount/access host
filesystem on target and do fops.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:16:10 +05:30
Vineet Gupta
8b5850f8ac ARC: Support for single cycle Close Coupled Mem (CCM)
* Includes mapping of CCMs in address space
* Annotations to move arbitrary code/data into CCM
* Moving some of the critical code/data into CCM
* Runtime detection/reporting

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:16:10 +05:30
Vineet Gupta
9c57564e26 ARC: perf support (software counters only)
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:16:09 +05:30
Vineet Gupta
7fadc1e8fe ARC: [plat-arfpga] BVCI Latency Unit setup
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:16:08 +05:30
Vineet Gupta
af61742813 ARC: Boot #2: Verbose Boot reporting / feature verification
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:16:07 +05:30
Mischa Jonker
f46121bd26 ARC: kgdb support
Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Jason Wessel <jason.wessel@windriver.com>
Acked-by: Jason Wessel <jason.wessel@windriver.com>
2013-02-15 23:16:07 +05:30
Vineet Gupta
2e651ea159 ARC: Unaligned access emulation
ARC700 doesn't natively support unaligned access, but can be emulated
-Unaligned Access Exception
-Disassembly at the Fault address to find the exact insn (long/short)

Also per Arnd's comment, we runtime control it using 2 sysctl knobs:
* SYSCTL_ARCH_UNALIGN_ALLOW: Runtime enable/disble
* SYSCTL_ARCH_UNALIGN_NO_WARN: Warn on each emulation attempt

Originally contributed by Tim Yao <tim.yao@amlogic.com>

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Tim Yao <tim.yao@amlogic.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-02-15 23:16:06 +05:30
Vineet Gupta
bf14e3b979 sysctl: Enable PARISC "unaligned-trap" to be used cross-arch
PARISC defines /proc/sys/kernel/unaligned-trap to runtime toggle
unaligned access emulation.

The exact mechanics of enablig/disabling are still arch specific, we can
make the sysctl usable by other arches.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Acked-by: Helge Deller <deller@gmx.de>
Cc: "James E.J. Bottomley" <jejb@parisc-linux.org>
Cc: Helge Deller <deller@gmx.de>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: Serge Hallyn <serge.hallyn@canonical.com>
2013-02-15 23:16:05 +05:30
Vineet Gupta
4d86dfbbda ARC: kprobes support
Origin port done by Rajeshwar Ranga

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Rajeshwar Ranga <rajeshwar.ranga@gmail.com>
2013-02-15 23:16:05 +05:30
Vineet Gupta
e65ab5a875 ARC: disassembly (needed by kprobes/kgdb/unaligned-access-emul)
In-kernel disassembler

Due Credits
* Orig written by Rajeshwar Ranga
* Consolidation/cleanups by Mischa Jonker

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Rajeshwar Ranga <rajeshwar.ranga@gmail.com>
Cc: Mischa Jonker <mjonker@synopsys.com>
2013-02-15 23:16:04 +05:30
Vineet Gupta
44c8bb9140 ARC: stacktracing APIs based on dw2 unwinder
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:16:04 +05:30
Vineet Gupta
854a0d9505 ARC: DWARF2 .debug_frame based stack unwinder
-Originally written by Rajeshwar Ranga
-Derived off of generic unwinder in 2.6.19 and adapted to ARC

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Rajeshwar Ranga <rajeshwar.ranga@gmail.com>
2013-02-15 23:16:03 +05:30
Vineet Gupta
41195d236e ARC: SMP support
ARC common code to enable a SMP system + ISS provided SMP extensions.

ARC700 natively lacks SMP support, hence some of the core features are
are only enabled if SoCs have the necessary h/w pixie-dust. This
includes:
-Inter Processor Interrupts (IPI)
-Cache coherency
-load-locked/store-conditional
...

The low level exception handling would be completely broken in SMP
because we don't have hardware assisted stack switching. Thus a fair bit
of this code is repurposing the MMU_SCRATCH reg for event handler
prologues to keep them re-entrant.

Many thanks to Rajeshwar Ranga for his initial "major" contributions to
SMP Port (back in 2008), and to Noam Camus and Gilad Ben-Yossef for help
with resurrecting that in 3.2 kernel (2012).

Note that this platform code is again singleton design pattern - so
multiple SMP platforms won't build at the moment - this deficiency is
addressed in subsequent patches within this series.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Rajeshwar Ranga <rajeshwar.ranga@gmail.com>
Cc: Noam Camus <noamc@ezchip.com>
Cc: Gilad Ben-Yossef <gilad@benyossef.com>
2013-02-15 23:16:02 +05:30
Vineet Gupta
0ef88a54aa ARC: Diagnostics: show_regs() etc
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:16:02 +05:30
Vineet Gupta
fa1c3ff935 ARC: Module support
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:16:01 +05:30
Vineet Gupta
4788a5942b ARC: Support for high priority interrupts in the in-core intc
There is a bit of hack/kludge right now where we disable preemption if a
L2 (High prio) IRQ is taken while L1 (Low prio) is active.

Need to revisit this

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:16:01 +05:30
Vineet Gupta
769bc1fd7b ARC: OProfile support
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Robert Richter <rric@kernel.org>
Cc: oprofile-list@lists.sf.net
Reviewed-by: James Hogan <james.hogan@imgtec.com>
2013-02-15 23:16:00 +05:30
Vineet Gupta
01b812bcce ARC: Futex support
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:16:00 +05:30
Vineet Gupta
547f112571 ARC: ptrace support
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-02-15 23:15:59 +05:30
Vineet Gupta
080c37473e ARC: [optim] Cache "current" in Register r25
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:15:58 +05:30
Vineet Gupta
8872e9e513 ARC: [plat-arcfpga] defconfig
With this we get to a running kernel on ISS

---------------------------------->8-----------------------------------
Linux version 3.8.0-rc3+ (vineetg@vineetg-Latitude) (gcc version 4.4.7
(ARCompact elf32 toolchain (built 20121213)) ) #3 Thu Jan 17 14:22:05
IST 2013
Board "arc-angel4" from snps (Manufacturer)
Memory size set via devicetree 256M
[plat-arcfpga]: registering early dev resources
bootconsole [early_ARCuart0] enabled
pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
pcpu-alloc: [0] 0
Built 1 zonelists in Zone order, mobility grouping on.  Total pages:
32624
Kernel command line: console=ttyARC0,115200n8
PID hash table entries: 1024 (order: -1, 4096 bytes)
Dentry cache hash table entries: 32768 (order: 4, 131072 bytes)
Inode-cache hash table entries: 16384 (order: 3, 65536 bytes)
Memory Available: 248M / 256M (1312K code, 463K data, 4184K init, 1400K
reserv)
SLUB: Genslabs=12, HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
NR_IRQS:16
Console: colour dummy device 80x25
Calibrating delay loop... 39.73 BogoMIPS (lpj=198656)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 1024
devtmpfs: initialized
[plat-arcfpga]: registering device resources
bio: create slab <bio-0> at 0
Switching to clocksource ARC RTSC
io scheduler noop registered (default)
arc-uart: ttyARC0 at MMIO 0xc0fc1000 (irq = 5) is a arc-uart
console [ttyARC0] enabled, bootconsole disabled
console [ttyARC0] enabled, bootconsole disabled
mousedev: PS/2 mouse device common for all mice
Warning: unable to open an initial console.
Freeing unused kernel memory: 4184k [80002000] to [80418000]
Mounting proc
Mounting sysfs
Mounting devpts
Setting hostname to ARCLinux
Starting System logger (syslogd)
Bringing up loopback device
ifconfig: socket: Function not implemented
route: socket: Function not implemented
Disk not detected !
Mounting tmpfs
mount: mounting tmpfs on /dev/shm failed: Invalid argument
/etc/init.d/rcS: line 76: can't create /proc/sys/kernel/msgmni:
nonexistent directory

Please press Enter to activate this console.
***********************************************************************
                        Welcome to ARCLinux
***********************************************************************
[ARCLinux]$

---------------------------------->8-----------------------------------

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:15:58 +05:30
Vineet Gupta
c08098f28e ARC: Last bits (stubs) to get to a running kernel with UART
This was part of port buildup strategy from Arnd to have a minimal kernel
at first and then add optional features (stacktracing, ptrace, smp,
kprobes, oprofile....)

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:15:57 +05:30
Vineet Gupta
abe11ddea1 ARC: [plat-arcfpga]: Enabling DeviceTree for Angel4 board
* arc-uart platform device now populated dynamically, using
  of_platform_populate() - applies to any other device whatsoever.

* uart in turn requires incore arc-intc to be also present in DT

* A irq-domain needs to be instantiated for IRQ requests by DT probed
  device (e.g. arc-uart)

TODO: switch over to linear irq domain once all devs have been
      transitioned to DT

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Arnd Bergmann <arnd@arndb.de>
2013-02-15 23:15:57 +05:30
Vineet Gupta
450dd430bf ARC: [DeviceTree] Convert some Kconfig items to runtime values
* mem size now runtime configured (prev CONFIG_ARC_PLAT_SDRAM_SIZE)
* core cpu clk runtime configured (prev CONFIG_ARC_PLAT_CLK)

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Grant Likely <grant.likely@secretlab.ca>
2013-02-15 23:15:56 +05:30
Vineet Gupta
999159a538 ARC: [DeviceTree] Basic support
This is minimal infrastructure needed for devicetree work.
It uses an a sample "skeleton" devicetree - embedded in kernel image -
to print the board, manufacturer by parsing the top-level "compatible"
string.

As of now we don't need any additional "board" specific "machine_desc".

TODO: support interpreting the command line as boot-loader passed dtb

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Rob Herring <rob.herring@calxeda.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
2013-02-15 23:15:55 +05:30
Vineet Gupta
ee36d17221 ARC: [plat-arcfpga] Static platform device for CONFIG_SERIAL_ARC
N.B. This is old style of hardcoding platform device specific info
in code and it's instantiation thererof using platform_add_devices().
Subsequent patches replace this with DeviceTree based runtime probe.

This patch has been retained just as an example of "don't-do-this" for
newer kernel ports.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Arnd Bergmann <arnd@arndb.de>
2013-02-15 23:15:55 +05:30
Vineet Gupta
c121c5063c ARC: Boot #1: low-level, setup_arch(), /proc/cpuinfo, mem init
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-02-15 23:15:54 +05:30
Vineet Gupta
1162b0701b ARC: I/O and DMA Mappings
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:15:54 +05:30
Vineet Gupta
fbd7053a78 ARC: Page Fault handling
This includes recent changes to make handler "retry" and/or "killable"

The killable (early exit) logic is loosely based on how SH implements it
	return if SIGKILL + either of VM_FAULT_OOM or VM_FAULT_RETRY
which is different from Hexagon implementation which would NOT early
exit for
	SIGKILL + VM_FAULT_OOM + !VM_FAULT_RETRY

credits: Non executable stack support from Simon Spooner

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:15:53 +05:30
Vineet Gupta
d79e678d74 ARC: TLB flush Handling
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:15:53 +05:30
Vineet Gupta
cc562d2eae ARC: MMU Exception Handling
* MMU I-TLB / D-TLB Miss Exceptions
  - Fast Path TLB Refill Handler
  - slowpath TLB creation via do_page_fault() -> update_mmu_cache()
* Duplicate PD Exception Handler

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:15:52 +05:30
Vineet Gupta
f1f3347da9 ARC: MMU Context Management
ARC700 MMU provides for tagging TLB entries with a 8-bit ASID to avoid
having to flush the TLB every task switch.

It also allows for a quick way to invalidate all the TLB entries for
task useful for:
* COW sementics during fork()
* task exit()ing

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:15:51 +05:30
Vineet Gupta
5dda4dc570 ARC: Page Table Management
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:15:51 +05:30
Vineet Gupta
95d6976d20 ARC: Cache Flush Management
* ARC700 has VIPT L1 Caches
* Caches don't snoop and are not coherent
* Given the PAGE_SIZE and Cache associativity, we don't support aliasing
  D$ configurations (yet), but do allow aliasing I$ configs

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:15:50 +05:30
Vineet Gupta
55bb9480f9 ARC: [Review] Prevent incorrect syscall restarts
Per Al Viro's "signals for dummies" https://lkml.org/lkml/2012/12/6/366
there are 3 golden rules for (not) restarting syscalls:

"	What we need to guarantee is
* restarts do not happen on signals caught in interrupts or exceptions
* restarts do not happen on signals caught in sigreturn()
* restart should happen only once, even if we get through do_signal()
  many times."

ARC Port already handled #1, this patch fixes #2 and #3.

We use the additional state in pt_regs->orig_r8 to ckh if restarting
has already been done once.

Thanks to Al Viro for spotting this.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Al Viro <viro@ZenIV.linux.org.uk>
2013-02-15 23:15:50 +05:30
Vineet Gupta
5c39c0ab5e ARC: [Review] Preparing to fix incorrect syscall restarts due to signals
To avoid multiple syscall restarts (multiple signals) or no restart at
all (sigreturn), we need just an extra bit of state "literally 1 bit" in
struct pt_regs. orig_r8 is the best place to do this, however given the
way it is encoded currently, we can't add anything simplistically.

Current orig_r8:
* syscalls   -> 1 to NR_SYSCALLS
* Exceptions -> NR_SYSCALLS + 1
* Break-point-> NR_SYSCALLS + 2

In new scheme it is a bit-field
* lower short word contains the  exact event type (and a new bit to represent
   restart semantics : if syscall was already / can't be restarted)
* upper short word optionally containing the syscall num - needed by
  likes of tracehooks etc

This patch only changes how orig_r8 is organised and nothing should
change behaviourily.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Al Viro <viro@ZenIV.linux.org.uk>
2013-02-15 23:15:49 +05:30
Vineet Gupta
c3581039b6 ARC: Signal handling
Includes following fixes courtesy review by Al-Viro

* Tracer poke to Callee-regs were lost

  Before going off into do_signal( ) we save the user-mode callee regs
  (as they are not saved by default as part of pt_regs). This is to make
  sure that that a Tracer (if tracing related signal) is able to do likes
  of PEEKUSR(callee-reg).

  However in return path we were simply discarding the user-mode callee
  regs, which would break a POKEUSR(callee-reg) from a tracer.

* Issue related to multiple syscall restarts are addressed in next patch

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Al Viro <viro@ZenIV.linux.org.uk>
Acked-by: Jonas Bonn <jonas@southpole.se>
2013-02-15 23:03:30 +05:30
H. Peter Anvin
0da3e7f526 Merge branch 'x86/mm2' into x86/mm
x86/mm2 is testing out fine, but has developed conflicts with x86/mm
due to patches in adjacent code.  Merge them so we can drop x86/mm2
and have a unified branch.

Resolved Conflicts:
	arch/x86/kernel/setup.c
2013-02-15 09:25:08 -08:00
Rafael J. Wysocki
60a406d1de Merge branch 'next/cpufreq-exynos' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung
* 'next/cpufreq-exynos' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  cpufreq: exynos: Fix hang in pm handler due to frequency mismatch
  cpufreq: exynos: Initialize return variable
  cpufreq: exynos: Fix unsigned variable being checked for negative value
  cpufreq: exynos: Get booting freq value in exynos_cpufreq_init
  cpufreq: exynos: Show list of available frequencies
  cpufreq: exynos: Add missing static
  cpufreq: exynos: Split exynos_target function into two functions
  cpufreq: exynos: Use APLL_FREQ macro for cpu divider value
  cpufreq: exynos: Check old & new frequency early
  cpufreq: exynos: Remove unused variable & IS_ERR
2013-02-15 14:00:15 +01:00
Rafael J. Wysocki
4419fbd4b4 Merge branch 'pm-cpufreq'
* pm-cpufreq: (55 commits)
  cpufreq / intel_pstate: Fix 32 bit build
  cpufreq: conservative: Fix typos in comments
  cpufreq: ondemand: Fix typos in comments
  cpufreq: exynos: simplify .init() for setting policy->cpus
  cpufreq: kirkwood: Add a cpufreq driver for Marvell Kirkwood SoCs
  cpufreq/x86: Add P-state driver for sandy bridge.
  cpufreq_stats: do not remove sysfs files if frequency table is not present
  cpufreq: Do not track governor name for scaling drivers with internal governors.
  cpufreq: Only call cpufreq_out_of_sync() for driver that implement cpufreq_driver.target()
  cpufreq: Retrieve current frequency from scaling drivers with internal governors
  cpufreq: Fix locking issues
  cpufreq: Create a macro for unlock_policy_rwsem{read,write}
  cpufreq: Remove unused HOTPLUG_CPU code
  cpufreq: governors: Fix WARN_ON() for multi-policy platforms
  cpufreq: ondemand: Replace down_differential tuner with adj_up_threshold
  cpufreq / stats: Get rid of CPUFREQ_STATDEVICE_ATTR
  cpufreq: Don't check cpu_online(policy->cpu)
  cpufreq: add imx6q-cpufreq driver
  cpufreq: Don't remove sysfs link for policy->cpu
  cpufreq: Remove unnecessary use of policy->shared_type
  ...
2013-02-15 13:59:07 +01:00
Rafael J. Wysocki
7113fe74c1 Merge branch 'pm-assorted'
* pm-assorted:
  suspend: enable freeze timeout configuration through sys
  ACPI: enable ACPI SCI during suspend
  PM: Introduce suspend state PM_SUSPEND_FREEZE
  PM / Runtime: Add new helper function: pm_runtime_active()
  PM / tracing: remove deprecated power trace API
  PM: don't use [delayed_]work_pending()
  PM / Domains: don't use [delayed_]work_pending()
2013-02-15 13:58:54 +01:00
Rafael J. Wysocki
e8f71df723 Merge branch 'acpi-cleanup'
* acpi-cleanup: (21 commits)
  ACPI / hotplug: Fix concurrency issues and memory leaks
  ACPI: Remove the use of CONFIG_ACPI_CONTAINER_MODULE
  ACPI / scan: Full transition to D3cold in acpi_device_unregister()
  ACPI / scan: Make acpi_bus_hot_remove_device() acquire the scan lock
  ACPI: Drop the container.h header file
  ACPI / Documentation: refer to correct file for acpi_platform_device_ids[] table
  ACPI / scan: Make container driver use struct acpi_scan_handler
  ACPI / scan: Remove useless #ifndef from acpi_eject_store()
  ACPI: Unbind ACPI drv when probe failed
  ACPI: sysfs eject support for ACPI scan handlers
  ACPI / scan: Follow priorities of IDs when matching scan handlers
  ACPI / PCI: pci_slot: replace printk(KERN_xxx) with pr_xxx()
  ACPI / dock: Fix acpi_bus_get_device() check in drivers/acpi/dock.c
  ACPI / scan: Clean up acpi_bus_get_parent()
  ACPI / platform: Use struct acpi_scan_handler for creating devices
  ACPI / PCI: Make PCI IRQ link driver use struct acpi_scan_handler
  ACPI / PCI: Make PCI root driver use struct acpi_scan_handler
  ACPI / scan: Introduce struct acpi_scan_handler
  ACPI / scan: Make scanning of fixed devices follow the general scheme
  ACPI: Drop device start operation that is not used
  ...
2013-02-15 13:58:30 +01:00
Arnd Bergmann
55ccb1a8b4 ARM: omap2: include linux/errno.h in hwmod_reset
The newly created omap_hwmod_reset.c is missing an
include of linux/errno.h in commit c02060d8 "ARM:
OMAP4+: AESS: enable internal auto-gating during
initial setup". It still works in omap2_defconfig,
but not in all other combinations.

Without this patch, building allmodconfig results in:

arch/arm/mach-omap2/omap_hwmod_reset.c: In function 'omap_hwmod_aess_preprogram':
arch/arm/mach-omap2/omap_hwmod_reset.c:47:11: error: 'EINVAL' undeclared (first use in this function)
arch/arm/mach-omap2/omap_hwmod_reset.c:47:11: note: each undeclared identifier is reported only once for each function it appears in

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Tony Lindgren <tony@atomide.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Sebastien Guiriec <s-guiriec@ti.com>
2013-02-15 13:36:47 +01:00
Arnd Bergmann
acb7452369 Linux 3.8-rc5
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Merge branch 'omap/multiplatform-fixes', tag 'v3.8-rc5' into next/multiplatform

The omap multiplatform support uncovered a bug in the cwdavinci_cpdma
code and was missing two drivers that are enabled now but are not
quite ready for multiplatform, as found by allyesconfig builds.

There is also a conflict generated by automated merge in
arch/arm/mach-omap2/drm.c between a bug fix that went into v3.8-rc5
and a different version of the same fix that went into the
omap/multiplatform branch. This merge removes the extraneous
 #include that was causing build errors.

* omap/multiplatform-fixes:
  net: cwdavinci_cpdma: export symbols for cpsw
  remoteproc: omap: depend on OMAP_MBOX_FWK
  [media] davinci: do not include mach/hardware.h

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-02-15 13:31:52 +01:00
Satoru Takeuchi
36dfbbf136 timers/x86/hpet: Use HPET_COUNTER to specify the hpet counter in vread_hpet()
vread_hpet() uses "0xf0" as the offset of the hpet counter. To
clarify the meaning of this code, it should use symbolic name,
HPET_COUNTER, instead.

Signed-off-by: Satoru Takeuchi <takeuchi_satoru@jp.fujitsu.com>
Cc: H. Peter Anvin <hpa@linux.intel.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2013-02-15 12:13:18 +01:00
Michael Neuling
81afe7d101 powerpc: Add transactional memory to pseries and ppc64 defconfigs
Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-15 17:02:25 +11:00
Michael Neuling
3d72bbc407 powerpc: Add config option for transactional memory
Kconfig option for transactional memory on powerpc.

Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-15 17:02:24 +11:00
Michael Neuling
b9eaee5a8a powerpc: Add transactional memory to POWER8 cpu features
Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-15 17:02:24 +11:00
Michael Neuling
2b0a576d15 powerpc: Add new transactional memory state to the signal context
This adds the new transactional memory archtected state to the signal context
in both 32 and 64 bit.

Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-15 17:02:23 +11:00
Michael Neuling
bc2a9408fa powerpc: Hook in new transactional memory code
This hooks the new transactional memory code into context switching, FP/VMX/VMX
unavailable and exception return.

Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-15 17:02:23 +11:00
Michael Neuling
f54db641b9 powerpc: Routines for FP/VSX/VMX unavailable during a transaction
We do lazy FP but not lazy TM (ie. userspace starts with MSR TM=1 FP=0).  Hence
if userspace does an FP instruction during a transaction, we'll take an
fp unavailable exception.

This adds functions needed to handle this case.  We have to inject the current
FP state into the checkpoint so that the hardware can decide what to do with
the transaction.  We can't inject only the FP so we have to do a full treclaim
and recheckpoint to inject just the FP state.  This will cause the transaction
to be marked as aborted by the hardware.

This just add the routines needed to do this for FP, VMX and VSX.  It doesn't
hook them into the rest of the code yet.

Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-15 17:02:23 +11:00
Michael Neuling
d0c0c9a13f powerpc: Add transactional memory unavaliable execption handler
These should never happen since we always turn on MSR TM when in userspace. We
don't do lazy TM.

Hence if we hit this, we barf and kill the task as something's gone horribly
wrong.

Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-15 17:02:22 +11:00
Michael Neuling
fb09692e71 powerpc: Add reclaim and recheckpoint functions for context switching transactional memory processes
When we switch out a task, we need to save both the checkpointed and the
speculated state into the thread struct.

Similarly when we are switching in a task we need to load both the checkpointed
and speculated state.  If the task was using FP, we non-lazily reload both the
original and the speculative FP register states.  This is because the kernel
doesn't see if/when a TM rollback occurs, so if we take an FP unavoidable
later, we are unable to determine which set of FP regs need to be restored.

This simply adds these functions.  It doesn't hook them into the existing code
yet.

Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-15 16:58:53 +11:00
Michael Neuling
a2dcbb32f0 powerpc: Add FP/VSX and VMX register load functions for transactional memory
This adds functions to restore the state of the FP/VSX registers from
what's stored in the thread_struct.  Two version for FP/VSX are required
since one restores them from transactional/checkpoint side of the
thread_struct and the other from the speculated side.

Similar functions are added for VMX registers.

Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-15 16:58:52 +11:00
Michael Neuling
98ae22e15b powerpc: Add helper functions for transactional memory context switching
Here we add the helper functions to be used when context switching.  These
allow us to fully reclaim and recheckpoint a transaction.

We introduce a new paca field called tm_scratch to help us store away register
values when doing the low level tm reclaim register save.

Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-15 16:58:52 +11:00
Michael Neuling
afc07701ce powerpc: Add transactional memory paca scratch register to show_regs
Add transactional memory paca scratch register to show_regs.  This is useful
for debugging.

Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-15 16:58:51 +11:00
Michael Neuling
97a0aac9b8 powerpc: Register defines for various transactional memory registers
Defines for MSR bits and transactional memory related SPRs TFIAR, TEXASR and
TEXASRU.

Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-15 16:58:51 +11:00
Michael Neuling
8b3c34cf0e powerpc: New macros for transactional memory support
This adds new macros for saving and restoring checkpointed architected state
from and to the thread_struct.

It also adds some debugging macros for when your brain explodes trying to debug
your transactional memory enabled kernel.

Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-15 16:58:50 +11:00
Michael Neuling
f4c3aff223 powerpc: Add additional state needed for transactional memory to thread struct
Set of new archtected state for saving away on context switch.

Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-15 16:58:50 +11:00
Michael Neuling
14c39a4cf6 powerpc: Add new instructions for transactional memory
Here we define the new instructions we need for transactional memory in the
kernel.  This is so we can support compiling with binutils that don't support
the new transactional memory instructions.

Transactional memory results in two sets of architected state (GPRs/VSRs
etc).

treclaim allows us to read the checkpointed state (from the tbegin) so that we
can store it away on a context switch.  It does this by overwriting the exiting
architected state, so you have to save that away before you treclaim.  treclaim
will also abort a transaction, so you can give a register value which contains
an abort reason.

trecheckpoint allows us to inject into the checkpointed state as if it were at
the tbegin.  It does this by copying the current architected state into the
checkpointed state.

Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-15 16:58:49 +11:00
Michael Neuling
6a6d541f33 powerpc: Add new CPU feature bit for transactional memory
Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-15 16:58:49 +11:00
Michael Ellerman
25e138149c powerpc: Apply early paca fixups to boot_paca and the boot cpu's paca
In commit 466921c we added a hack to set the paca data_offset to zero so
that per-cpu accesses would work on the boot cpu prior to per-cpu areas
being setup. This fixed a problem with lockdep touching per-cpu areas
very early in boot.

However if we combine CONFIG_LOCK_STAT=y with any of the PPC_EARLY_DEBUG
options, we can hit the same problem in udbg_early_init(). To avoid that
we need to set the data_offset of the boot_paca also. So factor out the
fixup logic and call it for both the boot_paca, and "the paca of the
boot cpu".

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Tested-by: Geoff Levand <geoff@infradead.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-15 16:55:06 +11:00
Geoff Levand
6a7e406419 powerpc: Move boot_paca into early_setup
The powerpc boot_paca symbol is now only used within the
early_setup() routine, so move it from its global definition
into early_setup().

Signed-off-by: Geoff Levand <geoff@infradead.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-15 16:54:48 +11:00
Geoff Levand
69fde0210e powerpc/ps3: Refresh ps3_defconfig
Signed-off-by: Geoff Levand <geoff@infradead.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-15 16:54:45 +11:00
Geoff Levand
97db7f7d05 powerpc/ps3: Increase verbosity of htab errors
Signed-off-by: Geoff Levand <geoff@infradead.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-15 16:54:42 +11:00
Geoff Levand
4a564c4d1f powerpc/ps3: Add macro PS3_VERBOSE_RESULT
To allow more control of the verbosity of ps3_result() add a check
for the preprocessor macro PS3_VERBOSE_RESULT that builds a verbose
verion of the ps3_result() routine.

Signed-off-by: Geoff Levand <geoff@infradead.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-15 16:54:39 +11:00
Paul Mackerras
deb26c274d powerpc/kvm/book3s_pr: Fix compilation on 32-bit machines
Commit a413f474a0 ("powerpc: Disable relocation on exceptions whenever
PR KVM is active") added calls to pSeries_disable_reloc_on_exc() and
pSeries_enable_reloc_on_exc() to book3s_pr.c, and added declarations
of those functions to <asm/hvcall.h>, but didn't add an include of
<asm/hvcall.h> to book3s_pr.c.  64-bit kernels seem to get hvcall.h
included via some other path, but 32-bit kernels fail to compile with:

arch/powerpc/kvm/book3s_pr.c: In function ‘kvmppc_core_init_vm’:
arch/powerpc/kvm/book3s_pr.c:1300:4: error: implicit declaration of function ‘pSeries_disable_reloc_on_exc’ [-Werror=implicit-function-declaration]
arch/powerpc/kvm/book3s_pr.c: In function ‘kvmppc_core_destroy_vm’:
arch/powerpc/kvm/book3s_pr.c:1316:4: error: implicit declaration of function ‘pSeries_enable_reloc_on_exc’ [-Werror=implicit-function-declaration]
cc1: all warnings being treated as errors
make[2]: *** [arch/powerpc/kvm/book3s_pr.o] Error 1
make[1]: *** [arch/powerpc/kvm] Error 2
make: *** [sub-make] Error 2

This fixes it by adding an include of hvcall.h.

Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-15 16:54:36 +11:00
Paul Mackerras
0acb91112a powerpc/kvm/book3s_hv: Preserve guest CFAR register value
The CFAR (Come-From Address Register) is a useful debugging aid that
exists on POWER7 processors.  Currently HV KVM doesn't save or restore
the CFAR register for guest vcpus, making the CFAR of limited use in
guests.

This adds the necessary code to capture the CFAR value saved in the
early exception entry code (it has to be saved before any branch is
executed), save it in the vcpu.arch struct, and restore it on entry
to the guest.

Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-15 16:54:33 +11:00
Paul Mackerras
1707dd1613 powerpc: Save CFAR before branching in interrupt entry paths
Some of the interrupt vectors on 64-bit POWER server processors are
only 32 bytes long, which is not enough for the full first-level
interrupt handler.  For these we currently just have a branch to an
out-of-line handler.  However, this means that we corrupt the CFAR
(come-from address register) on POWER7 and later processors.

To fix this, we split the EXCEPTION_PROLOG_1 macro into two pieces:
EXCEPTION_PROLOG_0 contains the part up to the point where the CFAR
is saved in the PACA, and EXCEPTION_PROLOG_1 contains the rest.  We
then put EXCEPTION_PROLOG_0 in the short interrupt vectors before
we branch to the out-of-line handler, which contains the rest of the
first-level interrupt handler.  To facilitate this, we define new
_OOL (out of line) variants of STD_EXCEPTION_PSERIES, etc.

In order to get EXCEPTION_PROLOG_0 to be short enough, i.e., no more
than 6 instructions, it was necessary to move the stores that move
the PPR and CFAR values into the PACA into __EXCEPTION_PROLOG_1 and
to get rid of one of the two HMT_MEDIUM instructions.  Previously
there was a HMT_MEDIUM_PPR_DISCARD before the prolog, which was
nop'd out on processors with the PPR (POWER7 and later), and then
another HMT_MEDIUM inside the HMT_MEDIUM_PPR_SAVE macro call inside
__EXCEPTION_PROLOG_1, which was nop'd out on processors without PPR.
Now the HMT_MEDIUM inside EXCEPTION_PROLOG_0 is there unconditionally
and the HMT_MEDIUM_PPR_DISCARD is not strictly necessary, although
this leaves it in for the interrupt vectors where there is room for
it.

Previously we had a handler for hypervisor maintenance interrupts at
0xe50, which doesn't leave enough room for the vector for hypervisor
emulation assist interrupts at 0xe40, since we need 8 instructions.
The 0xe50 vector was only used on POWER6, as the HMI vector was moved
to 0xe60 on POWER7.  Since we don't support running in hypervisor mode
on POWER6, we just remove the handler at 0xe50.

This also changes denorm_exception_hv to use EXCEPTION_PROLOG_0
instead of open-coding it, and removes the HMT_MEDIUM_PPR_DISCARD
from the relocation-on vectors (since any CPU that supports
relocation-on interrupts also has the PPR).

Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-15 16:54:30 +11:00
Paul Mackerras
6100209bf6 powerpc: Remove Cell-specific relocation-on interrupt vector code
The Cell processor doesn't support relocation-on interrupts, so we
don't need relocation-on versions of the interrupt vectors that are
purely Cell-specific.  This removes them.

Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-15 16:54:22 +11:00
Konrad Rzeszutek Wilk
e9daff24a2 Revert "xen PVonHVM: use E820_Reserved area for shared_info"
This reverts commit 9d02b43dee.

We are doing this b/c on 32-bit PVonHVM with older hypervisors
(Xen 4.1) it ends up bothing up the start_info. This is bad b/c
we use it for the time keeping, and the timekeeping code loops
forever - as the version field never changes. Olaf says to
revert it, so lets do that.

Acked-by: Olaf Hering <olaf@aepfle.de>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2013-02-14 21:29:31 -05:00
Konrad Rzeszutek Wilk
5eb65be2d9 Revert "xen/PVonHVM: fix compile warning in init_hvm_pv_info"
This reverts commit a7be94ac8d.

Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2013-02-14 21:29:27 -05:00
Alexander Graf
899f7b26bc Merge commit 'origin/next' into kvm-ppc-next 2013-02-15 01:12:59 +01:00
Randy Dunlap
cb8081cb6b lguest: select CONFIG_TTY to build properly.
Fix kconfig warning for LGUEST_GUEST config by selecting TTY:

warning: (KVMTOOL_TEST_ENABLE && LGUEST_GUEST) selects VIRTIO_CONSOLE which has unmet direct dependencies (VIRTIO && TTY)

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Joe Millenbach <jmillenbach@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-02-14 16:01:55 -08:00
H. Peter Anvin
95c9608478 x86, mm: Move reserving low memory later in initialization
Move the reservation of low memory, except for the 4K which actually
does belong to the BIOS, later in the initialization; in particular,
after we have already reserved the trampoline.

The current code locates the trampoline as high as possible, so by
deferring the allocation we will still be able to reserve as much
memory as is possible.  This allows us to run with reservelow=640k
without getting a crash on system startup.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Link: http://lkml.kernel.org/n/tip-0y9dqmmsousf69wutxwl3kkf@git.kernel.org
2013-02-14 15:21:25 -08:00
Arnd Bergmann
56cc6cb707 ARM defconfigs: add missing inclusions of linux/platform_device.h
Patch 16559ae "kgdb: remove #include <linux/serial_8250.h> from kgdb.h"
removed an implicit inclusion of linux/platform_device.h
In a number of places. This adds back explicit inclusions in a few
more places I found.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-02-14 15:14:32 -08:00
Arnd Bergmann
7f206d499a ARM: sa1100/assabet: include platform_device.h directly
Patch "16559ae kgdb: remove #include <linux/serial_8250.h> from kgdb.h
caused assabet_defconfig to fail, since assabet.c did not
itself include linux/platform_device.h, although it needs it:

In file included from include/linux/mfd/ucb1x00.h:13:0,
                 from arch/arm/mach-sa1100/assabet.c:19:
include/linux/mfd/mcp.h:22:16: error: field 'attached_device' has incomplete type
include/linux/mfd/mcp.h:48:23: error: field 'drv' has incomplete type
In file included from arch/arm/mach-sa1100/assabet.c:19:0:
include/linux/mfd/ucb1x00.h:137:16: error: field 'dev' has incomplete type
arch/arm/mach-sa1100/assabet.c: In function 'assabet_init':
arch/arm/mach-sa1100/assabet.c:343:3: error: implicit declaration of function 'platform_device_register_simple' [-Wimplicit-function-declaration]

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-02-14 15:03:29 -08:00
Paul Gortmaker
19348e749e x86: ptrace.c only needs export.h and not the full module.h
Commit cb57a2b4cf ("x86-32: Export
kernel_stack_pointer() for modules") added an include of the
module.h header in conjunction with adding an EXPORT_SYMBOL_GPL
of kernel_stack_pointer.

But module.h should be avoided for simple exports, since it in turn
includes the world.  Swap the module.h for export.h instead.

Cc: Jiri Kosina <trivial@kernel.org>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Link: http://lkml.kernel.org/r/1360872842-28417-1-git-send-email-paul.gortmaker@windriver.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-02-14 12:56:12 -08:00
Nicolas Schichan
462738f4f0 ARM: net: bpf_jit: fix emit_swap16() for non ARMv6+.
The original code was generating an lsl instructions using the value
of ARM_R8 (skb_headlen, possibly uninitialized if no skb_headlen
access was required) as a shift amount.

Signed-off-by: Nicolas Schichan <nschichan@freebox.fr>
Acked-by: Mircea Gherzan <mgherzan@gmail.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
2013-02-14 13:26:44 -05:00
Tony Lindgren
64ff167333 Merge branch 'usbhost17-for-arm-soc' of git://github.com/rogerq/linux into omap-for-v3.9/usb 2013-02-14 08:36:17 -08:00
Jonas Bonn
a81252d75e openrisc: fix up vmalloc page table loading
vmalloc'ed pages are faulted into a process' page tables on demand.  In
order to facilitate this, do_page_fault needs to know whether it was
called via a page fault exception or a TLB-miss exception.

This patch adds a wrapper around the _x_page_fault_handler entry points
that the TLB-miss exceptions can call into in order to have the relevant
parameter set to satisfy do_page_fault.

This fixes a bug and is "good enough" for now.  That said, this whole
handling of vmalloc needs to be audited for correctness at some point.

Signed-off-by: Jonas Bonn <jonas@southpole.se>
2013-02-14 16:39:26 +01:00
Hendrik Brueckner
e80cfc31d8 s390/module: Add missing R_390_NONE relocation type
Allow loading of kernel modules that have relocations
of type R_390_NONE.

Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-02-14 15:55:26 +01:00
Hendrik Brueckner
23d18e8d93 s390/cleanup: rename SPP to LPP
The set-program-parameter (SPP) instruction has been renamed to
load-program-parameter (LPP) (see SA23-2260).  Reflect this change
and rename all macro/instruction references.

Also remove the duplicate SPP/LPP entry in the kernel disassembler
instruction list.

Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-02-14 15:55:24 +01:00
Martin Schwidefsky
abf09bed3c s390/mm: implement software dirty bits
The s390 architecture is unique in respect to dirty page detection,
it uses the change bit in the per-page storage key to track page
modifications. All other architectures track dirty bits by means
of page table entries. This property of s390 has caused numerous
problems in the past, e.g. see git commit ef5d437f71
"mm: fix XFS oops due to dirty pages without buffers on s390".

To avoid future issues in regard to per-page dirty bits convert
s390 to a fault based software dirty bit detection mechanism. All
user page table entries which are marked as clean will be hardware
read-only, even if the pte is supposed to be writable. A write by
the user process will trigger a protection fault which will cause
the user pte to be marked as dirty and the hardware read-only bit
is removed.

With this change the dirty bit in the storage key is irrelevant
for Linux as a host, but the storage key is still required for
KVM guests. The effect is that page_test_and_clear_dirty and the
related code can be removed. The referenced bit in the storage
key is still used by the page_test_and_clear_young primitive to
provide page age information.

For page cache pages of mappings with mapping_cap_account_dirty
there will not be any change in behavior as the dirty bit tracking
already uses read-only ptes to control the amount of dirty pages.
Only for swap cache pages and pages of mappings without
mapping_cap_account_dirty there can be additional protection faults.
To avoid an excessive number of additional faults the mk_pte
primitive checks for PageDirty if the pgprot value allows for writes
and pre-dirties the pte. That avoids all additional faults for
tmpfs and shmem pages until these pages are added to the swap cache.

Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-02-14 15:55:23 +01:00
Hendrik Brueckner
486c0a0bc8 s390/mm: Fix crst upgrade of mmap with MAP_FIXED
Right now the page table upgrade does not happen if the end address
of a fixed mapping is greater than TASK_SIZE.
Enhance s390_mmap_check() to handle MAP_FIXED mappings correctly.

Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Reviewed-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-02-14 15:55:22 +01:00
Heiko Carstens
a4e69245bd s390/linker skript: discard exit.data at runtime
Discard exit.data section at run time, not link time, since exit.text
references exit.data and causes this build error:

`.exit.data' referenced in section `.exit.text' of drivers/built-in.o:
 defined in discarded section `.exit.data' of drivers/built-in.o

Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-02-14 15:55:21 +01:00
Heiko Carstens
5303a0fe8c s390/bpf,jit: add vlan tag support
s390 version of 855ddb56 "x86: bpf_jit_comp: add vlan tag support".

Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-02-14 15:55:20 +01:00
Heiko Carstens
0e0d04a867 s390/Kconfig: sort list of arch selected config options
Just like on other architectures. The intention is that this will reduce
merge conflicts if new config options get added in sorted order as well.

Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-02-14 15:55:19 +01:00
Sebastian Ott
53923354d6 s390/pci: fix hotplug module init
Loading the pci hotplug module when no devices are present will fail
but unfortunately some hotplug callbacks stay registered to the pci
bus level. Fix this by not letting module loading fail when no pci
devices are present and provide proper {de}registration functions
for these callbacks.

Reviewed-by: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-02-14 15:55:17 +01:00
Sebastian Ott
add09d61fe s390/pci: cleanup clp page allocation
Use the __get_free_pages wrapper in clp_alloc_block. Also change the
allocation to use one page only. This page is used as CLP response
block e.g. to list available pci functions. Using one page we can
list > 250 pci functions at once and we have code to loop around this
CLP command (if not all functions fit into to the CLP block) already
in place.

Acked-by: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-02-14 15:55:16 +01:00
Sebastian Ott
bf4ec24ff8 s390/pci: cleanup clp inline assembly
Tell gcc that the memory region pointed to by req will be used (and
changed). Also remove the (now) superfluous memory constraint.

Acked-by: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-02-14 15:55:16 +01:00
Hendrik Brueckner
151a0eb6c8 s390/perf: cpum_cf: fallback to software sampling events
The CPU-measurement counter facility does not support sampling events
and returns -EINVAL in that case.  This return code lets the perf tool
fail.  To fall back to software sampling events, return -ENOENT instead.

Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-02-14 15:55:15 +01:00
Heiko Carstens
bddb7ae217 s390/mm: provide PAGE_SHARED define
Only needed to make some drivers compile...

Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-02-14 15:55:14 +01:00
Heiko Carstens
1e5635d10d s390/pci: rename pci_probe to s390_pci_probe
pci_probe is too generic and has a name clash with other common code parts.

Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-02-14 15:55:12 +01:00
Heiko Carstens
a50b2eae8b s390/dma: remove dma_is_consistent() declaration
There is no such function nor any caller in the whole kernel.

Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-02-14 15:55:12 +01:00
Heiko Carstens
e978948db1 s390/dma: provide dma_cache_sync() function
Provide empty dma_cache_sync() function.

Acked-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-02-14 15:55:11 +01:00
Heiko Carstens
e06ef37283 s390/barrier: convert mb() to define again
Some of the now available common code drivers only compile if mb() is a define.

Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-02-14 15:55:11 +01:00
Heiko Carstens
1aae0560d1 s390/time: rename tod clock access functions
Fix name clash with some common code device drivers and add "tod"
to all tod clock access function names.

Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-02-14 15:55:10 +01:00
Michael Holzheu
0894b3ae77 s390/ipl: Implement diag308 loop for zfcpdump
When a zfcpdump is triggered and a second dump on the same CEC is
already in progress for another LPAR, diagnose 308 returns with
an error code until the first dump is finished. Currently the
second Linux stops with a disabled wait PSW in that case.

This is improved now by by triggering diag 308 in a loop until
it works.

Signed-off-by: Michael Holzheu <holzheu@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-02-14 15:55:05 +01:00
Sebastian Ott
9a17e97252 s390/chsc: cleanup SEI helper functions
Cleanup the functions used to call SEI.
Also provide !CONFIG_PCI dummys for pci error handling.

Reviewed-by: Peter Oberparleiter <peter.oberparleiter@de.ibm.com>
Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-02-14 15:55:05 +01:00
Martin Schwidefsky
083e14c09b s390/modules: add relocation overflow checking
Given enough debug options some modules can grow large enough
that the GOT table gets bigger than 4K. On s390 the modules
are compiled with -fpic which limits the GOT to 4K. The end
result is a module that is loaded but won't work.

Add a sanity check to apply_rela and return with an error if
a relocation error is detected for a module.

Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-02-14 15:55:03 +01:00
Padmavathi Venna
42cf20980c ARM: dts: pl330: Add #dma-cells for generic dma binding support
This patch adds #dma-cells property to PL330 DMA controller
nodes for supporting generic dma dt bindings on samsung
exynos5250 platform.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-02-14 20:04:27 +05:30
Al Viro
235b80226b x86: convert to ksignal
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-02-14 09:21:17 -05:00
Al Viro
08f739570d sparc: convert to ksignal
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-02-14 09:21:16 -05:00
Al Viro
7e243643df arm: switch to struct ksignal * passing
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-02-14 09:21:16 -05:00
Al Viro
cfd60c0789 alpha: pass k_sigaction and siginfo_t using ksignal pointer
... and use the new helpers

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-02-14 09:21:16 -05:00
Al Viro
d64008a8f3 burying unused conditionals
__ARCH_WANT_SYS_RT_SIGACTION,
__ARCH_WANT_SYS_RT_SIGSUSPEND,
__ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND,
__ARCH_WANT_COMPAT_SYS_SCHED_RR_GET_INTERVAL - not used anymore
CONFIG_GENERIC_{SIGALTSTACK,COMPAT_RT_SIG{ACTION,QUEUEINFO,PENDING,PROCMASK}} -
can be assumed always set.
2013-02-14 09:21:15 -05:00
Al Viro
9b25d60418 Merge branches 'arch-alpha', 'arch-arm', 'arch-arm64', 'arch-avr32', 'arch-blackfin', 'arch-c6x', 'arch-cris', 'arch-frv', 'arch-h8300', 'arch-hexagon', 'arch-ia64', 'arch-m32r', 'arch-m68k', 'arch-microblaze', 'arch-mips', 'arch-mn10300', 'arch-openrisc', 'arch-parisc', 'arch-powerpc', 'arch-s390', 'arch-score', 'arch-sh', 'arch-sparc', 'arch-tile', 'arch-unicore32', 'arch-x86' and 'arch-xtensa' 2013-02-14 09:20:35 -05:00
Al Viro
51682036d0 arm64: switch to generic old sigaction() (compat-only)
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-02-14 09:17:54 -05:00
Al Viro
02323a9d92 arm64: switch to generic compat rt_sigaction()
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-02-14 09:17:53 -05:00
Al Viro
84b9e9b402 arm64: switch compat to generic old sigsuspend
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-02-14 09:17:53 -05:00
Al Viro
4cd2b2fa61 arm64: switch to generic compat rt_sigqueueinfo()
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-02-14 09:17:53 -05:00
Al Viro
67cf48fe25 arm64: switch to generic compat rt_sigpending()
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-02-14 09:17:52 -05:00
Al Viro
630cfbbbe6 arm64: switch to generic compat rt_sigprocmask()
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-02-14 09:17:52 -05:00
Al Viro
207bdae452 arm64: switch to generic sigaltstack
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-02-14 09:17:29 -05:00
Arnd Bergmann
7822eee1ac Merge branch 'warning-fixes' into next/fixes-non-critical
These are fixes for compiler warnings that for the most
part were introduced during the 3.8 cycle but are otherwise
harmless.

* warning-fixes:
  scripts/sortextable: silence script output
  ARM: s3c: i2c: add platform_device forward declaration
  ARM: mvebu: allow selecting mvebu without Armada XP
  ARM: pick Versatile by default for !MMU
  ARM: integrator: fix build with INTEGRATOR_AP off
  ARM: integrator/versatile: fix NOMMU warnings
  ARM: sa1100: don't warn about mach/ide.h
  ARM: shmobile: fix defconfig warning on CONFIG_USB
  ARM: w90x900: fix legacy assembly syntax
  ARM: samsung: fix assembly syntax for new gas
  ARM: disable virt_to_bus/virt_to_bus almost everywhere

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-02-14 15:05:40 +01:00
Arnd Bergmann
81c724abb9 ARM: mvebu: allow selecting mvebu without Armada XP
Selecting only CONFIG_ARCH_MVEBU but not the respective
options for Armada 370 or Armada XP results in these
link errors:

arch/arm/mach-mvebu/built-in.o: In function `armada_xp_smp_init_cpus':
arch/arm/mach-mvebu/platsmp.c:91: undefined reference to `coherency_get_cpu_count'
arch/arm/mach-mvebu/platsmp.c:104: undefined reference to `armada_mpic_send_doorbell'
arch/arm/mach-mvebu/built-in.o: In function `armada_xp_smp_prepare_cpus':
arch/arm/mach-mvebu/platsmp.c:111: undefined reference to `set_cpu_coherent'
arch/arm/mach-mvebu/built-in.o: In function `armada_xp_boot_secondary':
arch/arm/mach-mvebu/platsmp.c:83: undefined reference to `armada_xp_boot_cpu'
arch/arm/mach-mvebu/built-in.o: In function `armada_xp_secondary_init':
arch/arm/mach-mvebu/platsmp.c:75: undefined reference to `armada_xp_mpic_smp_cpu_init'
arch/arm/mach-mvebu/built-in.o: In function `armada_xp_secondary_startup':
arch/arm/mach-mvebu/headsmp.S:46: undefined reference to `ll_set_cpu_coherent'

We can solve this by enabling all common MVEBU files that are
referenced by the SMP files. This means we enable code that
is not going to be used without a machine descriptor referencing
it, but only if the kernel is configured specifically for this
case.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Gregory Clement <gregory.clement@free-electrons.com>
Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
2013-02-14 15:04:39 +01:00
Arnd Bergmann
1420b22b0b ARM: pick Versatile by default for !MMU
The introduction of ARCH_MULTIPLATFORM changed
the default for nommu kernels from Versatile to
Integrator, which is less common, and does not
currently build for allnoconfig because that does
not select any of the CPUs.

This also ensures that at least one of the three
board files in versatile are enabled, which lets
us successfully build an allnoconfig kernel.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Russell King <linux@arm.linux.org.uk>
2013-02-14 15:04:38 +01:00
Arnd Bergmann
a02e0a831f ARM: integrator: fix build with INTEGRATOR_AP off
The conditional declaration of ap_uart_data is broken
and causes this build error:

In file included from arch/arm/mach-integrator/core.c:35:0:
arch/arm/mach-integrator/common.h:6:37: error: expected '=', ',', ';', 'asm' or '__attribute__' before '{' token

Turning the check into an constant-expression if(IS_ENABLED()) statement
creates more readable code and solves this problem as well.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Russell King <linux@arm.linux.org.uk>
2013-02-14 15:04:38 +01:00
Arnd Bergmann
060fd1be0c ARM: integrator/versatile: fix NOMMU warnings
On NOMMU kernels, the io_desc variables are unused
because we don't use the MMU to remap the MMIO
areas.

Marking these variables as __maybe_unused easily
avoids the otherwise harmless warnings like

warning: 'versatile_io_desc' defined but not used

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Russell King <linux@arm.linux.org.uk>
2013-02-14 15:04:37 +01:00
Arnd Bergmann
29408ed963 ARM: sa1100: don't warn about mach/ide.h
This warning has existed since before the start of (git) history.
Apparently nobody has bothered to fix it in a long time, and
this is unlikely to change. Note that the file that the warning
refers to has moved to a different location and was subsequently
deleted in 2008.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Russell King <linux@arm.linux.org.uk>
2013-02-14 15:04:36 +01:00
Arnd Bergmann
bb57d4e322 ARM: shmobile: fix defconfig warning on CONFIG_USB
A recent update to the marzen_defconfig introduced a
duplicate CONFIG_USB=y line. This removes one of the
two.

arch/arm/configs/marzen_defconfig:86:warning: override: reassigning to symbol USB

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Cc: linux-sh@vger.kernel.org
2013-02-14 15:04:35 +01:00
Arnd Bergmann
fa5ce5f94c ARM: w90x900: fix legacy assembly syntax
New ARM binutils don't allow extraneous whitespace inside
of brackets, which causes this error on all mach-w90x900
defconfigs:

arch/arm/kernel/entry-armv.S: Assembler messages:
arch/arm/kernel/entry-armv.S:214: Error: ARM register expected -- `ldr r0,[ r6,#(0x10C)]'
arch/arm/kernel/entry-armv.S:214: Error: ARM register expected -- `ldr r0,[ r6,#(0x110)]'
arch/arm/kernel/entry-armv.S:430: Error: ARM register expected -- `ldr r0,[ r6,#(0x10C)]'
arch/arm/kernel/entry-armv.S:430: Error: ARM register expected -- `ldr r0,[ r6,#(0x110)]'

This removes the whitespace in order to build the kernel
again.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Wan ZongShun <mcuos.com@gmail.com>
2013-02-14 15:04:35 +01:00
Arnd Bergmann
2815774bb3 ARM: samsung: fix assembly syntax for new gas
Recent assembler versions complain about extraneous
whitespace inside [] brackets. This fixes all of
these instances for the samsung platforms. We should
backport this to all kernels that might need to
be built with new binutils.

arch/arm/kernel/entry-armv.S: Assembler messages:
arch/arm/kernel/entry-armv.S:214: Error: ARM register expected -- `ldr r2,[ r6,#(0x10)]'
arch/arm/kernel/entry-armv.S:214: Error: ARM register expected -- `ldr r0,[ r6,#(0x14)]'
arch/arm/kernel/entry-armv.S:430: Error: ARM register expected -- `ldr r2,[ r6,#(0x10)]'
arch/arm/kernel/entry-armv.S:430: Error: ARM register expected -- `ldr r0,[ r6,#(0x14)]'
arch/arm/mach-s3c24xx/sleep-s3c2410.S: Assembler messages:
arch/arm/mach-s3c24xx/sleep-s3c2410.S:48: Error: ARM register expected -- `ldr r7,[ r4 ]'
arch/arm/mach-s3c24xx/sleep-s3c2410.S:49: Error: ARM register expected -- `ldr r8,[ r5 ]'
arch/arm/mach-s3c24xx/sleep-s3c2410.S:50: Error: ARM register expected -- `ldr r9,[ r6 ]'
arch/arm/mach-s3c24xx/sleep-s3c2410.S:64: Error: ARM register expected -- `streq r7,[ r4 ]'
arch/arm/mach-s3c24xx/sleep-s3c2410.S:65: Error: ARM register expected -- `streq r8,[ r5 ]'
arch/arm/mach-s3c24xx/sleep-s3c2410.S:66: Error: ARM register expected -- `streq r9,[ r6 ]'
arch/arm/kernel/debug.S: Assembler messages:
arch/arm/kernel/debug.S:83: Error: ARM register expected -- `ldr r2,[ r2,#((0x0B0)+(((0x56000000)-(0x50000000))+(0xF6000000+(0x01000000))))-((0)+(((0x56000000)-(0x50000000))+(0xF6000000+(0x01000000))))]'
arch/arm/kernel/debug.S:83: Error: ARM register expected -- `ldr r2,[ r3,#(0x18)]'
arch/arm/kernel/debug.S:85: Error: ARM register expected -- `ldr r2,[ r2,#((0x0B0)+(((0x56000000)-(0x50000000))+(0xF6000000+(0x01000000))))-((0)+(((0x56000000)-(0x50000000))+(0xF6000000+(0x01000000))))]'
arch/arm/kernel/debug.S:85: Error: ARM register expected -- `ldr r2,[ r3,#(0x18)]'
arch/arm/mach-s3c24xx/pm-h1940.S: Assembler messages:
arch/arm/mach-s3c24xx/pm-h1940.S:33: Error: ARM register expected -- `ldr pc,[ r0,#((0x0B8)+(((0x56000000)-(0x50000000))+(0xF6000000+(0x01000000))))-(((0x56000000)-(0x50000000))+(0xF6000000+(0x01000000)))]'
arch/arm/mach-s3c24xx/sleep-s3c2412.S: Assembler messages:
arch/arm/mach-s3c24xx/sleep-s3c2412.S:60: Error: ARM register expected -- `ldrne r9,[ r1 ]'
arch/arm/mach-s3c24xx/sleep-s3c2412.S:61: Error: ARM register expected -- `strne r9,[ r1 ]'
arch/arm/mach-s3c24xx/sleep-s3c2412.S:62: Error: ARM register expected -- `ldrne r9,[ r2 ]'
arch/arm/mach-s3c24xx/sleep-s3c2412.S:63: Error: ARM register expected -- `strne r9,[ r2 ]'
arch/arm/mach-s3c24xx/sleep-s3c2412.S:64: Error: ARM register expected -- `ldrne r9,[ r3 ]'
arch/arm/mach-s3c24xx/sleep-s3c2412.S:65: Error: ARM register expected -- `strne r9,[ r3 ]'
arch/arm/kernel/debug.S:83: Error: ARM register expected -- `ldr r2,[ r3,#(0x08)]'
arch/arm/kernel/debug.S:83: Error: ARM register expected -- `ldr r2,[ r3,#(0x18)]'
arch/arm/kernel/debug.S:83: Error: ARM register expected -- `ldr r2,[ r3,#(0x10)]'
arch/arm/kernel/debug.S:85: Error: ARM register expected -- `ldr r2,[ r3,#(0x08)]'
arch/arm/kernel/debug.S:85: Error: ARM register expected -- `ldr r2,[ r3,#(0x18)]'
arch/arm/kernel/debug.S:85: Error: ARM register expected -- `ldr r2,[ r3,#(0x10)]'

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: stable@vger.kernel.org
2013-02-14 15:04:34 +01:00
Arnd Bergmann
a5d533ee07 ARM: disable virt_to_bus/virt_to_bus almost everywhere
We are getting a number of warnings about the use of the deprecated
bus_to_virt function in drivers using the ARM ISA DMA API:

drivers/parport/parport_pc.c: In function 'parport_pc_fifo_write_block_dma':
drivers/parport/parport_pc.c:622:3: warning: 'bus_to_virt' is deprecated
(declared at arch/arm/include/asm/memory.h:253) [-Wdeprecated-declarations]

This is only because that function gets used by the inline
set_dma_addr() helper. We know that any driver for the ISA DMA API
is correctly using the DMA addresses, so we can change this
to use the __bus_to_virt() function instead, which does not warn.

After this, there are no remaining drivers that are used on
any defconfigs on ARM using virt_to_bus or bus_to_virt, with
the exception of the OSS sound driver. That driver is only used
on RiscPC, NetWinder and Shark, so we can set ARCH_NO_VIRT_TO_BUS
on all other platforms and hide the deprecated functions, which
is far more effective than marking them as deprecated, in order
to avoid any new users of that code.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Russell King <linux@arm.linux.org.uk>
2013-02-14 15:04:33 +01:00
Arnd Bergmann
801e6a01d1 ARM: kirkwood: add missing include for nsa310
Patch 92cb7625 "ARM: kirkwood: nsa310: cleanup includes and
unneeded code" was a little too quick, since there is still
an I2C_BOARD_INFO left in this file at the moment. Once
that is gone and replaced by a DT description of the devices,
the inclusion can be removed again

Without this patch, building kirkwood_defconfig results in:

arch/arm/mach-kirkwood/board-nsa310.c:42:74: error: array type has incomplete element type
arch/arm/mach-kirkwood/board-nsa310.c:43:2: error: implicit declaration of function 'I2C_BOARD_INFO' [-Werror=implicit-function-declaration]
arch/arm/mach-kirkwood/board-nsa310.c: In function 'nsa310_gpio_init':
arch/arm/mach-kirkwood/board-nsa310.c:71:3: error: 'pm_power_off' undeclared (first use in this function)
arch/arm/mach-kirkwood/board-nsa310.c:71:3: note: each undeclared identifier is reported only once for each function it appears in
arch/arm/mach-kirkwood/board-nsa310.c: In function 'nsa310_init':
arch/arm/mach-kirkwood/board-nsa310.c:83:2: error: implicit declaration of function 'i2c_register_board_info' [-Werror=implicit-function-declaration]
arch/arm/mach-kirkwood/board-nsa310.c:83:121: error: negative width in bit-field '<anonymous>'
arch/arm/mach-kirkwood/board-nsa310.c: At top level:
arch/arm/mach-kirkwood/board-nsa310.c:42:74: warning: 'nsa310_i2c_info' defined but not used [-Wunused-variable]
cc1: some warnings being treated as errors

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Jason Cooper <jason@lakedaemon.net>
2013-02-14 14:38:52 +01:00
Arnd Bergmann
b0db321ba1 ARM: prima2: fix __init section for cpu hotplug
The code in arch/arm/mach-prima2/headsmp.S is used for
both boot time initialization and for cpu hotplug,
so it must not be discarded after the initial boot
is complete. This replaces the __INIT annotation
with __CPUINIT, and marks the sirfsoc_cpu_die as
__ref to annotate that it correctly uses the sections.

Without this patch, building prima2_defconfig results in:

WARNING: arch/arm/mach-prima2/built-in.o(.cpuinit.text+0x130): Section mismatch in reference from the function sirfsoc_boot_secondary() to the function .init.text:sirfsoc_secondary_startup()
The function __cpuinit sirfsoc_boot_secondary() references
a function __init sirfsoc_secondary_startup().
If sirfsoc_secondary_startup is only used by sirfsoc_boot_secondary then
annotate sirfsoc_secondary_startup with a matching annotation.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Barry Song <baohua.song@csr.com>
2013-02-14 14:36:35 +01:00
Satoru Takeuchi
6b59e366e0 x86, efi: remove duplicate code in setup_arch() by using, efi_is_native()
The check, "IS_ENABLED(CONFIG_X86_64) != efi_enabled(EFI_64BIT)",
in setup_arch() can be replaced by efi_is_enabled(). This change
remove duplicate code and improve readability.

Signed-off-by: Satoru Takeuchi <takeuchi_satoru@jp.fujitsu.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Olof Johansson <olof@lixom.net>
Signed-off-by: Matt Fleming <matt.fleming@intel.com>
2013-02-14 10:36:18 +00:00
Jan Kiszka
cbd29cb6e3 KVM: nVMX: Remove redundant get_vmcs12 from nested_vmx_exit_handled_msr
We already pass vmcs12 as argument.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Gleb Natapov <gleb@redhat.com>
2013-02-14 10:35:16 +02:00
Roger Quadros
4297315959 ARM: OMAP: Consolidate OMAP USB-HS platform data (part 3/3)
Let's have a single platform data structure for the OMAP's High-Speed
USB host subsystem instead of having 3 separate ones i.e. one for
board data, one for USB Host (UHH) module and one for USB-TLL module.

This makes the code much simpler and avoids creating multiple copies of
platform data.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
2013-02-14 10:13:48 +02:00
Satoru Takeuchi
1de63d60cd efi: Clear EFI_RUNTIME_SERVICES rather than EFI_BOOT by "noefi" boot parameter
There was a serious problem in samsung-laptop that its platform driver is
designed to run under BIOS and running under EFI can cause the machine to
become bricked or can cause Machine Check Exceptions.

    Discussion about this problem:
    https://bugs.launchpad.net/ubuntu-cdimage/+bug/1040557
    https://bugzilla.kernel.org/show_bug.cgi?id=47121

    The patches to fix this problem:
    efi: Make 'efi_enabled' a function to query EFI facilities
    83e6818974

    samsung-laptop: Disable on EFI hardware
    e0094244e4

Unfortunately this problem comes back again if users specify "noefi" option.
This parameter clears EFI_BOOT and that driver continues to run even if running
under EFI. Refer to the document, this parameter should clear
EFI_RUNTIME_SERVICES instead.

Documentation/kernel-parameters.txt:
===============================================================================
...
	noefi		[X86] Disable EFI runtime services support.
...
===============================================================================

Documentation/x86/x86_64/uefi.txt:
===============================================================================
...
- If some or all EFI runtime services don't work, you can try following
  kernel command line parameters to turn off some or all EFI runtime
  services.
	noefi		turn off all EFI runtime services
...
===============================================================================

Signed-off-by: Satoru Takeuchi <takeuchi_satoru@jp.fujitsu.com>
Link: http://lkml.kernel.org/r/511C2C04.2070108@jp.fujitsu.com
Cc: Matt Fleming <matt.fleming@intel.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-02-13 17:24:11 -08:00
Mark Rutland
9664ffe6a1 ARM: 7651/1: remove unused smp_timer_broadcast #define
The assignment of clock_event_device::broadcast can be done by timer
core as of 12ad100046: "clockevents: Add generic timer broadcast
function", and the arm code moved over to this as of 3d06770eef: "arm:
Add generic timer broadcast support", but left a dangling #define when
!CONFIG_GENERIC_TIMER_BROADCAST.

This patch removes the now unused #define.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-02-13 23:41:04 +00:00
Qing Xu
58f1193e62 mfd: max8925: Add dts
Add max8925 dts support into mmp2 brownstone platform

Signed-off-by: Qing Xu <qingx@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2013-02-14 00:23:01 +01:00
Peter Ujfalusi
c6dc96467a ARM: OMAP: zoom-display: Remove the use of TWL4030_MODULE_PWM1
Use the future proof TWL_MODULE_PWM module id instead to aim the twl-core
cleanup planed for 3.9 kernel cycle.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2013-02-14 00:22:49 +01:00
Len Brown
1ed51011af tools/power turbostat: display SMI count by default
The SMI counter is popular -- so display it by default
rather than requiring an option.  What the heck,
we've blown the 80 column budget on many systems already...

Note that the value displayed is the delta
during the measurement interval.
The absolute value of the counter can still be seen with
the generic 32-bit MSR option, ie.  -m 0x34

Signed-off-by: Len Brown <len.brown@intel.com>
2013-02-13 18:22:12 -05:00
Jan Beulich
13d2b4d11d x86/xen: don't assume %ds is usable in xen_iret for 32-bit PVOPS.
This fixes CVE-2013-0228 / XSA-42

Drew Jones while working on CVE-2013-0190 found that that unprivileged guest user
in 32bit PV guest can use to crash the > guest with the panic like this:

-------------
general protection fault: 0000 [#1] SMP
last sysfs file: /sys/devices/vbd-51712/block/xvda/dev
Modules linked in: sunrpc ipt_REJECT nf_conntrack_ipv4 nf_defrag_ipv4
iptable_filter ip_tables ip6t_REJECT nf_conntrack_ipv6 nf_defrag_ipv6
xt_state nf_conntrack ip6table_filter ip6_tables ipv6 xen_netfront ext4
mbcache jbd2 xen_blkfront dm_mirror dm_region_hash dm_log dm_mod [last
unloaded: scsi_wait_scan]

Pid: 1250, comm: r Not tainted 2.6.32-356.el6.i686 #1
EIP: 0061:[<c0407462>] EFLAGS: 00010086 CPU: 0
EIP is at xen_iret+0x12/0x2b
EAX: eb8d0000 EBX: 00000001 ECX: 08049860 EDX: 00000010
ESI: 00000000 EDI: 003d0f00 EBP: b77f8388 ESP: eb8d1fe0
 DS: 0000 ES: 007b FS: 0000 GS: 00e0 SS: 0069
Process r (pid: 1250, ti=eb8d0000 task=c2953550 task.ti=eb8d0000)
Stack:
 00000000 0027f416 00000073 00000206 b77f8364 0000007b 00000000 00000000
Call Trace:
Code: c3 8b 44 24 18 81 4c 24 38 00 02 00 00 8d 64 24 30 e9 03 00 00 00
8d 76 00 f7 44 24 08 00 00 02 80 75 33 50 b8 00 e0 ff ff 21 e0 <8b> 40
10 8b 04 85 a0 f6 ab c0 8b 80 0c b0 b3 c0 f6 44 24 0d 02
EIP: [<c0407462>] xen_iret+0x12/0x2b SS:ESP 0069:eb8d1fe0
general protection fault: 0000 [#2]
---[ end trace ab0d29a492dcd330 ]---
Kernel panic - not syncing: Fatal exception
Pid: 1250, comm: r Tainted: G      D    ---------------
2.6.32-356.el6.i686 #1
Call Trace:
 [<c08476df>] ? panic+0x6e/0x122
 [<c084b63c>] ? oops_end+0xbc/0xd0
 [<c084b260>] ? do_general_protection+0x0/0x210
 [<c084a9b7>] ? error_code+0x73/
-------------

Petr says: "
 I've analysed the bug and I think that xen_iret() cannot cope with
 mangled DS, in this case zeroed out (null selector/descriptor) by either
 xen_failsafe_callback() or RESTORE_REGS because the corresponding LDT
 entry was invalidated by the reproducer. "

Jan took a look at the preliminary patch and came up a fix that solves
this problem:

"This code gets called after all registers other than those handled by
IRET got already restored, hence a null selector in %ds or a non-null
one that got loaded from a code or read-only data descriptor would
cause a kernel mode fault (with the potential of crashing the kernel
as a whole, if panic_on_oops is set)."

The way to fix this is to realize that the we can only relay on the
registers that IRET restores. The two that are guaranteed are the
%cs and %ss as they are always fixed GDT selectors. Also they are
inaccessible from user mode - so they cannot be altered. This is
the approach taken in this patch.

Another alternative option suggested by Jan would be to relay on
the subtle realization that using the %ebp or %esp relative references uses
the %ss segment.  In which case we could switch from using %eax to %ebp and
would not need the %ss over-rides. That would also require one extra
instruction to compensate for the one place where the register is used
as scaled index. However Andrew pointed out that is too subtle and if
further work was to be done in this code-path it could escape folks attention
and lead to accidents.

Reviewed-by: Petr Matousek <pmatouse@redhat.com>
Reported-by: Petr Matousek <pmatouse@redhat.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2013-02-13 15:40:30 -05:00
David S. Miller
89a77915e0 sparc64: Fix get_user_pages_fast() wrt. THP.
Mostly mirrors the s390 logic, as unlike x86 we don't need the
SetPageReferenced() bits.

On sparc64 we also lack a user/privileged bit in the huge PMDs.

In order to make this work for THP and non-THP builds, some header
file adjustments were necessary.  Namely, provide the PMD_HUGE_* bit
defines and the pmd_large() inline unconditionally rather than
protected by TRANSPARENT_HUGEPAGE.

Reported-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2013-02-13 12:22:14 -08:00
David S. Miller
b9156ebb7b sparc64: Add missing HAVE_ARCH_TRANSPARENT_HUGEPAGE.
This got missed in the cleanups done for the S390 THP
support.

CC: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2013-02-13 12:22:13 -08:00
Linus Torvalds
42976ad0b2 Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Peter Anvin:
 "One (hopefully) last batch of x86 fixes.  You asked for the patch by
  patch justifications, so here they are:

      x86, MCE: Retract most UAPI exports

   This one unexports from userspace a bunch of definitions which should
   never have been exported.  We really don't want to create an
   accidental legacy here.

      x86, doc: Add a bootloader ID for OVMF

   This is a documentation-only patch, just recording the official
   assignment of a boot loader ID.

      x86: Do not leak kernel page mapping locations

   Security: avoid making it needlessly easy for user space to probe the
   kernel memory layout.

      x86/mm: Check if PUD is large when validating a kernel address

   Prevent failures using /proc/kcore when using 1G pages.

      x86/apic: Work around boot failure on HP ProLiant DL980 G7 Server systems

   Works around a BIOS problem causing boot failures on affected hardware."

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/mm: Check if PUD is large when validating a kernel address
  x86/apic: Work around boot failure on HP ProLiant DL980 G7 Server systems
  x86, doc: Add a bootloader ID for OVMF
  x86: Do not leak kernel page mapping locations
  x86, MCE: Retract most UAPI exports
2013-02-13 12:19:49 -08:00
Stephen Warren
8364f5d965 ARM: tegra: remove clock-frequency properties from serial nodes
Currently, the serial nodes define both a clock-frequency and a clocks
property. We should not provide both, since they might conflict.

In practice, this also causes problems since the of_serial driver uses
the clock-frequency property in preference to the clocks property, and
hence doesn't clk_prepare_enable() the clock, which may then leave it
with no known users, and hence the common clock framework will disable
it, thus breaking the port, which is usually the console.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 11:17:02 -07:00
Gleb Natapov
f583c29b79 x86 emulator: fix parity calculation for AAD instruction
Reported-by: Paolo Bonzini <pbonzini@redhat.com>
Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Gleb Natapov <gleb@redhat.com>
2013-02-13 18:01:00 +02:00
Po Liu
db29cd3c44 powerpc/85xx: dts - add ranges property for SEC
This facilitates getting the physical address of the SEC node.

Signed-off-by: Liu po <po.liu@freescale.com>
Reviewed-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-02-13 07:49:09 -06:00
Holger Brunck
ed59b3eca0 powerpc/83xx: update kmeter1_defconfig
Synchronize this defconfig with latest kernel version.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-02-13 07:49:08 -06:00
Gerlando Falauto
9c2f451e0d powerpc/83xx: apply mpc8360e quirk for kmeter1 only when par_io is present
There is no point in applying this quirk when par_io is not present.

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-02-13 07:49:07 -06:00
Gerlando Falauto
14f40f31e8 powerpc/83xx: refactor mpc8360e quirk for kmeter1
Move the code for this quirk to a dedicated function.

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-02-13 07:49:06 -06:00
Holger Brunck
89491d83b2 powerpc/83xx: fix checkpatch warnings for km83xx.c
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-02-13 07:49:05 -06:00
Holger Brunck
3c00433b76 powerpc/82xx: fix checkpatch warnings for km82xx.c
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-02-13 07:49:04 -06:00
Timur Tabi
14bdc9132e powerpc/85xx: fix various PCI node compatible strings
Fix and/or improve the compatible strings of the PCI device tree nodes for
some Freescale SOCs.  This fixes some issues and improves consistency among
the SOCs.

Specifically:

1) The P1022 has a v1 PCIe controller, so the compatible property should just
say "fsl,mpc8548-pcie".  U-Boot does not look for "fsl,p1022-pcie", so it
wasn't fixing up the node.

2) The P4080 has a v2.1 PCIe controller, so add that version-specific string
to the device tree.  Update the kernel to also look for that string.
Currently, the kernel looks for "fsl,p4080-pcie" specifically, but
eventually that check should be deleted.

3) The P1010 device tree claims compatibility with v2.2 and v2.3, but that's
redundant.  No other device tree does this.  Remove the v2.2 string.

4) The kernel looks for both "fsl,p1023-pcie" and "fsl,qoriq-pcie-v2.2",
even though the P1023 device trees has always included both strings.  Remove
the search for "fsl,p1023-pcie".

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-02-13 07:49:03 -06:00
Timur Tabi
0408753fae powerpc/85xx: describe the PAMU topology in the device tree
The PAMU caches use the LIODNs to determine which cache lines hold the
entries for the corresponding LIODs.  The LIODNs must therefore be
carefully assigned to avoid cache thrashing -- two active LIODs with
LIODNs that put them in the same cache line.

Currently, LIODNs are statically assigned by U-Boot, but this has
limitations.  LIODNs are assigned even for devices that may be disabled
or unused by the kernel.  Static assignments also do not allow for device
drivers which may know which LIODs can be used simultaneously.  In
other words, we really should assign LIODNs dynamically in Linux.

To do that, we need to describe the PAMU device and cache topologies in
the device trees.

Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Stuart Yoder <stuart.yoder@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-02-13 07:49:02 -06:00
Paul Gortmaker
d5bc813f40 powerpc/85xx: enable MTD options in sbc8548 defconfig
This board has soldered on flash, and a SODIMM flash module.
Both can be used for booting, via switching JP12 and SW2.8
and using the sbc8548-altflash.dts when booting from SODIMM.

Here we enable MTD in kernel so that we can see the bootloader
(and other flash sectors) from linux.

Normal configuration:

 root@sbc8548:~# cat /proc/mtd
 dev:    size   erasesize  name
 mtd0: 007a0000 00020000 "space"
 mtd1: 00060000 00020000 "bootloader"
 mtd2: 03f00000 00080000 "space"
 mtd3: 00100000 00080000 "bootloader"
 root@sbc8548:~# dd if=/dev/mtd1 count=1 bs=48|hexdump -C
 1+0 records in
 1+0 records out
 00000000  27 05 19 56 55 2d 42 6f  6f 74 20 32 30 31 32 2e  |'..VU-Boot 2012.|
 00000010  31 30 2d 64 69 72 74 79  20 28 4a 61 6e 20 31 39  |10-dirty (Jan 19|
 00000020  20 32 30 31 33 20 2d 20  31 39 3a 34 30 3a 31 31  | 2013 - 19:40:11|
 00000030
 root@sbc8548:~# dd if=/dev/mtd3 count=1 bs=48|hexdump -C
 1+0 records in
 1+0 records out
 00000000  27 05 19 56 55 2d 42 6f  6f 74 20 32 30 31 32 2e  |'..VU-Boot 2012.|
 00000010  31 30 2d 64 69 72 74 79  20 28 44 65 63 20 31 33  |10-dirty (Dec 13|
 00000020  20 32 30 31 32 20 2d 20  31 35 3a 30 30 3a 30 37  | 2012 - 15:00:07|
 00000030
 root@sbc8548:~#

Alternate configuration, with sbc8548-altflash.dts:

 root@sbc8548:~# cat /proc/mtd
 dev:    size   erasesize  name
 mtd0: 03f00000 00080000 "space"
 mtd1: 00100000 00080000 "bootloader"
 mtd2: 007a0000 00020000 "space"
 mtd3: 00060000 00020000 "bootloader"
 root@sbc8548:~# dd if=/dev/mtd1 count=1 bs=48|hexdump -C
 1+0 records in
 1+0 records out
 00000000  27 05 19 56 55 2d 42 6f  6f 74 20 32 30 31 32 2e  |'..VU-Boot 2012.|
 00000010  31 30 2d 64 69 72 74 79  20 28 44 65 63 20 31 33  |10-dirty (Dec 13|
 00000020  20 32 30 31 32 20 2d 20  31 35 3a 30 30 3a 30 37  | 2012 - 15:00:07|
 00000030
 root@sbc8548:~# dd if=/dev/mtd3 count=1 bs=48|hexdump -C
 1+0 records in
 1+0 records out
 00000000  27 05 19 56 55 2d 42 6f  6f 74 20 32 30 31 32 2e  |'..VU-Boot 2012.|
 00000010  31 30 2d 64 69 72 74 79  20 28 4a 61 6e 20 31 39  |10-dirty (Jan 19|
 00000020  20 32 30 31 33 20 2d 20  31 39 3a 34 30 3a 31 31  | 2013 - 19:40:11|
 00000030
 root@sbc8548:~#

Note that in the latter, the larger SODIMM device appears 1st,
as mtd0 and mtd1, as indicated in the sizes, and in the date
of the u-boot image.

The kernel configuration is the same in both cases; only the dtb
needs to be changed in accordance with the JP12/SW2.8 settings.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-02-13 07:49:00 -06:00
Paul Gortmaker
dcc8722a64 powerpc/85xx: add alternate dts file for sbc8548 boot via SODIMM
By moving the two JP12 jumpers 90 degrees, and switching the
setting of SW2.8, the sbc8548 can be configured to boot off
the alternate 64MB SODIMM, which when populated with u-boot
can be a handy recovery option, in case the u-boot in the
8MB soldered on flash gets corrupted.  Here we add an alternate
dts file to match that configuration.

To better highlight the differences, the output from the u-boot
"fli" command is shown for the normal configuration and then
the alternate configuration.

Normal:
 -----------------------
Bank # 1: CFI conformant flash (8 x 8)  Size: 8 MB in 64 Sectors
  Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x17
  Erase timeout: 4096 ms, write timeout: 1 ms
  Buffer write timeout: 2 ms, buffer size: 32 bytes

  Sector Start Addresses:
  FF800000 E      FF820000 E      FF840000 E      FF860000 E      FF880000 E
 [...]
  FFEE0000 E      FFF00000 E      FFF20000 E      FFF40000 E      FFF60000 E
  FFF80000        FFFA0000   RO   FFFC0000   RO   FFFE0000   RO

Bank # 2: CFI conformant flash (32 x 8)  Size: 64 MB in 128 Sectors
  Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x18
  Erase timeout: 4096 ms, write timeout: 1 ms
  Buffer write timeout: 2 ms, buffer size: 32 bytes

  Sector Start Addresses:
  EC000000 E      EC080000 E      EC100000 E      EC180000 E      EC200000 E
 [...]
  EFC00000 E      EFC80000 E      EFD00000 E      EFD80000 E      EFE00000 E
  EFE80000 E      EFF00000        EFF80000
 -----------------------

Alternate:
 -----------------------
Bank # 1: CFI conformant flash (32 x 8)  Size: 64 MB in 128 Sectors
  Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x18
  Erase timeout: 4096 ms, write timeout: 1 ms
  Buffer write timeout: 2 ms, buffer size: 32 bytes

  Sector Start Addresses:
  FC000000 E      FC080000 E      FC100000 E      FC180000 E      FC200000 E
 [...]
  FFC00000 E      FFC80000 E      FFD00000 E      FFD80000 E      FFE00000 E
  FFE80000 E      FFF00000   RO   FFF80000   RO

Bank # 2: CFI conformant flash (8 x 8)  Size: 8 MB in 64 Sectors
  Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x17
  Erase timeout: 4096 ms, write timeout: 1 ms
  Buffer write timeout: 2 ms, buffer size: 32 bytes

  Sector Start Addresses:
  EF800000 E      EF820000 E      EF840000 E      EF860000 E      EF880000 E
 [...]
  EFEE0000 E      EFF00000 E      EFF20000 E      EFF40000 E      EFF60000 E
  EFF80000 E      EFFA0000        EFFC0000        EFFE0000
 -----------------------

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-02-13 07:49:00 -06:00
Paul Gortmaker
7e83f2ad3e powerpc/85xx: update sbc8548 flash information to match recent u-boot
The original memory map for the sbc8548 had the 64MB SODIMM flash
device misaligned by 8MB to allow a window of address space for
the soldered on 8MB device -- i.e.

 start           end             CS<n>   width   Desc.
 ----------------------------------------------------------
 fb80_0000       ff7f_ffff       CS6     32      SODIMM flash (64MB)
 ff80_0000       ffff_ffff       CS0     8       Boot flash (8MB)

However, if we want to change the configuration so that it boots
off the 64MB flash, it is in turn then aligned with a 64MB boundary,
starting at fc00_0000 (and the 8MB @ fb80_0000 -> fbff_ffff).

This makes for complicated updates, since what is the beginning
of the physical device is 8MB into its address space in the default
configuration shown above.

This issue was fixed as of u-boot commit 3fd673cf363bc86ed42eff713d4
("sbc8548: relocate 64MB user flash to sane boundary") -- in which
the SODIMM was mapped to ec00_0000 (natively aligned under efff_ffff)
and so when JP12/SW2.8 are switched, it will be a a simple 0xec --> 0xfc
mapping between the two instances.

Here we make the associated changes in the localbus flash memory
map in the dts file:  indicating the 64MB device starts at ec00_0000
and that the tail end of the 64MB device (last 2 sectors) can contain
a bootloader image.

The partitions for both flash devices get a clean-up; there were
non-meaningful assignments in there that probably originated from
the MPC8548CDS on which the file was based on.  Now there is just
the categorization of free space and bootloader images.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-02-13 07:48:59 -06:00
Paul Gortmaker
d1cf1c7db3 powerpc/85xx: split sbc8548 dts file into pre and post chunks
Updates to u-boot allow this board to boot off of either
the 8MB soldered on flash, or the 64MB SODIMM flash.

This is achieved by changing JP12 and SW2.8 which in turn
swaps which flash device appears on /CS0 and /CS6 respectively.

Since the flash devices are not the same size, this also
changes the MTD memory map layout on the local bus.

Here we split the common chunks out into a pre and post
include, so they can be reused by an upcoming "alternative
boot" dts file; leaving only the local bus chunk behind.

No content changes are made at this point - it is just purely
the move to using include files.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-02-13 07:48:58 -06:00
Wei Yongjun
5444d639ec powerpc/85xx: use for_each_compatible_node() macro
Use for_each_compatible_node() macro instead of open coding it.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-02-13 07:48:51 -06:00
Alexander Graf
011da89962 KVM: PPC: BookE: Handle alignment interrupts
When the guest triggers an alignment interrupt, we don't handle it properly
today and instead BUG_ON(). This really shouldn't happen.

Instead, we should just pass the interrupt back into the guest so it can deal
with it.

Reported-by: Gao Guanhua-B22826 <B22826@freescale.com>
Tested-by: Gao Guanhua-B22826 <B22826@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-02-13 12:56:45 +01:00
Bharat Bhushan
ee53e560a8 booke: Added DBCR4 SPR number
Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-02-13 12:56:42 +01:00
Bharat Bhushan
1d542d9c2b KVM: PPC: booke: Allow multiple exception types
Current kvmppc_booke_handlers uses the same macro (KVM_HANDLER) and
all handlers are considered to be the same size. This will not be
the case if we want to use different macros for different handlers.

This patch improves the kvmppc_booke_handler so that it can
support different macros for different handlers.

Signed-off-by: Liu Yu <yu.liu@freescale.com>
[bharat.bhushan@freescale.com: Substantial changes]
Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-02-13 12:56:40 +01:00
Bharat Bhushan
ffe129ecd7 KVM: PPC: booke: use vcpu reference from thread_struct
Like other places, use thread_struct to get vcpu reference.

Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-02-13 12:56:39 +01:00
Alexander Graf
dd92d6f274 Merge commit 'origin/next' into kvm-ppc-next 2013-02-13 12:56:14 +01:00
Grant Likely
bfc4a58986 Merge branch 'for-next' from git://sources.calxeda.com/kernel/linux.git
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2013-02-13 09:59:13 +00:00
Mel Gorman
0ee364eb31 x86/mm: Check if PUD is large when validating a kernel address
A user reported the following oops when a backup process reads
/proc/kcore:

 BUG: unable to handle kernel paging request at ffffbb00ff33b000
 IP: [<ffffffff8103157e>] kern_addr_valid+0xbe/0x110
 [...]

 Call Trace:
  [<ffffffff811b8aaa>] read_kcore+0x17a/0x370
  [<ffffffff811ad847>] proc_reg_read+0x77/0xc0
  [<ffffffff81151687>] vfs_read+0xc7/0x130
  [<ffffffff811517f3>] sys_read+0x53/0xa0
  [<ffffffff81449692>] system_call_fastpath+0x16/0x1b

Investigation determined that the bug triggered when reading
system RAM at the 4G mark. On this system, that was the first
address using 1G pages for the virt->phys direct mapping so the
PUD is pointing to a physical address, not a PMD page.

The problem is that the page table walker in kern_addr_valid() is
not checking pud_large() and treats the physical address as if
it was a PMD.  If it happens to look like pmd_none then it'll
silently fail, probably returning zeros instead of real data. If
the data happens to look like a present PMD though, it will be
walked resulting in the oops above.

This patch adds the necessary pud_large() check.

Unfortunately the problem was not readily reproducible and now
they are running the backup program without accessing
/proc/kcore so the patch has not been validated but I think it
makes sense.

Signed-off-by: Mel Gorman <mgorman@suse.de>
Reviewed-by: Rik van Riel <riel@redhat.coM>
Reviewed-by: Michal Hocko <mhocko@suse.cz>
Acked-by: Johannes Weiner <hannes@cmpxchg.org>
Cc: stable@vger.kernel.org
Cc: linux-mm@kvack.org
Link: http://lkml.kernel.org/r/20130211145236.GX21389@suse.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2013-02-13 10:02:55 +01:00
K. Y. Srinivasan
bc2b0331e0 X86: Handle Hyper-V vmbus interrupts as special hypervisor interrupts
Starting with win8, vmbus interrupts can be delivered on any VCPU in the guest
and furthermore can be concurrently active on multiple VCPUs. Support this
interrupt delivery model by setting up a separate IDT entry for Hyper-V vmbus.
interrupts. I would like to thank Jan Beulich <JBeulich@suse.com> and
Thomas Gleixner <tglx@linutronix.de>, for their help.

In this version of the patch, based on the feedback, I have merged the IDT
vector for Xen and Hyper-V and made the necessary adjustments. Furhermore,
based on Jan's feedback I have added the necessary compilation switches.

Signed-off-by: K. Y. Srinivasan <kys@microsoft.com>
Link: http://lkml.kernel.org/r/1359940959-32168-3-git-send-email-kys@microsoft.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-02-12 16:27:15 -08:00
K. Y. Srinivasan
db34bbb767 X86: Add a check to catch Xen emulation of Hyper-V
Xen emulates Hyper-V to host enlightened Windows. Looks like this
emulation may be turned on by default even for Linux guests. Check and
fail Hyper-V detection if we are on Xen.

[ hpa: the problem here is that Xen doesn't emulate Hyper-V well
  enough, and if the Xen support isn't compiled in, we end up stubling
  over the Hyper-V emulation and try to activate it -- and it fails. ]

Signed-off-by: K. Y. Srinivasan <kys@microsoft.com>
Link: http://lkml.kernel.org/r/1359940959-32168-2-git-send-email-kys@microsoft.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-02-12 16:27:03 -08:00
Olaf Hering
32068f6527 x86: Hyper-V: register clocksource only if its advertised
Enable hyperv_clocksource only if its advertised as a feature.
XenServer 6 returns the signature which is checked in
ms_hyperv_platform(), but it does not offer all features. Currently the
clocksource is enabled unconditionally in ms_hyperv_init_platform(), and
the result is a hanging guest.

Hyper-V spec Bit 1 indicates the availability of Partition Reference
Counter.  Register the clocksource only if this bit is set.

The guest in question prints this in dmesg:
 [    0.000000] Hypervisor detected: Microsoft HyperV
 [    0.000000] HyperV: features 0x70, hints 0x0

This bug can be reproduced easily be setting 'viridian=1' in a HVM domU
.cfg file. A workaround without this patch is to boot the HVM guest with
'clocksource=jiffies'.

Signed-off-by: Olaf Hering <olaf@aepfle.de>
Link: http://lkml.kernel.org/r/1359940959-32168-1-git-send-email-kys@microsoft.com
Signed-off-by: K. Y. Srinivasan <kys@microsoft.com>
Cc: <stable@vger.kernel.org>
Cc: Greg KH <gregkh@linuxfoundation.org>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-02-12 16:25:48 -08:00
Linus Torvalds
a0e5056e3b Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux into akpm
Pull s390 regression fix from Martin Schwidefsky:
 "The recent fix for the s390 sched_clock() function uncovered yet
  another bug in s390_next_ktime which causes an endless loop in KVM.
  This regression should be fixed before v3.8.

  I keep the fingers crossed that this is the last one for v3.8."

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux:
  s390/timer: avoid overflow when programming clock comparator
2013-02-12 16:16:29 -08:00
Linus Torvalds
f2ea97cbae Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu into akpm
Pull m68knommu fix from Greg Ungerer:
 "This contains a single critical fix for the non-MMU m68k platforms.

  The change of the kernel exec code path has revealed a problem in the
  start thread code that causes crashing on boot.  This is the fix for
  it."

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu:
  m68knommu: fix trap on execing /bin/init
2013-02-12 16:15:39 -08:00
Borislav Petkov
5e2a044daf x86, head_32: Give the 6 label a real name
Jumping here we are about to enable paging so rename the label
accordingly.

Signed-off-by: Borislav Petkov <bp@suse.de>
Link: http://lkml.kernel.org/r/1360592538-10643-5-git-send-email-bp@alien8.de
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-02-12 15:48:42 -08:00
Borislav Petkov
c3a22a26d0 x86, head_32: Remove second CPUID detection from default_entry
We do that once earlier now and cache it into new_cpu_data.cpuid_level
so no need for the EFLAGS.ID toggling dance anymore.

Signed-off-by: Borislav Petkov <bp@suse.de>
Link: http://lkml.kernel.org/r/1360592538-10643-4-git-send-email-bp@alien8.de
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-02-12 15:48:42 -08:00
Borislav Petkov
9efb58de91 x86: Detect CPUID support early at boot
We detect CPUID function support on each CPU and save it for later use,
obviating the need to play the toggle EFLAGS.ID game every time. C code
is looking at ->cpuid_level anyway.

Signed-off-by: Borislav Petkov <bp@suse.de>
Link: http://lkml.kernel.org/r/1360592538-10643-3-git-send-email-bp@alien8.de
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-02-12 15:48:41 -08:00
Borislav Petkov
166df91daf x86, head_32: Remove i386 pieces
Remove code fragments detecting a 386 CPU since we don't support those
anymore. Also, do not do alignment checks because they're done only at
CPL3. Also, no need to preserve EFLAGS.

Signed-off-by: Borislav Petkov <bp@suse.de>
Link: http://lkml.kernel.org/r/1360592538-10643-2-git-send-email-bp@alien8.de
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-02-12 15:48:40 -08:00
H. Peter Anvin
8ecba5af94 Linux 3.8-rc7
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Merge tag 'v3.8-rc7' into x86/asm

Merge in the updates to head_32.S from the previous urgent branch, as
upcoming patches will make further changes.

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-02-12 15:47:45 -08:00
H. Peter Anvin
ff52c3b02b x86, doc: Clarify the use of asm("%edx") in uaccess.h
Put in a comment that explains that the use of asm("%edx") in
uaccess.h doesn't actually necessarily mean %edx alone.

Cc: Jamie Lokier <jamie@shareable.org>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: H. J. Lu <hjl.tools@gmail.com>
Link: http://lkml.kernel.org/r/511ACDFB.1050707@zytor.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-02-12 15:37:02 -08:00
Olof Johansson
ebcfe0faf9 omap4 pm changes via Paul Walmsley <paul@pwsan.com>:
Some OMAP4 power management fixes and audio device integration
 patches.  This pull request contains a fix for an issue discovered during
 branch integration.
 
 Basic test logs are available at:
 
     http://www.pwsan.com/omap/testlogs/omap4_prcm_devel_a_3.9/20130210112717/
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Merge tag 'omap-for-v3.9/pm-omap4-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into late/omap

From Tony Lindgren:
omap4 pm changes via Paul Walmsley <paul@pwsan.com>:

Some OMAP4 power management fixes and audio device integration
patches.  This pull request contains a fix for an issue discovered during
branch integration.

Basic test logs are available at:

    http://www.pwsan.com/omap/testlogs/omap4_prcm_devel_a_3.9/20130210112717/

* tag 'omap-for-v3.9/pm-omap4-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP4: hwmod data: Enable AESS hwmod device
  ARM: OMAP4: hwmod data: Update AESS data with memory bank area
  ARM: OMAP4+: AESS: enable internal auto-gating during initial setup
  ASoC: TI AESS: add autogating-enable function, callable from architecture code
  ARM: OMAP2+: hwmod: add enable_preprogram hook
  ARM: OMAP2+: PM: Fix the dt return condition in pm_late_init()
  ARM: OMAP4: PM: Warn users about usage of older bootloaders
2013-02-12 15:33:39 -08:00
Olof Johansson
488c77c961 omap clock changes via Paul Walmsley <paul@pwsan.com>:
Some miscellaneous OMAP2+ clock fixes, mostly related to the recent
 common clock framework conversion.
 
 Basic test logs are available here:
 
     http://www.pwsan.com/omap/testlogs/clock_devel_a_3.9/20130208120108/
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Merge tag 'omap-for-v3.9/clock-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into late/omap

From Tony Lindgren:
omap clock changes via Paul Walmsley <paul@pwsan.com>:

Some miscellaneous OMAP2+ clock fixes, mostly related to the recent
common clock framework conversion.

Basic test logs are available here:

    http://www.pwsan.com/omap/testlogs/clock_devel_a_3.9/20130208120108/

* tag 'omap-for-v3.9/clock-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP4: clock data: Add missing clkdm association for dpll_usb
  ARM: OMAP AM33XX: clock data: SET_RATE_PARENT in lcd path
  ARM: OMAP2+: clock data: add DEFINE_STRUCT_CLK_FLAGS helper
  ARM: OMAP2+: dpll: am335x - avoid freqsel
  omap3isp: Set cam_mclk rate directly
  ARM: OMAP3: clock: Back-propagate rate change from cam_mclk to dpll4_m5
2013-02-12 15:33:15 -08:00
Olof Johansson
379095930b omap pm wfi changes via Paul Walmsley <paul@pwsan.com>:
On OMAP2+ devices, standardize and clean up WFI entry and WFI blocking.
 
 Basic test logs are available here:
 
    http://www.pwsan.com/omap/testlogs/wfi_devel_a_3.9/20130208085027/
 
 Conflicts:
     arch/arm/mach-omap2/pm24xx.c
 
 Note that this is based on earlier omap-for-v3.9/pm-signed because
 of a non-trivial merge conflict. This branch also contains a fix
 for c1d1cd59 ("ARM: OMAP2+: omap_device: remove obsolete pm_lats
 and early_device code").
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Merge tag 'omap-for-v3.9/pm-wfi-take2-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into late/omap

From Tony Lindgren:
omap pm wfi changes via Paul Walmsley <paul@pwsan.com>:

On OMAP2+ devices, standardize and clean up WFI entry and WFI blocking.

Basic test logs are available here:

   http://www.pwsan.com/omap/testlogs/wfi_devel_a_3.9/20130208085027/

Conflicts:
    arch/arm/mach-omap2/pm24xx.c

Note that this is based on earlier omap-for-v3.9/pm-signed because
of a non-trivial merge conflict. This branch also contains a fix
for c1d1cd59 ("ARM: OMAP2+: omap_device: remove obsolete pm_lats
and early_device code").

* tag 'omap-for-v3.9/pm-wfi-take2-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (25 commits)
  ARM: OMAP2+: fix some omap_device_build() calls that aren't compiled by default
  ARM: OMAP AM3517/05: hwmod data: block WFI when EMAC active
  ARM: OMAP2420: hwmod data/PM: use hwmod to block WFI when I2C active
  ARM: OMAP2+: hwmod: add support for blocking WFI when a device is active
  ARM: OMAP2xxx: PM: enter WFI via inline asm if CORE stays active
  ARM: OMAP2+: powerdomain: fix whitespace, improve flag comments
  ARM: OMAP2+: clockdomain: convert existing atomic usecounts into spinlock-protected shorts/ints
  ARM: OMAP2+: clockdomain: work on wkdep/sleepdep functions
  ARM: OMAP2xxx: CM: remove autodep handling
  ARM: OMAP2+: powerdomain/clockdomain: add a per-powerdomain spinlock
  ARM: OMAP2+: PM/powerdomain: move omap_set_pwrdm_state() to powerdomain code
  ARM: OMAP2: PM/powerdomain: drop unnecessary pwrdm_wait_transition()
  ARM: OMAP2xxx: PM: clean up some crufty powerstate programming code
  ARM: OMAP2+: clockdomain: add pwrdm_state_switch() call to clkdm_sleep()
  ARM: OMAP2+: powerdomain: fix powerdomain trace integration
  ARM: OMAP4: MPUSS PM: remove unnecessary shim functions for powerdomain control
  ARM: OMAP3xxx: CPUIdle: optimize __omap3_enter_idle()
  ARM: OMAP2420: hwmod data/PM: use hwmod to block WFI when I2C active
  ARM: OMAP2+: hwmod: add support for blocking WFI when a device is active
  ARM: OMAP3xxx: CPUIdle: simplify the PER next-state code
  ...
2013-02-12 15:32:50 -08:00
Olof Johansson
0a0db4a1e4 am33xx updates via Paul Walmsley <paul@pwsan.com>:
Fixes and IP block support for the TI AM33xx family of SoCs.  These
 are prerequisites for power management and some PWM driver changes.
 
 Basic test logs are available from:
 
    http://www.pwsan.com/omap/testlogs/am33xx_fixes_a_3.9/20130208084835/
 
 although it must be noted that I am unable to test these patches on
 AM33xx due to an unknown problem with v3.8-rc kernels:
 
    http://www.mail-archive.com/linux-omap@vger.kernel.org/msg83525.html
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Merge tag 'omap-for-v3.9/am33xx-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into late/omap

From Tony Lindgren:
am33xx updates via Paul Walmsley <paul@pwsan.com>:

Fixes and IP block support for the TI AM33xx family of SoCs.  These
are prerequisites for power management and some PWM driver changes.

Basic test logs are available from:

   http://www.pwsan.com/omap/testlogs/am33xx_fixes_a_3.9/20130208084835/

although it must be noted that I am unable to test these patches on
AM33xx due to an unknown problem with v3.8-rc kernels:

   http://www.mail-archive.com/linux-omap@vger.kernel.org/msg83525.html

* tag 'omap-for-v3.9/am33xx-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2: am33xx-hwmod: Fix "register offset NULL check" bug
  ARM: OMAP2+: AM33xx: hwmod: add missing HWMOD_NO_IDLEST flags
  ARM: OMAP: AM33xx hwmod: Add parent-child relationship for PWM subsystem
  ARM: OMAP: AM33xx hwmod: Corrects PWM subsystem HWMOD entries
  ARM: DTS: AM33XX: Add nodes for OCMC RAM and WKUP-M3
  ARM: OMAP2+: AM33XX: Update the hardreset API
  ARM: OMAP2+: AM33XX: hwmod: Update the WKUP-M3 hwmod with reset status bit
  ARM: OMAP2+: AM33XX: hwmod: Fixup cpgmac0 hwmod entry
  ARM: OMAP2+: AM33XX: hwmod: Update TPTC0 hwmod with the right flags
  ARM: OMAP2+: AM33XX: hwmod: Register OCMC RAM hwmod
  ARM: OMAP2+: AM33XX: CM/PRM: Use __ASSEMBLER__ macros in header files
  ARM: OMAP2+: AM33XX: CM: Get rid of unnecessary header inclusions
2013-02-12 15:32:31 -08:00
Olof Johansson
02ea21331e am33xx specific updates for restart and revision detection.
Also get rid of OMAP_32K_TIMER_HZ as that no longer is needed.
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Merge tag 'omap-for-v3.9/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into late/omap

From Tony Lindgren:
am33xx specific updates for restart and revision detection.
Also get rid of OMAP_32K_TIMER_HZ as that no longer is needed.

* tag 'omap-for-v3.9/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2: AM33XX: id: Add support for AM335x PG2.0
  ARM: OMAP2+: Get rid of custom OMAP_32K_TIMER_HZ
  ARM: OMAP2+: AM33xx: Add SoC specific restart hook
2013-02-12 15:31:57 -08:00
Olof Johansson
b221498e5d Merge branch 'kvm-arm/timer' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into next/virt
From Marc Zyngier, this branch enables virtual GIC and timer for KVM/ARM.

* 'kvm-arm/timer' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms:
  ARM: KVM: arch_timers: Wire the init code and config option
  ARM: KVM: arch_timers: Add timer world switch
  ARM: KVM: arch_timers: Add guest timer core support
  ARM: KVM: Add VGIC configuration option
  ARM: KVM: VGIC initialisation code
  ARM: KVM: VGIC control interface world switch
  ARM: KVM: VGIC interrupt injection
  ARM: KVM: vgic: retire queued, disabled interrupts
  ARM: KVM: VGIC virtual CPU interface management
  ARM: KVM: VGIC distributor handling
  ARM: KVM: VGIC accept vcpu and dist base addresses from user space
  ARM: KVM: Initial VGIC infrastructure code
  ARM: KVM: Keep track of currently running vcpus
  KVM: ARM: Introduce KVM_ARM_SET_DEVICE_ADDR ioctl
  ARM: gic: add __ASSEMBLY__ guard to C definitions
  ARM: gic: define GICH offsets for VGIC support
  ARM: gic: add missing distributor defintions
2013-02-12 15:20:19 -08:00
Linus Torvalds
73c0d7522c Merge branch 'stable' of git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile into akpm
Pull tile bugfixes from Chris Metcalf:
 "This includes a variety of minor bug fixes, mostly to do with testing
  "make allyesconfig", "make allmodconfig", "make allnoconfig", inspired
  to Tejun Heo's observation about Kconfig.freezer not being included.

  The largest changes are just syntax changes removing the tile-specific
  use of a macro named INT_MASK, which is way too commonly redefined
  throughout driver code"

* 'stable' of git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile:
  tile: tag some code with #ifdef CONFIG_COMPAT
  tile: fix memcpy_*io functions for allnoconfig
  tile: export a handful of symbols appropriately
  drm: fix compile failure by including <linux/swiotlb.h>
  tile: avoid defining INT_MASK macro in <arch/interrupts.h>
  tile: provide "screen_info" when enabling VT
  drivers/input/joystick/analog.c: enable precise timer
  tile: include kernel/Kconfig.freezer in tile Kconfig
  tile: remove an unused variable in copy_thread()
2013-02-12 15:13:42 -08:00
Olof Johansson
7839c281ed imx device tree changes for 3.9
- Some tweaking and updates on device tree sources
  - Enable imx6q-cpufreq support for device tree boot
  - IMX/MXC onewire driver device tree conversion.  Onewire maintainer
    Evgeniy Polyakov gives his ACK to bless it go via arm-soc tree.
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Merge tag 'imx-dt-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6 into late/dt

From Shawn Guo:
imx device tree changes for 3.9

 - Some tweaking and updates on device tree sources
 - Enable imx6q-cpufreq support for device tree boot
 - IMX/MXC onewire driver device tree conversion.  Onewire maintainer
   Evgeniy Polyakov gives his ACK to bless it go via arm-soc tree.

* tag 'imx-dt-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6: (22 commits)
  ARM: dts: add dtsi for imx6q and imx6dl
  ARM: dts: rename imx6q.dtsi to imx6qdl.dtsi
  ARM: dts: i.MX6: Add regulator delay support
  ARM: dts: Add device tree entry for onewire master on i.MX53
  ARM: i.MX53: Add clocks for i.mx53 onewire master.
  W1: Add device tree support to MXC onewire master.
  ARM: imx: enable imx6q-cpufreq support
  ARM: dts: Add apf51 basic support
  ARM i.MX6: change mxs usbphy clock usage
  ARM: dts: imx6q: Remove silicon version from SDMA firmware
  ARM i.MX53: dts: add oftree for MBa53 baseboard
  ARM i.MX53: add dts for the TQ tqma53 module
  ARM: dts: imx53: pinctrl update
  ARM i.MX51 babbage: Add keypad support
  ARM: dts: imx: Add imx51 KPP entry
  ARM: dts: imx25-karo-tx25: Put status entry in the end
  ARM: mx25pdk: Add device tree support
  ARM: dts: imx: use nodes label in board dts
  ARM: dts: add missing imx dtb targets
  ARM: boot: dts: Add an entry for imx27-pdk.dtb
  ...
2013-02-12 15:11:40 -08:00
Olof Johansson
f628e3d924 ARM i.MX defconfig updates for v3.9
- enable VPU support in imx_v4_v5_defconfig to get compile coverage
 - enable netfilter support
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Merge tag 'arm-imx-defconfig' of git://git.pengutronix.de/git/imx/linux-2.6 into next/boards

ARM i.MX defconfig updates for v3.9

- enable VPU support in imx_v4_v5_defconfig to get compile coverage
- enable netfilter support

* tag 'arm-imx-defconfig' of git://git.pengutronix.de/git/imx/linux-2.6:
  ARM: imx_v4_v5_defconfig: Add VPU support
  ARM: imx: configs: enable netfilter support

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-02-12 15:08:53 -08:00
Olof Johansson
2cb6a0708e Linux 3.8-rc7
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Merge tag 'v3.8-rc7' into next/boards

Linux 3.8-rc7
2013-02-12 15:08:21 -08:00
Olof Johansson
0e55f0b003 Correction of 9x5 and 9n12 USART nodes
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Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into next/fixes-non-critical

From Nicolas Ferre:
Correction of 9x5 and 9n12 USART nodes

* tag 'at91-fixes' of git://github.com/at91linux/linux-at91:
  ARM: at91/DT: remove atmel,use-dma-* from 9x5 and 9n12 USART nodes
2013-02-12 15:04:11 -08:00
Olof Johansson
cae617b64c Merge branch 'fixes-for-3.9' into next/fixes-non-critical
This is a branch of fixes that originally were scheduled for 3.8 but
due to the request from Linus to hold back on all but the most critical
of fixes, we're re-queueing them for 3.9 here.

* fixes-for-3.9:
  ARM: dts: imx6: fix fec ptp clock slow 10 time
  ARM: highbank: mask cluster id from cpu_logical_map
  ARM: scu: mask cluster id from cpu_logical_map
  ARM: scu: add empty scu_enable for !CONFIG_SMP
  ARM: at91/at91sam9x5.dtsi: fix usart3 TXD
  ARM: at91: at91sam9x5: fix usart3 pinctrl name
  ARM: EXYNOS: Fix crash on soft reset on EXYNOS5440
  ARM: dts: fix tick and alarm irq numbers for exynos5440
  ARM: dts: fix compatible value for exynos pinctrl
  ARM: dts: Fix compatible value of pinctrl module on EXYNOS5440
  ARM: S3C24XX: fix uninitialized variable warning
  mfd/vexpress: vexpress_sysreg_setup must not be __init
  ARM: ux500: Fix u9540 booting issues
  arm: mvebu: i2c come back in defconfig
  arm: plat-orion: fix printing of "MPP config unavailable on this hardware"
  Dove: activate GPIO interrupts in DT
  ARM: ux500: add spin_unlock(&master_lock).
  ARM: ux500: Disable Power Supply and Battery Management by default

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-02-12 15:03:55 -08:00
Olof Johansson
b22d18c3b4 Two fixes for broken <mach/id.h> cleanup.
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Merge tag 'for-arm-soc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/cleanup

From Linus Walleij:
Two fixes for broken <mach/id.h> cleanup.

* tag 'for-arm-soc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  mfd: db8500-prcmu: update resource passing
  drivers/db8500-cpufreq: delete dangling include

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-02-12 15:00:14 -08:00
Rob Herring
a900e5d997 ARM: exynos: move exynos4210-combiner to drivers/irqchip
Exynos boot is broken with commit 0529e315 (ARM: use common irqchip_init
for GIC init). This commit split the irqchip initialization into 2 calls
to of_irq_init. This does not work because of_irq_init requires interrupt
parents to be in the match list.

Rather than reverting exynos changes, make it do the proper thing by using
IRQCHIP_DECLARE. This requires moving the combiner code to drivers/irqchip.

Reported-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-samsung-soc@vger.kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-02-12 14:51:10 -08:00
Steven Rostedt
f431b634f2 tracing/syscalls: Allow archs to ignore tracing compat syscalls
The tracing of ia32 compat system calls has been a bit of a pain as they
use different system call numbers than the 64bit equivalents.

I wrote a simple 'lls' program that lists files. I compiled it as a i686
ELF binary and ran it under a x86_64 box. This is the result:

echo 0 > /debug/tracing/tracing_on
echo 1 > /debug/tracing/events/syscalls/enable
echo 1 > /debug/tracing/tracing_on ; ./lls ; echo 0 > /debug/tracing/tracing_on

grep lls /debug/tracing/trace

[.. skipping calls before TS_COMPAT is set ...]

             lls-1127  [005] d...   936.409188: sys_recvfrom(fd: 0, ubuf: 4d560fc4, size: 0, flags: 8048034, addr: 8, addr_len: f7700420)
             lls-1127  [005] d...   936.409190: sys_recvfrom -> 0x8a77000
             lls-1127  [005] d...   936.409211: sys_lgetxattr(pathname: 0, name: 1000, value: 3, size: 22)
             lls-1127  [005] d...   936.409215: sys_lgetxattr -> 0xf76ff000
             lls-1127  [005] d...   936.409223: sys_dup2(oldfd: 4d55ae9b, newfd: 4)
             lls-1127  [005] d...   936.409228: sys_dup2 -> 0xfffffffffffffffe
             lls-1127  [005] d...   936.409236: sys_newfstat(fd: 4d55b085, statbuf: 80000)
             lls-1127  [005] d...   936.409242: sys_newfstat -> 0x3
             lls-1127  [005] d...   936.409243: sys_removexattr(pathname: 3, name: ffcd0060)
             lls-1127  [005] d...   936.409244: sys_removexattr -> 0x0
             lls-1127  [005] d...   936.409245: sys_lgetxattr(pathname: 0, name: 19614, value: 1, size: 2)
             lls-1127  [005] d...   936.409248: sys_lgetxattr -> 0xf76e5000
             lls-1127  [005] d...   936.409248: sys_newlstat(filename: 3, statbuf: 19614)
             lls-1127  [005] d...   936.409249: sys_newlstat -> 0x0
             lls-1127  [005] d...   936.409262: sys_newfstat(fd: f76fb588, statbuf: 80000)
             lls-1127  [005] d...   936.409279: sys_newfstat -> 0x3
             lls-1127  [005] d...   936.409279: sys_close(fd: 3)
             lls-1127  [005] d...   936.421550: sys_close -> 0x200
             lls-1127  [005] d...   936.421558: sys_removexattr(pathname: 3, name: ffcd00d0)
             lls-1127  [005] d...   936.421560: sys_removexattr -> 0x0
             lls-1127  [005] d...   936.421569: sys_lgetxattr(pathname: 4d564000, name: 1b1abc, value: 5, size: 802)
             lls-1127  [005] d...   936.421574: sys_lgetxattr -> 0x4d564000
             lls-1127  [005] d...   936.421575: sys_capget(header: 4d70f000, dataptr: 1000)
             lls-1127  [005] d...   936.421580: sys_capget -> 0x0
             lls-1127  [005] d...   936.421580: sys_lgetxattr(pathname: 4d710000, name: 3000, value: 3, size: 812)
             lls-1127  [005] d...   936.421589: sys_lgetxattr -> 0x4d710000
             lls-1127  [005] d...   936.426130: sys_lgetxattr(pathname: 4d713000, name: 2abc, value: 3, size: 32)
             lls-1127  [005] d...   936.426141: sys_lgetxattr -> 0x4d713000
             lls-1127  [005] d...   936.426145: sys_newlstat(filename: 3, statbuf: f76ff3f0)
             lls-1127  [005] d...   936.426146: sys_newlstat -> 0x0
             lls-1127  [005] d...   936.431748: sys_lgetxattr(pathname: 0, name: 1000, value: 3, size: 22)

Obviously I'm not calling newfstat with a fd of 4d55b085. The calls are
obviously incorrect, and confusing.

Other efforts have been made to fix this:

https://lkml.org/lkml/2012/3/26/367

But the real solution is to rewrite the syscall internals and come up
with a fixed solution. One that doesn't require all the kluge that the
current solution has.

Thus for now, instead of outputting incorrect data, simply ignore them.
With this patch the changes now have:

 #> grep lls /debug/tracing/trace
 #>

Compat system calls simply are not traced. If users need compat
syscalls, then they should just use the raw syscall tracepoints.

For an architecture to make their compat syscalls ignored, it must
define ARCH_TRACE_IGNORE_COMPAT_SYSCALLS (done in asm/ftrace.h) and also
define an arch_trace_is_compat_syscall() function that will return true
if the current task should ignore tracing the syscall.

I want to stress that this change does not affect actual syscalls in any
way, shape or form. It is only used within the tracing system and
doesn't interfere with the syscall logic at all. The changes are
consolidated nicely into trace_syscalls.c and asm/ftrace.h.

I had to make one small modification to asm/thread_info.h and that was
to remove the include of asm/ftrace.h. As asm/ftrace.h required the
current_thread_info() it was causing include hell. That include was
added back in 2008 when the function graph tracer was added:

 commit caf4b323 "tracing, x86: add low level support for ftrace return tracing"

It does not need to be included there.

Link: http://lkml.kernel.org/r/1360703939.21867.99.camel@gandalf.local.home

Acked-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2013-02-12 17:46:28 -05:00
H. Peter Anvin
3578baaed4 x86, mm: Redesign get_user with a __builtin_choose_expr hack
Instead of using a bitfield, use an odd little trick using typeof,
__builtin_choose_expr, and sizeof.  __builtin_choose_expr is
explicitly defined to not convert its type (its argument is required
to be a constant expression) so this should be well-defined.

The code is still not 100% preturbation-free versus the baseline
before 64-bit get_user(), but the differences seem to be very small,
mostly related to padding and to gcc deciding when to spill registers.

Cc: Jamie Lokier <jamie@shareable.org>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: H. J. Lu <hjl.tools@gmail.com>
Link: http://lkml.kernel.org/r/511A8922.6050908@zytor.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-02-12 12:46:40 -08:00
Shirish S
ebf4762812 ARM: dts: Correct pin configuration of SD 4 for exynos4x12-pinctrl
This patch corrects the pin function value of sd4_bus8
from 3 to 4. This is verified on origen board for testing
eMMC on dw_mci controller.

Signed-off-by: Shirish S <s.shirish@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-02-12 10:35:50 -08:00
Sachin Kamat
12ebb8ff76 ARM: SAMSUNG: Silence empty switch warning in fimc-core.h
Add 'default' case to silence the below warning:
arch/arm/plat-samsung/include/plat/fimc-core.h:25:9:
warning: switch with no cases

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-02-12 10:27:55 -08:00
Sachin Kamat
8d67ec8605 ARM: SAMSUNG: Silence empty switch warning in sdhci.h
Add 'default' case to silence the following warning:
arch/arm/plat-samsung/include/plat/sdhci.h:356:9: warning: switch with no cases

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-02-12 10:27:52 -08:00
Kim Phillips
6cce76dc9e powerpc/fsl: msi: sparse fixes
arch/powerpc/sysdev/fsl_msi.c:31:1: warning: symbol 'msi_head' was not declared. Should it be static?
arch/powerpc/sysdev/fsl_msi.c:138:40: warning: incorrect type in argument 1 (different base types)
arch/powerpc/sysdev/fsl_msi.c:138:40:    expected restricted __be64 const [usertype] *p
arch/powerpc/sysdev/fsl_msi.c:138:40:    got unsigned long long const [usertype] *[assigned] reg

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-02-12 11:05:23 -06:00
Kim Phillips
8998a03009 powerpc/fsl: ifc: sparse fixes
arch/powerpc/sysdev/fsl_ifc.c:66:38: warning: incorrect type in initializer (different base types)
arch/powerpc/sysdev/fsl_ifc.c:66:38:    expected restricted __be32 [usertype] cspr
arch/powerpc/sysdev/fsl_ifc.c:66:38:    got unsigned int
arch/powerpc/sysdev/fsl_ifc.c:67:21: warning: restricted __be32 degrades to integer
arch/powerpc/sysdev/fsl_ifc.c:67:39: warning: restricted __be32 degrades to integer

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-02-12 11:05:21 -06:00
Kim Phillips
8443cc142d powerpc/fsl: fsl_soc: sparse fixes
arch/powerpc/sysdev/fsl_soc.c:70:67: warning: incorrect type in argument 2 (different base types)
arch/powerpc/sysdev/fsl_soc.c:70:67:    expected restricted __be32 const [usertype] *addr
arch/powerpc/sysdev/fsl_soc.c:70:67:    got unsigned int const [usertype] *

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-02-12 11:05:20 -06:00
Kim Phillips
01673a135e powerpc/fsl: lbc: sparse fixes
arch/powerpc/sysdev/fsl_lbc.c:77:36: warning: incorrect type in initializer (different base types)
arch/powerpc/sysdev/fsl_lbc.c:77:36:    expected restricted __be32 [usertype] br
arch/powerpc/sysdev/fsl_lbc.c:77:36:    got unsigned int
arch/powerpc/sysdev/fsl_lbc.c:78:36: warning: incorrect type in initializer (different base types)
arch/powerpc/sysdev/fsl_lbc.c:78:36:    expected restricted __be32 [usertype] or
arch/powerpc/sysdev/fsl_lbc.c:78:36:    got unsigned int
arch/powerpc/sysdev/fsl_lbc.c:80:21: warning: restricted __be32 degrades to integer
arch/powerpc/sysdev/fsl_lbc.c:80:38: warning: restricted __be32 degrades to integer
arch/powerpc/sysdev/fsl_lbc.c:111:12: warning: incorrect type in assignment (different base types)
arch/powerpc/sysdev/fsl_lbc.c:111:12:    expected restricted __be32 [usertype] br
arch/powerpc/sysdev/fsl_lbc.c:111:12:    got unsigned int
arch/powerpc/sysdev/fsl_lbc.c:113:17: warning: restricted __be32 degrades to integer
arch/powerpc/sysdev/fsl_lbc.c:127:17: warning: restricted __be32 degrades to integer

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-02-12 11:05:18 -06:00
Tony Lindgren
25e4d0f6df Merge branch 'omap-for-v3.9/pm-fix' into omap-for-v3.9/pm-wfi-take2 2013-02-12 09:01:25 -08:00
Paul Walmsley
6efc3fe0f4 ARM: OMAP2+: fix some omap_device_build() calls that aren't compiled by default
Commit c1d1cd597f ("ARM: OMAP2+:
omap_device: remove obsolete pm_lats and early_device code") missed a
few omap_device_build() calls that aren't included as part of the default
OMAP2+ Kconfig, omap2plus_defconfig.

Ideally, all devices that are present on the SoC should be created by
default, and only the corresponding device driver should be configured
or deconfigured in Kconfig.  This allows drivers to be built as
modules and loaded later, even if they weren't part of the original
kernel build.  Unfortunately, we're not quite there yet.

Thanks to Tony Lindgren for reporting this, found during his
randconfig tests.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-02-12 09:00:33 -08:00
Linus Walleij
05ec260ede mfd: db8500-prcmu: update resource passing
When trying to get rid of the cross-includes of <mach/id.h>
from different drivers, so we can localize ASIC/CPU detection
to the mach-ux500 folder, we run into the way the PRCMU
handles base addresses and firmware detection.

This patch updates the firmware version detection to pass
the required information as platform data instead of
relying on cpu_is_* macros.

Now the PRCMU base address, the secondary TCDM area, the
TCPM area and the IRQ are passed as resources instead of
being grabbed from <mach/*> files. Incidentally this also
removes part of the reliance on <mach/irqs.h>.

Further it updates the firmware version detection, since the
location of the firmware ID bytes in the designated memory
are is now passed from the platform data instead. There is
no reason not to include the nice split-off of a struct to
hold the firmware information and a separate function to
populate it.

The patch actually rids the need to use the external
db8500_prcmu_early_init call at all, but I'm keepin back
that removal as I don't want the patch to be too big.

Cc: arm@kernel.org
Cc: Michel Jaoen <michel.jaouen@stericsson.com>
Cc: Lee Jones <lee.jones@linaro.org>
Acked-by: Samuel Ortiz <sameo@linux.intel.com>
Acked-by: Loic Pallardy <loic.pallardy@stericsson.com>
Acked-by: Fabio Baltieri <fabio.baltieri@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-12 12:44:27 +01:00
Michal Simek
d64af918fe microblaze: Do not use module.h in files which are not modules
Based on the patch:
"lib: reduce the use of module.h wherever possible"
(sha1: 8bc3bcc93a)
fix all microblaze files which are not modules.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-02-12 11:24:45 +01:00
Michal Simek
6bd55f0bba microblaze: Fix coding style issues
Fix coding style issues reported by checkpatch.pl.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2013-02-12 11:24:45 +01:00
Michal Simek
5b3084b582 microblaze: Add missing return from debugfs_tlb
Function must return any value.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-02-12 11:24:45 +01:00
Jason Wu
5f5e323695 microblaze: Makefile clean
Remove unnecessary variables

Signed-off-by: Jason Wu <huanyu@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2013-02-12 11:24:44 +01:00
Lars-Peter Clausen
f6bfc62b97 microblaze: Add .gitignore entries for auto-generated files
Add .gitignore entries for files which are generated during the build process.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2013-02-12 11:24:44 +01:00
Michal Simek
1de9e46c21 microblaze: Fix strncpy_from_user macro
Problem happens when len in strncpy_from_user is setup
and passing string has len-1 chars + \0 terminated
character. In this case was returned incorrect length
of the string.
It should always retunrs the length of the string
(not including the trailing NULL).

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-02-12 11:24:44 +01:00
Fabio Estevam
09de7ee169 ARM: imx_v4_v5_defconfig: Add VPU support
Let the VPU driver be built by default.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-02-12 09:08:56 +01:00
Javier Martinez Canillas
34d725e566 ARM: imx: configs: enable netfilter support
The Netfilter packet filtering framework is useful for so many
use cases that most people will build kernels with it enabled.

So, it would probably make sense to have it enabled by default.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-02-12 09:07:55 +01:00
H. Peter Anvin
16640165c9 x86: Be consistent with data size in getuser.S
Consistently use the data register by name and use a sized assembly
instruction in getuser.S.  There is never any reason to macroize it,
and being inconsistent in the same file is just annoying.

No actual code change.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2013-02-11 23:14:48 -08:00
Olof Johansson
1c75c42100 Merge branch 'socfpga/hw' into next/soc
From Dinh Nguyen, this is a series of patches introducing support for
socfpga hardware (Altera Cyclone5). It also includes a cleanup that
moves some of the ARMv7 cache maintenance functions to a common location,
since three other platforms aready implemented it separately.

* socfpga/hw:
  arm: socfpga: Add SMP support for actual socfpga harware
  arm: Add v7_invalidate_l1 to cache-v7.S
  arm: socfpga: Add entries to enable make dtbs socfpga
  arm: socfpga: Add new device tree source for actual socfpga HW

Trivial conflict in arch/arm/mach-tegra/headsmp.S.

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-02-11 19:37:51 -08:00
Dinh Nguyen
d6dd735f4b arm: socfpga: Add SMP support for actual socfpga harware
Because the CPU1 start address is different for socfpga-vt and
socfpga-cyclone5, we add code to use the correct CPU1 start addr.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Signed-off-by: Pavel Machek <pavel@denx.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-02-11 19:37:26 -08:00
Dinh Nguyen
c08e20d246 arm: Add v7_invalidate_l1 to cache-v7.S
mach-socfpga is another platform that needs to use
v7_invalidate_l1 to bringup additional cores. There was a comment that
the ideal place for v7_invalidate_l1 should be in arm/mm/cache-v7.S

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Pavel Machek <pavel@denx.de>
Tested-by: Stephen Warren <swarren@nvidia.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Olof Johansson <olof@lixom.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-02-11 19:37:24 -08:00
Dinh Nguyen
90c294557d arm: socfpga: Add entries to enable make dtbs socfpga
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Tested-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Pavel Machek <pavel@denx.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
Cc: Pavel Machek <pavel@denx.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-02-11 19:37:21 -08:00
Dinh Nguyen
c2ad284412 arm: socfpga: Add new device tree source for actual socfpga HW
Up to this point, support for socfpga has only been on a virtual
platform. Now that actual hardware is available, we add the appropriate
device tree source files.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Tested-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Pavel Machek <pavel@denx.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-02-11 19:37:19 -08:00
Arnd Bergmann
389d2111f4 ARM: msm: proc_comm_boot_wait should not be __init
msm_smd_probe is a driver probe function and may get
called after the __init time, so it must not call
any __init function, as the link-time warning reports.
Take away the __init annotation on proc_comm_boot_wait
to fix this.

Without this patch, building msm_defconfig results in:

WARNING: vmlinux.o(.text+0xb048): Section mismatch in reference from the function msm_smd_probe() to the function .init.text:proc_comm_boot_wait()
The function msm_smd_probe() references
the function __init proc_comm_boot_wait().
This is often because msm_smd_probe lacks a __init
annotation or the annotation of proc_comm_boot_wait is wrong.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Daniel Walker <c_dwalke@quicinc.com>
Cc: linux-arm-msm@vger.kernel.org
Acked-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-02-11 17:42:28 -08:00
H. Peter Anvin
b390784dc1 x86, mm: Use a bitfield to mask nuisance get_user() warnings
Even though it is never executed, gcc wants to warn for casting from
a large integer to a pointer.  Furthermore, using a variable with
__typeof__() doesn't work because __typeof__ retains storage
specifiers (const, restrict, volatile).

However, we can declare a bitfield using sizeof(), which is legal
because sizeof() is a constant expression.  This quiets the warning,
although the code generated isn't 100% identical from the baseline
before 96477b4 x86-32: Add support for 64bit get_user():

[x86-mb is baseline, x86-mm is this commit]

   text      data        bss     filename
113716147  15858380   35037184   tip.x86-mb/o.i386-allconfig/vmlinux
113716145  15858380   35037184   tip.x86-mm/o.i386-allconfig/vmlinux
 12989837   3597944   12255232   tip.x86-mb/o.i386-modconfig/vmlinux
 12989831   3597944   12255232   tip.x86-mm/o.i386-modconfig/vmlinux
  1462784    237608    1401988   tip.x86-mb/o.i386-noconfig/vmlinux
  1462837    237608    1401964   tip.x86-mm/o.i386-noconfig/vmlinux
  7938994    553688    7639040   tip.x86-mb/o.i386-pae/vmlinux
  7943136    557784    7639040   tip.x86-mm/o.i386-pae/vmlinux
  7186126    510572    6574080   tip.x86-mb/o.i386/vmlinux
  7186124    510572    6574080   tip.x86-mm/o.i386/vmlinux
103747269  33578856   65888256   tip.x86-mb/o.x86_64-allconfig/vmlinux
103746949  33578856   65888256   tip.x86-mm/o.x86_64-allconfig/vmlinux
 12116695  11035832   20160512   tip.x86-mb/o.x86_64-modconfig/vmlinux
 12116567  11035832   20160512   tip.x86-mm/o.x86_64-modconfig/vmlinux
  1700790    380524     511808   tip.x86-mb/o.x86_64-noconfig/vmlinux
  1700790    380524     511808   tip.x86-mm/o.x86_64-noconfig/vmlinux
 12413612   1133376    1101824   tip.x86-mb/o.x86_64/vmlinux
 12413484   1133376    1101824   tip.x86-mm/o.x86_64/vmlinux

Cc: Jamie Lokier <jamie@shareable.org>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: http://lkml.kernel.org/r/20130209110031.GA17833@n2100.arm.linux.org.uk
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2013-02-11 17:26:51 -08:00
Mike Travis
d924f947a4 x86, uv, uv3: Trim MMR register definitions after code changes for SGI UV3
This patch trims the MMR register definitions after the updates for the
SGI UV3 system have been applied.  Note that because these definitions
are automatically generated from the RTL we cannot control the length
of the names.  Therefore there are lines that exceed 80 characters.

Signed-off-by: Mike Travis <travis@sgi.com>
Link: http://lkml.kernel.org/r/20130211194509.173026880@gulag1.americas.sgi.com
Acked-by: Russ Anderson <rja@sgi.com>
Reviewed-by: Dimitri Sivanich <sivanich@sgi.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-02-11 17:18:25 -08:00
Mike Travis
0af6352045 x86, uv, uv3: Update Time Support for SGI UV3
This patch updates time support for the SGI UV3 hub.  Since the UV2
and UV3 time support is identical, "is_uvx_hub" is used instead of
having both "is_uv2_hub" and "is_uv3_hub".

Signed-off-by: Mike Travis <travis@sgi.com>
Link: http://lkml.kernel.org/r/20130211194508.893907185@gulag1.americas.sgi.com
Acked-by: Russ Anderson <rja@sgi.com>
Reviewed-by: Dimitri Sivanich <sivanich@sgi.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-02-11 17:18:12 -08:00
Mike Travis
b15cc4a12b x86, uv, uv3: Update x2apic Support for SGI UV3
This patch adds support for the SGI UV3 hub to the common x2apic
functions.  The primary changes are to account for the similarities
between UV2 and UV3 which are encompassed within the "UVX" nomenclature.

One significant difference within UV3 is the handling of the MMIOH
regions which are redirected to the target blade (with the device) in
a different manner.  It also now has two MMIOH regions for both small and
large BARs.  This aids in limiting the amount of physical address space
removed from real memory that's used for I/O in the max config of 64TB.

Signed-off-by: Mike Travis <travis@sgi.com>
Link: http://lkml.kernel.org/r/20130211194508.752924185@gulag1.americas.sgi.com
Acked-by: Russ Anderson <rja@sgi.com>
Reviewed-by: Dimitri Sivanich <sivanich@sgi.com>
Cc: Alexander Gordeev <agordeev@redhat.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Steffen Persvold <sp@numascale.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-02-11 17:18:03 -08:00
Mike Travis
6edbd4714e x86, uv, uv3: Update Hub Info for SGI UV3
This patch updates the UV HUB info for UV3.  The "is_uv3_hub" and
"is_uvx_hub" (UV2 or UV3) functions are added as well as the addresses
and sizes of the MMR regions for UV3.

Signed-off-by: Mike Travis <travis@sgi.com>
Link: http://lkml.kernel.org/r/20130211194508.610723192@gulag1.americas.sgi.com
Acked-by: Russ Anderson <rja@sgi.com>
Reviewed-by: Dimitri Sivanich <sivanich@sgi.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-02-11 17:17:50 -08:00
Mike Travis
526018bc5e x86, uv, uv3: Update ACPI Check to include SGI UV3
Add UV3 to exclusion list.  Instead of adding every new series of
SGI UV systems, just check oem_id to have a prefix of "SGI".

Signed-off-by: Mike Travis <travis@sgi.com>
Link: http://lkml.kernel.org/r/20130211194508.457937455@gulag1.americas.sgi.com
Acked-by: Russ Anderson <rja@sgi.com>
Reviewed-by: Dimitri Sivanich <sivanich@sgi.com>
Cc: Jiang Liu <liuj97@gmail.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-02-11 17:17:44 -08:00
Mike Travis
60fe7be34d x86, uv, uv3: Update MMR register definitions for SGI Ultraviolet System 3 (UV3)
This patch updates the MMR register definitions for the SGI UV3 system.
Note that because these definitions are automatically generated from
the RTL we cannot control the length of the names.  Therefore there are
lines that exceed 80 characters.

All the new MMR definitions are added in this patch.  The patches that
follow then update the references. The last patch is a "trim" patch
which reduces the size of the MMR definitions file by about a third.
This keeps "bi-sectability" in place as the intermediate patches would
not compile correctly if the trimmed MMR defines were done first.

Signed-off-by: Mike Travis <travis@sgi.com>
Link: http://lkml.kernel.org/r/20130211194508.326204556@gulag1.americas.sgi.com
Acked-by: Russ Anderson <rja@sgi.com>
Reviewed-by: Dimitri Sivanich <sivanich@sgi.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-02-11 17:17:33 -08:00
Grant Likely
fa59f17855 powerpc/5200: Use the gpt* labels to simplify mpc5200 dts files
The DTC labels feature allows a dts file to reference a node without
having to reproduce the entire node hierarchy above it. We can use this
to simplify the MPC5200 board dts files by referencing the gpt nodes by
label.

Cc: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
[agust: fixed gpt7 phandle in the csi node of o2d.dtsi]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2013-02-11 21:48:09 +00:00
Grant Likely
4fd0a21353 powerpc/5200: Add Lite5200 on-board LEDs as devices
The Lite5200 evaluation board has a number of debug LEDs that Linux
doesn't know about yet. This change adds a gpio-leds stanza to the
lite5200 device tree so that the correct driver can get hooked up.

Also, make use of the dtc labels feature to reduce the number of source
lines required to add the gpio-controller property to the general
purpose timer nodes. In addition, the required #gpio-cells properties
are added to the common mpc5200b dtsi include file so that each board
doesn't need to add them explicitly. This still doesn't enable gpio
mode, 'gpio-controller' is required for that, but it means less work
needs to be done by board ports.

Cc: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2013-02-11 21:24:53 +00:00
Marc Zyngier
967f84275b ARM: KVM: arch_timers: Wire the init code and config option
It is now possible to select CONFIG_KVM_ARM_TIMER to enable the
KVM architected timer support.

Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-02-11 19:06:00 +00:00
Marc Zyngier
c7e3ba64ba ARM: KVM: arch_timers: Add timer world switch
Do the necessary save/restore dance for the timers in the world
switch code. In the process, allow the guest to read the physical
counter, which is useful for its own clock_event_device.

Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-02-11 19:05:38 +00:00
Marc Zyngier
53e724067a ARM: KVM: arch_timers: Add guest timer core support
Add some the architected timer related infrastructure, and support timer
interrupt injection, which can happen as a resultof three possible
events:

- The virtual timer interrupt has fired while we were still
  executing the guest
- The timer interrupt hasn't fired, but it expired while we
  were doing the world switch
- A hrtimer we programmed earlier has fired

Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-02-11 19:05:11 +00:00
Marc Zyngier
9ae9e2535d Merge branch 'for-arm-soc/arch-timers' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into kvm-arm/timer 2013-02-11 19:03:52 +00:00
Marc Zyngier
75431f9d73 ARM: KVM: Add VGIC configuration option
It is now possible to select the VGIC configuration option.

Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-02-11 19:00:15 +00:00
Marc Zyngier
01ac5e342f ARM: KVM: VGIC initialisation code
Add the init code for the hypervisor, the virtual machine, and
the virtual CPUs.

An interrupt handler is also wired to allow the VGIC maintenance
interrupts, used to deal with level triggered interrupts and LR
underflows.

A CPU hotplug notifier is registered to disable/enable the interrupt
as requested.

Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-02-11 19:00:10 +00:00
Marc Zyngier
348b2b0708 ARM: KVM: VGIC control interface world switch
Enable the VGIC control interface to be save-restored on world switch.

Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-02-11 19:00:03 +00:00
Marc Zyngier
5863c2ce72 ARM: KVM: VGIC interrupt injection
Plug the interrupt injection code. Interrupts can now be generated
from user space.

Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-02-11 18:59:55 +00:00
Marc Zyngier
a1fcb44e26 ARM: KVM: vgic: retire queued, disabled interrupts
An interrupt may have been disabled after being made pending on the
CPU interface (the classic case is a timer running while we're
rebooting the guest - the interrupt would kick as soon as the CPU
interface gets enabled, with deadly consequences).

The solution is to examine already active LRs, and check the
interrupt is still enabled. If not, just retire it.

Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-02-11 18:59:49 +00:00
Marc Zyngier
9d949dce52 ARM: KVM: VGIC virtual CPU interface management
Add VGIC virtual CPU interface code, picking pending interrupts
from the distributor and stashing them in the VGIC control interface
list registers.

Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-02-11 18:59:20 +00:00
Marc Zyngier
b47ef92af8 ARM: KVM: VGIC distributor handling
Add the GIC distributor emulation code. A number of the GIC features
are simply ignored as they are not required to boot a Linux guest.

Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-02-11 18:59:15 +00:00
Christoffer Dall
330690cdce ARM: KVM: VGIC accept vcpu and dist base addresses from user space
User space defines the model to emulate to a guest and should therefore
decide which addresses are used for both the virtual CPU interface
directly mapped in the guest physical address space and for the emulated
distributor interface, which is mapped in software by the in-kernel VGIC
support.

Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-02-11 18:59:01 +00:00
Marc Zyngier
1a89dd9113 ARM: KVM: Initial VGIC infrastructure code
Wire the basic framework code for VGIC support and the initial in-kernel
MMIO support code for the VGIC, used for the distributor emulation.

Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-02-11 18:58:55 +00:00
Marc Zyngier
1638a12d4e ARM: KVM: Keep track of currently running vcpus
When an interrupt occurs for the guest, it is sometimes necessary
to find out which vcpu was running at that point.

Keep track of which vcpu is being run in kvm_arch_vcpu_ioctl_run(),
and allow the data to be retrieved using either:
- kvm_arm_get_running_vcpu(): returns the vcpu running at this point
  on the current CPU. Can only be used in a non-preemptible context.
- kvm_arm_get_running_vcpus(): returns the per-CPU variable holding
  the running vcpus, usable for per-CPU interrupts.

Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-02-11 18:58:48 +00:00
Christoffer Dall
3401d54696 KVM: ARM: Introduce KVM_ARM_SET_DEVICE_ADDR ioctl
On ARM some bits are specific to the model being emulated for the guest and
user space needs a way to tell the kernel about those bits.  An example is mmio
device base addresses, where KVM must know the base address for a given device
to properly emulate mmio accesses within a certain address range or directly
map a device with virtualiation extensions into the guest address space.

We make this API ARM-specific as we haven't yet reached a consensus for a
generic API for all KVM architectures that will allow us to do something like
this.

Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-02-11 18:58:39 +00:00
Will Deacon
d24e638eb0 ARM: mach-virt: fixup machine descriptor after removal of sys_timer
Now that sys_timer has been removed, update the mach-virt machine
descriptor to use a direct pointer to its timer_init function.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-02-11 10:39:30 -08:00
Will Deacon
ec45d1cfd3 arm64: mm: update CONTEXTIDR register to contain PID of current process
This patch is a port of 575320d62 ("ARM: 7445/1: mm: update CONTEXTIDR
register to contain PID of current process") from ARM that introduces a
new Kconfig option which, when enabled, causes the kernel to write the
PID of the current task into the CONTEXTIDR register on context switch.
This is useful when analysing hardware trace, since writes to this
register can be configured to emit an event into the trace stream.

Signed-off-by: Will Deacon <will.deacon@arm.com>
[catalin.marinas@arm.com: contextidr_thread_switch() moved to mmu_context.h]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-02-11 18:24:18 +00:00
Will Deacon
3a0310eb36 arm64: atomics: fix grossly inconsistent asm constraints for exclusives
Our uses of inline asm constraints for atomic operations are fairly
wild and varied. We basically need to guarantee the following:

  1. Any instructions with barrier implications
     (load-acquire/store-release) have a "memory" clobber

  2. When performing exclusive accesses, the addresing mode is generated
     using the "Q" constraint

  3. Atomic blocks which use the condition flags, have a "cc" clobber

This patch addresses these concerns which, as well as fixing the
semantics of the code, stops GCC complaining about impossible asm
constraints.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-02-11 18:16:41 +00:00
Joonsoo Kim
7c4e9ced42 ARM: 7643/1: sched: correct update_sched_clock()
If we want load epoch_cyc and epoch_ns atomically,
we should update epoch_cyc_copy first of all.
This notify reader that updating is in progress.

If we update epoch_cyc first like as current implementation,
there is subtle error case.
Look at the below example.

<Initial Condition>
cyc = 9
ns = 900
cyc_copy = 9

== CASE 1 ==
<CPU A = reader>           <CPU B = updater>
                           write cyc = 10
read cyc = 10
read ns = 900
                           write ns = 1000
                           write cyc_copy = 10
read cyc_copy = 10

output = (10, 900)

== CASE 2 ==
<CPU A = reader>           <CPU B = updater>
read cyc = 9
                           write cyc = 10
                           write ns = 1000
read ns = 1000
read cyc_copy = 9
                           write cyc_copy = 10
output = (9, 1000)

If atomic read is ensured, output should be (9, 900) or (10, 1000).
But, output in example case are not.

So, change updating sequence in order to correct this problem.

Cc: <stable@vger.kernel.org>
Signed-off-by: Joonsoo Kim <iamjoonsoo.kim@lge.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-02-11 17:33:08 +00:00
Olof Johansson
28e783aacb Merge branch 'for-arm-soc/virt/mach' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into next/virt
From Will Deacon, this lays the foundation for a basic virtualzed machine type.

* 'for-arm-soc/virt/mach' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux:
  ARM: mach-virt: add SMP support using PSCI
  ARM: Dummy Virtual Machine platform support

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-02-11 09:22:09 -08:00
Olof Johansson
5f48a29f17 Merge branch 'depends/cleanup' into next/virt 2013-02-11 09:21:44 -08:00
Tony Lindgren
58a656b77a On OMAP2+ devices, standardize and clean up WFI entry and WFI blocking.
Basic test logs are available here:
 
    http://www.pwsan.com/omap/testlogs/wfi_devel_a_3.9/20130208085027/
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Merge tag 'omap-devel-b-for-3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.9/pm-wfi-take2

On OMAP2+ devices, standardize and clean up WFI entry and WFI blocking.

Basic test logs are available here:

   http://www.pwsan.com/omap/testlogs/wfi_devel_a_3.9/20130208085027/

Conflicts:
	arch/arm/mach-omap2/pm24xx.c
2013-02-11 09:20:50 -08:00
Tony Lindgren
8d61d7f945 OMAP PM related updates via Paul Walmsley <paul@pwsan.com>:
Remove some dead OMAP clock and device integration code and data.
 Also, clean up the way that the OMAP device integration code blocks
 WFI/WFE to use a consistent mechanism, controlled by a data flag.
 
 Several OMAP2+ power management fixes, optimizations, and cleanup.
 This series is a prerequisite for the functional powerdomain
 conversion series.
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Merge tag 'omap-for-v3.9/pm-signed' into omap-for-v3.9/pm-wfi-take2

OMAP PM related updates via Paul Walmsley <paul@pwsan.com>:

Remove some dead OMAP clock and device integration code and data.
Also, clean up the way that the OMAP device integration code blocks
WFI/WFE to use a consistent mechanism, controlled by a data flag.

Several OMAP2+ power management fixes, optimizations, and cleanup.
This series is a prerequisite for the functional powerdomain
conversion series.
2013-02-11 09:19:44 -08:00
Olof Johansson
3ad06d1a7d Merge branch 'depends/rmk-psci' into next/virt 2013-02-11 09:05:45 -08:00
Olof Johansson
4f5c1c04f8 Merge branch 'irqchip/gic-vic-move' into next/virt 2013-02-11 09:05:29 -08:00
Olof Johansson
37a42fca28 Merge branch 'for-arm-soc/arch-timers' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into next/virt
From Will Deacon:
This set of changes moves the arch-timer driver out from arch/arm/ and
into drivers/clocksource and unifies the new driver with the arm64 copy.

* 'for-arm-soc/arch-timers' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux:
  ARM: arch_timers: switch to physical timers if HYP mode is available
  Documentation: Add ARMv8 to arch_timer devicetree
  arm64: move from arm_generic to arm_arch_timer
  arm64: arm_generic: prevent reading stale time
  arm: arch_timer: move core to drivers/clocksource
  arm: arch_timer: add arch_counter_set_user_access
  arm: arch_timer: divorce from local_timer api
  arm: arch_timer: add isbs to register accessors
  arm: arch_timer: factor out register accessors
  arm: arch_timer: split cntfrq accessor
  arm: arch_timer: standardise counter reading
  arm: arch_timer: use u64/u32 for register data
  arm: arch_timer: remove redundant available check
  arm: arch_timer: balance device_node refcounting

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-02-11 09:04:44 -08:00
Olof Johansson
3ddc0e1a7f Merge branch 'for-rmk/broadcast' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into next/virt
* 'for-rmk/broadcast' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux:
  arm: Add generic timer broadcast support
  arm: Use generic timer broadcast receiver
  clockevents: Add generic timer broadcast function
  clockevents: Add generic timer broadcast receiver
2013-02-11 09:03:05 -08:00
Olof Johansson
655e194cfe Merge branch 'for-rmk/virt/kvm/core' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into next/virt
* 'for-rmk/virt/kvm/core' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux:
  KVM: ARM: Add maintainer entry for KVM/ARM
  KVM: ARM: Power State Coordination Interface implementation
  KVM: ARM: Handle I/O aborts
  KVM: ARM: Handle guest faults in KVM
  KVM: ARM: VFP userspace interface
  KVM: ARM: Demux CCSIDR in the userspace API
  KVM: ARM: User space API for getting/setting co-proc registers
  KVM: ARM: Emulation framework and CP15 emulation
  KVM: ARM: World-switch implementation
  KVM: ARM: Inject IRQs and FIQs from userspace
  KVM: ARM: Memory virtualization setup
  KVM: ARM: Hypervisor initialization
  KVM: ARM: Initial skeleton to compile KVM support
  ARM: Section based HYP idmap
  ARM: Add page table and page defines needed by KVM
2013-02-11 09:02:53 -08:00
Olof Johansson
1e044f0490 Merge branch 'for-rmk/perf' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into next/virt
* 'for-rmk/perf' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux:
  ARM: perf: simplify __hw_perf_event_init err handling
  ARM: perf: remove unnecessary checks for idx < 0
  ARM: perf: handle armpmu_register failing
  ARM: perf: don't pretend to support counting of L1I writes
  ARM: perf: remove redundant NULL check on cpu_pmu
  ARM: Use implementor and part defines from cputype.h
  ARM: Define CPU part numbers and implementors
2013-02-11 09:02:45 -08:00
Maxime Ripard
867dc8beba sunxi: a13-olinuxino: Add user LED to the device tree
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-02-11 16:18:58 +01:00
Vineet Gupta
d8005e6b95 ARC: Timers/counters/delay management
ARC700 includes 2 in-core 32bit timers TIMER0 and TIMER1.
Both have exactly same capabilies.

* programmable to count from TIMER<n>_CNT to TIMER<n>_LIMIT
* for count 0 and LIMIT ~1, provides a free-running counter by
    auto-wrapping when limit is reached.
* optionally interrupt when LIMIT is reached (oneshot event semantics)
* rearming the interrupt provides periodic semantics
* run at CPU clk

ARC Linux uses TIMER0 for clockevent (periodic/oneshot) and TIMER1 for
clocksource (free-running clock).

Newer cores provide RTSC insn which gives a 64bit cpu clk snapshot hence
is more apt for clocksource when available.

SMP poses a bit of challenge for global timekeeping clocksource /
sched_clock() backend:
 -TIMER1 based local clocks are out-of-sync hence can't be used
  (thus we default to jiffies based cs as well as sched_clock() one/both
  of which platform can override with it's specific hardware assist)
 -RTSC is only allowed in SMP if it's cross-core-sync (Kconfig glue
  ensures that) and thus usable for both requirements.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
2013-02-11 20:00:39 +05:30
Vineet Gupta
bf90e1eab6 ARC: Process-creation/scheduling/idle-loop
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Al Viro <viro@ZenIV.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
2013-02-11 20:00:38 +05:30
Vineet Gupta
4adeefe161 ARC: Syscall support (no-legacy-syscall ABI)
This includes support for generic clone/for/vfork/execve

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Al Viro <viro@ZenIV.linux.org.uk>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-02-11 20:00:38 +05:30
Vineet Gupta
054419ed84 ARC: Non-MMU Exception Handling
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-11 20:00:37 +05:30
Vineet Gupta
bacdf4809a ARC: Interrupt Handling
This contains:
-bootup arch IRQ init: init_IRQ(), arc_init_IRQ()
-generic IRQ subsystem glue: arch_do_IRQ()
-basic IRQ chip setup for in-core intc

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
2013-02-11 20:00:37 +05:30
Vineet Gupta
9d42c84f91 ARC: Low level IRQ/Trap/Exception Handling
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Al Viro <viro@ZenIV.linux.org.uk>
2013-02-11 20:00:36 +05:30
Vineet Gupta
5210d1e688 ARC: String library
Hand optimised asm code for ARC700 pipeline.
Originally written/optimized by Joern Rennecke

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Joern Rennecke <joern.rennecke@embecosm.com>
2013-02-11 20:00:35 +05:30
Vineet Gupta
6e35fa2d43 ARC: Spinlock/rwlock/mutex primitives
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-02-11 20:00:35 +05:30
Vineet Gupta
3be80aaef8 ARC: Fundamental ARCH data-types/defines
* L1_CACHE_SHIFT
* PAGE_SIZE, PAGE_OFFSET
* struct pt_regs, struct user_regs_struct
* struct thread_struct, cpu_relax(), task_pt_regs(), start_thread(), ...
* struct thread_info, THREAD_SIZE, INIT_THREAD_INFO(), TIF_*, ...
* BUG()
* ELF_*
* Elf_*

To disallow user-space visibility into some of the core kernel data-types
such as struct pt_regs, #ifdef __KERNEL__ which also makes the UAPI header
spit (further patch in the series) to NOT export it to asm/uapi/ptrace.h

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Jonas Bonn <jonas.bonn@gmail.com>
Cc: Al Viro <viro@ZenIV.linux.org.uk>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-02-11 20:00:34 +05:30
Vineet Gupta
ca15c8ecd5 ARC: Checksum/byteorder/swab routines
TBD: do_csum still needs to be written in asm

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-02-11 20:00:34 +05:30
Vineet Gupta
0a5eae458e ARC: [optim] uaccess __{get,put}_user() optimised
Override asm-generic implementations. We basically gain on 2 fronts

* checks for alignment no longer needed as we are only doing "unit"
  sized copies.

  (Careful observer could argue that While the kernel buffers are aligned,
   the user buffer in theory might not be - however in that case the
   user space is already broken when it tries to deref a hword/word
   straddling word boundary - so we are not making it any worse).

* __copy_{to,from}_user( ) returns bytes that couldn't be copied,
  whereas get_user() returns 0 for success or -EFAULT (not size). Thus
  the code to do leftover bytes calculation can be avoided as well.

The savings were significant: ~17k of code.

bloat-o-meter vmlinux_uaccess_pre vmlinux_uaccess_post
add/remove: 0/4 grow/shrink: 8/118 up/down: 1262/-18758 (-17496)
							^^^^^^^^^
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-02-11 20:00:32 +05:30
Vineet Gupta
43697cb097 ARC: uaccess friends
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-11 20:00:31 +05:30
Vineet Gupta
14e968bad7 ARC: Atomic/bitops/cmpxchg/barriers
This covers the UP / SMP (with no hardware assist for atomic r-m-w) as
well as ARC700 LLOCK/SCOND insns based.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-11 20:00:30 +05:30
Vineet Gupta
ac4c244d4e ARC: irqflags - Interrupt enabling/disabling at in-core intc
ARC700 has an in-core intc which provides 2 priorities (a.k.a.) "levels"
of interrupts (per IRQ) hencforth referred to as L1/L2 interrupts.

CPU flags register STATUS32 has Interrupt Enable bits per level (E1/E2)
to globally enable (or disable) all IRQs at a level. Hence the
implementation of arch_local_irq_{save,restore,enable,disable}( )

The STATUS32 reg can be r/w only using the AUX Interface of ARC, hence
the use of LR/SR instructions. Further, E1/E2 bits in there can only be
updated using the FLAG insn.

The intc supports 32 interrupts - and per IRQ enabling is controlled by
a bit in the AUX_IENABLE register, hence the implmentation of
arch_{,un}mask_irq( ) routines.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
2013-02-11 20:00:30 +05:30
Vineet Gupta
cfdbc2e16e ARC: Build system: Makefiles, Kconfig, Linker script
Arnd in his review pointed out that arch Kconfig organisation has several
deficiencies:

* Build time entries for things which can be runtime extracted from DT
  (e.g. SDRAM size, core clk frequency..)
* Not multi-platform-image-build friendly (choice .. endchoice constructs)
* cpu variants support (750/770) is exclusive.

The first 2 have been fixed in subsequent patches.
Due to the nature of the 750 and 770, it is not possible to build for
both together, w/o special runtime glue code which would hurt
performance.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Sam Ravnborg <sam@ravnborg.org>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
2013-02-11 20:00:25 +05:30
Will Deacon
c0e01d5d8f arm64: compat: use compat_uptr_t type for compat_ucontext.uc_link
struct compat_ucontext * is a 64-bit pointer, so we need to use a
compat_uptr_t instead to avoid declaring a structure incompatible with
what AArch32 userspace expects.

Cc: <stable@vger.kernel.org>
Reported-by: Edmund Grimley-Evans <Edmund.Grimley-Evans@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-02-11 12:39:16 +00:00
Rafael J. Wysocki
17b1639b30 Merge branch 'acpi-lpss'
* acpi-lpss:
  ACPI / platform: create LPSS clocks if Lynxpoint devices are found during scan
  clk: x86: add support for Lynxpoint LPSS clocks
  x86: add support for Intel Low Power Subsystem
  ACPI / platform: fix comment about the platform device name
  ACPI: add support for CSRT table
2013-02-11 13:21:27 +01:00
Rafael J. Wysocki
48694bdb38 Merge branch 'acpica'
* acpica: (56 commits)
  ACPICA: Update version to 20130117
  ACPICA: Update predefined info table for _MLS method
  ACPICA: Remove some extraneous newlines in ACPI_ERROR type calls
  ACPICA: iASL/Disassembler: Add option to ignore NOOP opcodes/operators
  ACPICA: AcpiGetSleepTypeData: Allow \_Sx to return either 1 or 2 integers
  ACPICA: Update ACPICA copyrights to 2013
  ACPICA: Update predefined info table
  ACPICA: Cleanup table handler naming conflicts.
  ACPICA: Source restructuring: split large files into 8 new files.
  ACPICA: Cleanup PM_TIMER_FREQUENCY definition.
  ACPICA: Cleanup ACPI_DEBUG_PRINT macros to fix potential build breakages.
  ACPICA: Update version to 20121220.
  ACPICA: Interpreter: Fix Store() when implicit conversion is not possible.
  ACPICA: Resources: Split interrupt share/wake bits into two fields.
  ACPICA: Resources: Support for ACPI 5 wake bit in ExtendedInterrupt descriptor.
  ACPICA: Interpreter: Add warning if 64-bit constant appears in 32-bit table.
  ACPICA: Update ACPICA initialization messages.
  ACPICA: Namespace: Eliminate dot...dot output during initialization.
  ACPICA: Resource manager: Add support for ACPI 5 wake bit in IRQ descriptor.
  ACPICA: Fix possible memory leak in dispatcher error path.
  ...
2013-02-11 13:20:33 +01:00
Mark Brown
6ee00c164e Merge remote-tracking branch 'asoc/topic/simple-card' into asoc-next 2013-02-11 11:06:43 +00:00
Mark Brown
2944c2f5d5 Merge remote-tracking branch 'asoc/topic/samsung' into asoc-next 2013-02-11 11:06:41 +00:00
Mark Brown
f8843c91c6 Merge remote-tracking branch 'asoc/topic/pxa' into asoc-next 2013-02-11 11:06:39 +00:00
Mark Brown
d0c65252c4 Merge remote-tracking branch 'asoc/topic/fsi' into asoc-next 2013-02-11 11:06:35 +00:00
Stoney Wang
cb214ede76 x86/apic: Work around boot failure on HP ProLiant DL980 G7 Server systems
When a HP ProLiant DL980 G7 Server boots a regular kernel,
there will be intermittent lost interrupts which could
result in a hang or (in extreme cases) data loss.

The reason is that this system only supports x2apic physical
mode, while the kernel boots with a logical-cluster default
setting.

This bug can be worked around by specifying the "x2apic_phys" or
"nox2apic" boot option, but we want to handle this system
without requiring manual workarounds.

The BIOS sets ACPI_FADT_APIC_PHYSICAL in FADT table.
As all apicids are smaller than 255, BIOS need to pass the
control to the OS with xapic mode, according to x2apic-spec,
chapter 2.9.

Current code handle x2apic when BIOS pass with xapic mode
enabled:

When user specifies x2apic_phys, or FADT indicates PHYSICAL:

1. During madt oem check, apic driver is set with xapic logical
   or xapic phys driver at first.

2. enable_IR_x2apic() will enable x2apic_mode.

3. if user specifies x2apic_phys on the boot line, x2apic_phys_probe()
   will install the correct x2apic phys driver and use x2apic phys mode.
   Otherwise it will skip the driver will let x2apic_cluster_probe to
   take over to install x2apic cluster driver (wrong one) even though FADT
   indicates PHYSICAL, because x2apic_phys_probe does not check
   FADT PHYSICAL.

Add checking x2apic_fadt_phys in x2apic_phys_probe() to fix the
problem.

Signed-off-by: Stoney Wang <song-bo.wang@hp.com>
[ updated the changelog and simplified the code ]
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Cc: stable@kernel.org
Link: http://lkml.kernel.org/r/1360263182-16226-1-git-send-email-yinghai@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2013-02-11 11:13:00 +01:00
Shuah Khan
136867f517 x86/kvm: Fix compile warning in kvm_register_steal_time()
Fix the following compile warning in kvm_register_steal_time():

  CC      arch/x86/kernel/kvm.o
  arch/x86/kernel/kvm.c: In function ‘kvm_register_steal_time’: arch/x86/kernel/kvm.c:302:3:
  warning: format ‘%lx’ expects argument of type ‘long unsigned int’, but argument 3 has type ‘phys_addr_t’ [-Wformat]

Introduced via:

  5dfd486c47 x86, kvm: Fix kvm's use of __pa() on percpu areas
  d765653445 x86, mm: Create slow_virt_to_phys()
  f3c4fbb68e x86, mm: Use new pagetable helpers in try_preserve_large_page()
  4cbeb51b86 x86, mm: Pagetable level size/shift/mask helpers
  a25b931684 x86, mm: Make DEBUG_VIRTUAL work earlier in boot

Signed-off-by: Shuah Khan <shuah.khan@hp.com>
Acked-by: Gleb Natapov <gleb@redhat.com>
Cc: Marcelo Tosatti <mtosatti@redhat.com>
Cc: Dave Hansen <dave@linux.vnet.ibm.com>
Cc: Rik van Riel <riel@redhat.com>
Cc: shuahkhan@gmail.com
Cc: avi@redhat.com
Cc: gleb@redhat.com
Cc: mst@redhat.com
Link: http://lkml.kernel.org/r/1360119442.8356.8.camel@lorien2
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2013-02-11 11:04:31 +01:00
Takuya Yoshikawa
7a905b1485 KVM: Remove user_alloc from struct kvm_memory_slot
This field was needed to differentiate memory slots created by the new
API, KVM_SET_USER_MEMORY_REGION, from those by the old equivalent,
KVM_SET_MEMORY_REGION, whose support was dropped long before:

  commit b74a07beed
  KVM: Remove kernel-allocated memory regions

Although we also have private memory slots to which KVM allocates
memory with vm_mmap(), !user_alloc slots in other words, the slot id
should be enough for differentiating them.

Note: corresponding function parameters will be removed later.

Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: Takuya Yoshikawa <yoshikawa_takuya_b1@lab.ntt.co.jp>
Signed-off-by: Gleb Natapov <gleb@redhat.com>
2013-02-11 11:52:00 +02:00
Ingo Molnar
993db4b45f sched, powerpc: Fix sched.h split-up build failure
Fix PowerPC/Cell build fallout from:

  8bd75c77b7 sched/rt: Move rt specific bits into new header file

Reported-by: Michael Ellerman <michael@ellerman.id.au>
Cc: Clark Williams <williams@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Steven Rostedt <rostedt@goodmis.org>
Link: http://lkml.kernel.org/r/20130207094707.7b9f825f@riff.lan
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2013-02-11 10:45:33 +01:00
Yang Zhang
257090f702 KVM: VMX: disable apicv by default
Without Posted Interrupt, current code is broken. Just disable by
default until Posted Interrupt is ready.

Signed-off-by: Yang Zhang <yang.z.zhang@Intel.com>
Signed-off-by: Gleb Natapov <gleb@redhat.com>
2013-02-11 10:51:13 +02:00
Cornelia Huck
79fd50c67f KVM: s390: Fix handling of iscs.
There are two ways to express an interruption subclass:
- As a bitmask, as used in cr6.
- As a number, as used in the I/O interruption word.

Unfortunately, we have treated the I/O interruption word as if it
contained the bitmask as well, which went unnoticed so far as
- (not-yet-released) qemu made the same mistake, and
- Linux guest kernels don't check the isc value in the I/O interruption
  word for subchannel interrupts.

Make sure that we treat the I/O interruption word correctly.

Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Gleb Natapov <gleb@redhat.com>
2013-02-11 10:49:55 +02:00
Paul Walmsley
a5a8c31d9f Merge branches 'sg_aess_reset_devel_3.9' and 'omap4_pm_fixes_a_3.9' into omap4_prcm_devel_a_3.9 2013-02-10 11:27:02 -07:00
Sebastien Guiriec
5cebb23c6c ARM: OMAP4: hwmod data: Enable AESS hwmod device
Enable AESS data in hwmod in order to be able to probe
audio driver.

Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-02-10 11:22:43 -07:00
Sebastien Guiriec
9f0c5996b7 ARM: OMAP4: hwmod data: Update AESS data with memory bank area
Add AESS memory bank data in hwmod in order to provide memory address
information to the driver.

This version also changes the AESS main clock to use a
non-CLKCTRL-based functional clock.  These are being removed from the
clock data, since they should be handled by the IP block integration
code.  Without this change, the kernel crashes during boot.  Thanks to
Tony Lindgren for reporting this during a test merge.

Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com>
[paul@pwsan.com: updated to change the AESS main_clk]
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-02-10 11:22:24 -07:00
Paul Walmsley
c02060d869 ARM: OMAP4+: AESS: enable internal auto-gating during initial setup
Enable the AESS auto-gating control bit during AESS hwmod setup.  This
fixes the following boot warning on OMAP4:

omap_hwmod: aess: _wait_target_disable failed

Without this patch, the AESS IP block does not indicate to the PRCM
that it is idle after it is reset.  This prevents some types of SoC
power management until something sets the auto-gating control bit.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Péter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
2013-02-10 11:22:23 -07:00
Paul Walmsley
6d266f63a1 ARM: OMAP2+: hwmod: add enable_preprogram hook
After setup/enable, some IP blocks need some additional setting to
indicate the PRCM that they are inactive until they are configured.
Some examples on OMAP4 include the AESS and FSUSB IP blocks.

To fix this cleanly, this patch adds another optional function
pointer, enable_preprogram, to the IP block's hwmod data.  The function
that is pointed to is called by the hwmod code immediately after the
IP block is reset.

This version of the patch includes a patch description fix from Felipe.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Péter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Felipe Balbi <balbi@ti.com>
2013-02-10 11:22:22 -07:00
Len Brown
7f81ea7e28 openrisc idle: delete pm_idle
pm_idle() on openrisc was dead code.

Signed-off-by: Len Brown <len.brown@intel.com>
Cc: linux@lists.openrisc.net
Signed-off-by: Jonas Bonn <jonas@southpole.se>
2013-02-10 18:56:14 +01:00
James Hogan
1b3737d4c5 openrisc: remove CONFIG_SYMBOL_PREFIX
Remove the SYMBOL_PREFIX Kconfig symbol as it's empty anyway.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Jonas Bonn <jonas@southpole.se>
Cc: linux@lists.openrisc.net
Cc: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Jonas Bonn <jonas@southpole.se>
2013-02-10 18:55:53 +01:00
Stefan Kristiansson
54bd7c510b openrisc: avoid using function parameter regs in reset vector
The kernel might be invoked through the reset vector, so to
preserve parameters passed to it, temp regs that are not
in the function parameter range needs to be used.

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Jonas Bonn <jonas@southpole.se>
2013-02-10 18:55:46 +01:00
Jonas Bonn
1dd2ad7f2b openrisc: remove unused current_regs
Signed-off-by: Jonas Bonn <jonas@southpole.se>
2013-02-10 18:55:29 +01:00
Shawn Guo
7c1da5854f ARM: dts: add dtsi for imx6q and imx6dl
Add dtsi for imx6q and imx6dl with non-common blocks moved into there.
Major differences between imx6dl and imx6q:

 * Dual vs. Quad cores
 * single vs. dual IPU
 * 128 vs. 256 KB OCRAM
 * imx6q: ECSPI5, OpenVG (GC355), SATA
 * imx6dl: I2C4, PXP, EPDC, LCDIF
 * iomuxc/pads definition

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-02-10 23:25:47 +08:00
Shawn Guo
4bacf2a3fc ARM: dts: rename imx6q.dtsi to imx6qdl.dtsi
i.MX6 Quad and i.MX6 DualLite is similar enough to share one dtsi
file, so rename imx6q.dtsi to imx6qdl.dtsi preparing for the addition
of imx6dl support.

Another member of i.MX6 series i.MX6 SoloLite is different enough
from the other two, so it will stand as a separate dtsi.  That's why
we rename to imx6qdl.dtsi not imx6.dtsi.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-02-10 23:25:47 +08:00
Anson Huang
46743dd662 ARM: dts: i.MX6: Add regulator delay support
For ANATOP LDOs, vddcpu, vddsoc and vddpu
have step time settings in the misc2 register, need
to add necessary step time info for these three LDOs,
then regulator driver can add necessary delay based on
these settings.

offset 0x170:
bit [24-25]: vddcpu
bit [26-27]: vddpu
bit [28-29]: vddsoc

field definition:
0'b00: 64 cycles of 24M clock;
0'b01: 128 cycles of 24M clock;
0'b02: 256 cycles of 24M clock;
0'b03: 512 cycles of 24M clock;

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-02-10 23:25:47 +08:00
Martin Fuzzey
a82b7b9c8b ARM: dts: Add device tree entry for onewire master on i.MX53
Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Evgeniy Polyakov <zbr@ioremap.net>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-02-10 23:25:47 +08:00
Martin Fuzzey
f1550a1ce7 ARM: i.MX53: Add clocks for i.mx53 onewire master.
Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Evgeniy Polyakov <zbr@ioremap.net>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-02-10 23:25:46 +08:00
Shawn Guo
96574a6dc6 ARM: imx: enable imx6q-cpufreq support
Update operating-points per hardware document and add support for
1 GHz and 1.2 GHz frequencies.

400 MHz, 800 MHz and 1 GHz should be supported by all i.MX6Q chips,
while 1.2 GHz support needs to know from OTP fuse bit.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-02-10 23:25:46 +08:00
Laurent Cans
1982d5b6c1 ARM: dts: Add apf51 basic support
Signed-off-by: Laurent Cans <laurent.cans@gmail.com>
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-02-10 23:25:45 +08:00
Peter Chen
a5120e89e7 ARM i.MX6: change mxs usbphy clock usage
This mxs usbphy is only needs to be on after system boots
up, and software never needs to control it anymore.
Meanwhile, usbphy's parent needs to be notified if usb
is suspend or not. So we design below mxs usbphy usage:

- usbphy1_gate and usbphy2_gate:
Their parents are dummy clock, we only needs to enable
it after system boots up.
- usbphy1 and usbphy2
Usage reserved bit for this clock, in that case, the refcount
will be updated, but without hardware changing.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-02-10 23:25:45 +08:00
Fabio Estevam
d6b9c59194 ARM: dts: imx6q: Remove silicon version from SDMA firmware
Remove silicon version from SDMA firmware.

This makes it consistent with other i.MX SoCs firmware names.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-02-10 23:25:44 +08:00
Steffen Trumtrar
be3a568d77 ARM i.MX53: dts: add oftree for MBa53 baseboard
The MBa53 is a baseboard for the TQMA53 embedded module. This enables/adds only
supported devices, i.e. it is not feature complete, because of missing drivers
in mainline linux.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-02-10 23:25:44 +08:00
Sascha Hauer
b17d5169d5 ARM i.MX53: add dts for the TQ tqma53 module
The tqma53 is an embedded module that has some features on board (e.g. emmc),
but mostly just provides access to them on its interface.
Going along with the imx53.dtsi, the tqma53.dtsi specifies the existing
devices and their pinctrl for this module. All devices that are not on the
module are disabled by default and need to be enabled in a baseboard DT.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-02-10 23:25:44 +08:00
Steffen Trumtrar
11ab21e90a ARM: dts: imx53: pinctrl update
Add pinctrl for cspi, csi.
Add new pingroups for can1 and uart3.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-02-10 23:25:44 +08:00
Liu Ying
67eb7c0bc8 ARM i.MX51 babbage: Add keypad support
The keypad is on the accessory board of i.MX51 babbage
main board and is driven by Keypad Port(KPP) in SoC.
The keymap is the same to i.MX25 3stack platform as
the accessory board schematic tells that it is designed
in this way.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-02-10 23:25:43 +08:00
Liu Ying
6012555c24 ARM: dts: imx: Add imx51 KPP entry
1) Add KPP device node entry.
2) Add one KPP pinctrl entry.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-02-10 23:25:43 +08:00
Fabio Estevam
152fab67e4 ARM: dts: imx25-karo-tx25: Put status entry in the end
Just to keep consistency with other dts files, place 'status' entry as the last
one.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-02-10 23:25:43 +08:00
Fabio Estevam
860c06f6c0 ARM: mx25pdk: Add device tree support
Add basic device tree support for mx25pdk board.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-02-10 23:25:42 +08:00
Shawn Guo
be4ccfcec3 ARM: dts: imx: use nodes label in board dts
Following omap3-evm.dts way, it changes all imx dts files to use label
in board dts to refer to nodes defined by soc dtsi.  Thus, the board
dts files become easier to read and edit with the least indentation
levels.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-02-10 23:25:42 +08:00
Shawn Guo
8ba472357a ARM: dts: add missing imx dtb targets
Add missing imx dtb targets, so that make dtbs can cover all imx dtbs.
It's pretty useful for testing dts changes.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-02-10 23:25:42 +08:00
Fabio Estevam
9c9651cd74 ARM: boot: dts: Add an entry for imx27-pdk.dtb
Add an entry for imx27-pdk.dtb, so that it can be generated by default.

Also, add an entry into Documentation/devicetree/bindings/arm/fsl.txt.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-02-10 23:25:41 +08:00
Fabio Estevam
991eb5852b ARM: dts: imx27-3ds: Rename it to imx27-pdk
imx27-pdk is the name found on Freescale website, so use it instead of 3ds.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-02-10 23:25:41 +08:00
Shawn Guo
d441667c78 imx fixes for 3.8, take 4
- It fixes fec ptp clock pointer in device tree source.
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Merge tag 'imx-fixes-3.8-4' into imx/dt
2013-02-10 23:23:47 +08:00
Lee Jones
c3f78f0763 ARM: ux500: use real AB8500 IRQ numbers instead of virtual ones
Any devices wishing to use the AB8500's GPIO IRQs were forced to
request virtual IRQs from the gpio-ab8500 driver. Now that
responsibility has been passed back to the AB8500 core driver,
devices can request real IRQ numbers instead. This patch removes
any traces of the old virtual IRQ conversion handlers, which will
force any drivers requesting IRQs to use real IRQS.

Cc: arm@kernel.org
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-10 15:50:40 +01:00
Lee Jones
710a03e934 ARM: ux500: remove irq_base property from platform_data
AB8500 GPIO no longer handles its GPIO IRQs. Instead, the AB8500
core driver has taken back the responsibility. Prior to this
happening, the AB8500 GPIO driver provided a set of virtual IRQs
which were used as a pass-through. These virtual IRQs had a base
of MOP500_AB8500_VIR_GPIO_IRQ_BASE, which was passed though pdata.
We don't need to do this anymore, so we're pulling out the
property from the structure.

Cc: arm@kernel.org
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-10 15:49:43 +01:00
Len Brown
27be457000 x86 idle: remove 32-bit-only "no-hlt" parameter, hlt_works_ok flag
Remove 32-bit x86 a cmdline param "no-hlt",
and the cpuinfo_x86.hlt_works_ok that it sets.

If a user wants to avoid HLT, then "idle=poll"
is much more useful, as it avoids invocation of HLT
in idle, while "no-hlt" failed to do so.

Indeed, hlt_works_ok was consulted in only 3 places.

First, in /proc/cpuinfo where "hlt_bug yes"
would be printed if and only if the user booted
the system with "no-hlt" -- as there was no other code
to set that flag.

Second, check_hlt() would not invoke halt() if "no-hlt"
were on the cmdline.

Third, it was consulted in stop_this_cpu(), which is invoked
by native_machine_halt()/reboot_interrupt()/smp_stop_nmi_callback() --
all cases where the machine is being shutdown/reset.
The flag was not consulted in the more frequently invoked
play_dead()/hlt_play_dead() used in processor offline and suspend.

Since Linux-3.0 there has been a run-time notice upon "no-hlt" invocations
indicating that it would be removed in 2012.

Signed-off-by: Len Brown <len.brown@intel.com>
Cc: x86@kernel.org
2013-02-10 03:32:22 -05:00
Len Brown
69fb3676df x86 idle: remove mwait_idle() and "idle=mwait" cmdline param
mwait_idle() is a C1-only idle loop intended to be more efficient
than HLT, starting on Pentium-4 HT-enabled processors.

But mwait_idle() has been replaced by the more general
mwait_idle_with_hints(), which handles both C1 and deeper C-states.
ACPI processor_idle and intel_idle use only mwait_idle_with_hints(),
and no longer use mwait_idle().

Here we simplify the x86 native idle code by removing mwait_idle(),
and the "idle=mwait" bootparam used to invoke it.

Since Linux 3.0 there has been a boot-time warning when "idle=mwait"
was invoked saying it would be removed in 2012.  This removal
was also noted in the (now removed:-) feature-removal-schedule.txt.

After this change, kernels configured with
(CONFIG_ACPI=n && CONFIG_INTEL_IDLE=n) when run on hardware
that supports MWAIT will simply use HLT.  If MWAIT is desired
on those systems, cpuidle and the cpuidle drivers above
can be enabled.

Signed-off-by: Len Brown <len.brown@intel.com>
Cc: x86@kernel.org
2013-02-10 03:03:41 -05:00
Len Brown
6a377ddc4e xen idle: make xen-specific macro xen-specific
This macro is only invoked by Xen,
so make its definition specific to Xen.

> set_pm_idle_to_default()
< xen_set_default_idle()

Signed-off-by: Len Brown <len.brown@intel.com>
Cc: xen-devel@lists.xensource.com
2013-02-10 01:06:34 -05:00
Olof Johansson
893db07f50 highbank fixes for 3.8
-Compile fix for !SMP
 -More cpu cluster id related fixes
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Merge tag 'highbank-fixes-for-3.8' of git://sources.calxeda.com/kernel/linux into fixes

From Rob Herring:
highbank fixes for 3.8

-Compile fix for !SMP
-More cpu cluster id related fixes

* tag 'highbank-fixes-for-3.8' of git://sources.calxeda.com/kernel/linux:
  ARM: highbank: mask cluster id from cpu_logical_map
  ARM: scu: mask cluster id from cpu_logical_map
  ARM: scu: add empty scu_enable for !CONFIG_SMP
2013-02-09 20:55:03 -08:00
Tony Lindgren
dad2d9e666 ARM: OMAP2+: Make sure files with omap initcalls include soc.h
Looks like there are few more places that I missed that can cause
compiler warnings. After grepping for omap initcall, all files
needing soc.h should now have it.

Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-02-09 20:26:31 -08:00
André Hentschel
59dc7a9cc2 ARM: OMAP2+: Include soc.h to drm.c to fix compiling
I needed this when compiling for pandaboard.

The reason this is needed is that we are now using
omap_initcalls to keep them multiplatform safe.

Signed-off-by: André Hentschel <nerv@dawncrow.de>
[tony@atomide.com: updated comments]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-02-09 20:26:27 -08:00
Olof Johansson
dd8b5c8dac mxs device tree changes for 3.9
- Mostly cfa100xx related device tree source updates
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Merge tag 'mxs-dt-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt

From Shawn Guo:
mxs device tree changes for 3.9

 - Mostly cfa100xx related device tree source updates

* tag 'mxs-dt-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6:
  ARM: mxs: dts: Add rotary encoder to the CFA-10049
  ARM: mxs: dts: Add gpio-keys for the rotary to the CFA-10049
  ARM: dts: mxs: Add the LCD to the 10049 board
  ARM: dts: mxs: Add muxing options for the third PWM
  ARM: dts: cfa10049: Change the SPI3 bus to spi-gpio
  ARM: mxs: dt: Add Crystalfontz CFA-10037 device tree support
  ARM: mxs: Enable touchscreen on m28evk
  ARM: dts: cfa10049: Add PCA9555 GPIO expander to the device tree
2013-02-09 18:29:33 -08:00
Olof Johansson
877cd95316 mxs soc changes for 3.9
- A couple of optimization on timer
  - Some updates on mxs_defconfig
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Merge tag 'mxs-soc-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc

From Shawn Guo:
mxs soc changes for 3.9

 - A couple of optimization on timer
 - Some updates on mxs_defconfig

* tag 'mxs-soc-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6:
  ARM: mxs_defconfig: Select CONFIG_DEVTMPFS_MOUNT
  ARM: mxs: decrease mxs_clockevent_device.min_delta_ns to 2 clock cycles
  ARM: mxs: use apbx bus clock to drive the timers on timrotv2
  ARM: mxs: Update mxs_defconfig
2013-02-09 18:27:28 -08:00
Olof Johansson
f58cf70ed9 Merge branch 'tegra/t114' into next/soc
Add a couple of fixes sent via email (via Stephen/Hiroshi).

* tegra/t114:
  ARM: tegra: sort Kconfig selects for Tegra114
  ARM: tegra: enable ARCH_REQUIRE_GPIOLIB for Tegra114
  ARM: tegra: Fix build error w/ ARCH_TEGRA_114_SOC w/o ARCH_TEGRA_3x_SOC

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-02-09 17:53:02 -08:00
Stephen Warren
1d7e5c2c81 ARM: tegra: sort Kconfig selects for Tegra114
The Kconfig options selected by ARCH_TEGRA_*_SOC were recently sorted.
Update the newly added ARCH_TEGRA_114_SOC's select statements to match.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-02-09 17:52:07 -08:00
Stephen Warren
23c8c4b4e0 ARM: tegra: enable ARCH_REQUIRE_GPIOLIB for Tegra114
CONFIG_ARCH_TEGRA_114_SOC doesn't currently enable gpiolib, which causes
numerous build problems building a Tegra kernel with only Tegra114
enabled, and not Tegra20 or Tegra30. Enable ARCH_REQUIRE_GPIOLIB to
solve this. However, all Tegra will use gpiolib, so select this option
from ARCH_TEGRA rather than each individual ARCH_TEGRA_*_SOC, to
prevent this problem for any future chips.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-02-09 17:52:03 -08:00
Olof Johansson
d2ffb918f7 ARM: tegra: Fix build error w/ ARCH_TEGRA_114_SOC w/o ARCH_TEGRA_3x_SOC
This patch fixes the build error when ARCH_TEGRA_114_SOC is enabled
and ARCH_TEGRA_3x_SOC is disabled.

This provides Tegra114 with its own tegra114_init_early() instead of
making use of tegra30_init_early() so that T114 build doesn't depend
on T3x anymore.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-02-09 17:46:51 -08:00
Olof Johansson
93ce285503 Second round of DT updates for DaVinci.
This pull request adds support for I2C0 and watchdog timer
 for DA850 EVM booting using device tree. It also enables
 machine reboot when using device tree.
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Merge tag 'davinci-for-v3.9/dt-2' of git://gitorious.org/linux-davinci/linux-davinci into next/dt

From Sekhar Nori:
Second round of DT updates for DaVinci.

This pull request adds support for I2C0 and watchdog timer
for DA850 EVM booting using device tree. It also enables
machine reboot when using device tree.

* tag 'davinci-for-v3.9/dt-2' of git://gitorious.org/linux-davinci/linux-davinci:
  ARM: davinci: da850 DT: add support for machine reboot
  ARM: davinci: da850: add wdt DT node
  ARM: davinci: da850: add DT node for I2C0
2013-02-09 17:27:13 -08:00
Olof Johansson
13c5d51953 Update to DT files for AT91:
- adding the watchdog to Animeo IP board
 - some more DT support for at91rm9200 peripherals
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Merge tag 'at91-dt' of git://github.com/at91linux/linux-at91 into next/dt

From Nicolas Ferre:
Update to DT files for AT91:
- adding the watchdog to Animeo IP board
- some more DT support for at91rm9200 peripherals

* tag 'at91-dt' of git://github.com/at91linux/linux-at91:
  ARM: at91: add EMAC bindings to RM9200 DT
  ARM: at91: add SSC bindings to RM9200 DT
  ARM: at91: add MMC bindings to RM9200 DT
  ARM: at91: Animeo IP: enable watchdog support

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-02-09 17:03:16 -08:00
Olof Johansson
78d9b8055b OMAP TWL updates from Peter Ujfalusi <peter.ujfalusi@ti.com>:
Update for audio support via omap-twl4030 and pwm updates in board level,
 and zoom-peripherals update to not request the TWL GPIO7.
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Merge tag 'omap-for-v3.9/twl-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/boards

From Tony Lidgren:
OMAP TWL updates from Peter Ujfalusi <peter.ujfalusi@ti.com>:

Update for audio support via omap-twl4030 and pwm updates in board level,
and zoom-peripherals update to not request the TWL GPIO7.

* tag 'omap-for-v3.9/twl-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: Fix twl section warnings related to omap_twl4030_audio_init
  ARM: board-zoom: Do not request LCD panel enable GPIO from twl4030
  ARM: OMAP: omap3beagle: Use the pwm_leds driver to control the PMU_STAT led
  ARM: OMAP: board-4430sdp: Proper support for TWL6030 PWM LED/Backlight
  ARM: OMAP: sdp3430: Audio support via the common omap-twl4030 machine driver
  ARM: OMAP: zoom: Audio support via the common omap-twl4030 machine driver
  ARM: OMAP2+: twl-common: Allow boards to customize the twl4030 audio setup
  ARM: OMAP2+: twl-common: Add default twl4030 audio configuration
  ARM: OMAP: zoom: Zoom2 does not have extmute functionality
  ARM: OMAP: 3430sdp: Enable extmute functionality for audio
2013-02-09 16:55:44 -08:00
Olof Johansson
e2efc25ac2 Fourth round of Renesas ARM-based SoC changes for v3.9
Register ARM architected timer.
 
 This is preparatory work by Magnus Damm for SoC(s) that use
 the ARM architected timer.
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Merge tag 'renesas-soc4-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

From Simon Horman:
Fourth round of Renesas ARM-based SoC changes for v3.9

Register ARM architected timer.

This is preparatory work by Magnus Damm for SoC(s) that use
the ARM architected timer.

* tag 'renesas-soc4-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: Register ARM architected timer
2013-02-09 16:49:29 -08:00
Olof Johansson
2aecd7dd2b Little AT91 cleanup: only remove one deprecated board.
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Merge tag 'at91-cleanup' of git://github.com/at91linux/linux-at91 into next/cleanup

From Nicolas Ferre:
Little AT91 cleanup: only remove one deprecated board.

* tag 'at91-cleanup' of git://github.com/at91linux/linux-at91:
  ARM: at91: remove NEOCORE 926 board

Signed-off-by: Olof Johansson <olof@lixom.net>

Modify/remove conflict in arch/arm/mach-at91/board-neocore926.c
2013-02-09 16:41:46 -08:00
Olof Johansson
94c16ea6ea Linux 3.8-rc6
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Merge tag 'v3.8-rc6' into next/cleanup

Linux 3.8-rc6
2013-02-09 16:41:37 -08:00
Will Deacon
ab2a724a2e ARM: integrator: ensure ap_syscon_base is initialised when !CONFIG_MMU
When running on Integrator/AP using atags, ap_syscon_base is initialised
in ->map_io, which isn't called for !MMU platforms.

Instead, initialise the pointer in ->machine_init, as we do when booting
with device-tree.

Cc: stable@vger.kernel.org
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-02-09 16:28:47 -08:00
Kumar, Anil
19c7c0d81a ARM: davinci: da850 DT: add support for machine reboot
Update the da8xx_restart() function to support machine reboot
when booting using DT. Have the function search for the watchdog
platform device instead of always using "da8xx_wdt_device" which
is never registered in DT case.

While at it, also make da8xx_wdt_device static since there is no need
for it to be globally visible.

Tested machine reboot with both DT and non-DT boot on DA850 EVM.

Signed-off-by: Kumar, Anil <anilkumar.v@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-02-09 22:38:26 +05:30
Kumar, Anil
518f97dbb8 ARM: davinci: da850: add wdt DT node
Add da850 wdt DT node.
Add OF_DEV_AUXDATA for wdt driver to use wdt clock.

Signed-off-by: Kumar, Anil <anilkumar.v@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-02-09 22:38:26 +05:30
Vishwanathrao Badarkhe, Manish
01729ccf19 ARM: davinci: da850: add DT node for I2C0
Add I2C0 device tree and pin muxing information to da850-evm.
Also, add OF_DEV_AUXDATA for I2C0 controller driver in da850
board dt file to use I2C0 clock.
Verified i2c0 node gets created in sys class interface as
"/sys/class/i2c-dev/i2c-0/subsystem/i2c-0".

nsekhar@ti.com: tested using i2cdetect and i2cdump.

Signed-off-by: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-02-09 22:37:43 +05:30
Geert Uytterhoeven
561839598e m68k: Sort out !CONFIG_MMU_SUN3 vs. CONFIG_HAS_DMA
In two places, we check !CONFIG_MMU_SUN3 while we should check
CONFIG_HAS_DMA instead.
While fixing this, the check in <asm/dma-mapping.h> became redundant
(<linux/dma-mapping.h> already handles this case), so just remove it.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2013-02-09 14:23:36 +01:00
Len Brown
e022e7eb90 intel_idle: remove assumption of one C-state per MWAIT flag
Remove the assumption that cstate_tables are
indexed by MWAIT flag values.  Each entry
identifies itself via its own flags value.
This change is needed to support multiple states
that share the same MWAIT flags.

Note that this can have an effect on what state is described
by 'N' on cmdline intel_idle.max_cstate=N on some systems.

intel_idle.max_cstate=0 still disables the driver
intel_idle.max_cstate=1 still results in just C1(E)
However, "place holders" in the sparse C-state name-space
(eg. Atom) have been removed.

Signed-off-by: Len Brown <len.brown@intel.com>
2013-02-08 19:29:16 -05:00
Len Brown
137ecc779c intel_idle: remove use and definition of MWAIT_MAX_NUM_CSTATES
Cosmetic only.

Replace use of MWAIT_MAX_NUM_CSTATES with CPUIDLE_STATE_MAX.
They are both 8, so this patch has no functional change.

The reason to change is that intel_idle will soon be able
to export more than the 8 "major" states supported by MWAIT.
When we hit that limit, it is important to know
where the limit comes from.

Signed-off-by: Len Brown <len.brown@intel.com>
2013-02-08 19:28:10 -05:00
Len Brown
6792041834 tools/power turbostat: decode MSR_IA32_POWER_CTL
When verbose is enabled, print the C1E-Enable
bit in MSR_IA32_POWER_CTL.

also delete some redundant tests on the verbose variable.

Signed-off-by: Len Brown <len.brown@intel.com>
2013-02-08 19:26:16 -05:00
Daniel Lezcano
748f117721 davinci: cpuidle - remove useless initialization
The device->state_count is initialized in the cpuidle_register_device
function.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2013-02-08 18:31:16 -05:00
Daniel Lezcano
36ce8d4f5f davinci: cpuidle - remove the ops
With one function handling the idle state and a single variable,
the usage of the davinci_ops is overkill.

This patch removes these ops and simplify the code.

Furthermore, the 'driver_data' field is no longer used, we have
1 of the 3 remaining user of this field removed.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2013-02-08 18:31:16 -05:00
Daniel Lezcano
8d60143a23 davinci: cpuidle - move code to prevent forward declaration
The patch is mindless, it just moves the idle function below in the file
in order to prevent forward declaration in the next patch.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2013-02-08 18:31:16 -05:00
Daniel Lezcano
5af4a21c6e Replace the flag by a simple global boolean in the cpuidle.c.
That will allow to cleanup the rest of the code right after,
because the ops won't make sense.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2013-02-08 18:31:16 -05:00
Thomas Gleixner
d6d3c4e656 OF: convert devtree lock from rw_lock to raw spinlock
With the locking cleanup in place (from "OF: Fixup resursive
locking code paths"), we can now do the conversion from the
rw_lock to a raw spinlock as required for preempt-rt.

The previous cleanup and this conversion were originally
separate since they predated when mainline got raw spinlock (in
commit c2f21ce2e3 "locking: Implement new raw_spinlock").

So, at that point in time, the cleanup was considered plausible
for mainline, but not this conversion.  In any case, we've kept
them separate as it makes for easier review and better bisection.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
[PG: taken from preempt-rt, update subject & add a commit log]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-02-08 17:02:40 -06:00
David S. Miller
fd5023111c Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Synchronize with 'net' in order to sort out some l2tp, wireless, and
ipv6 GRE fixes that will be built on top of in 'net-next'.

Signed-off-by: David S. Miller <davem@davemloft.net>
2013-02-08 18:02:14 -05:00
Alexey Galakhov
f0cdbdd6d8 ARM: S5PV210: Fix early uart output in fifo mode
Enabling UART FIFO in bootloader caused the kernel infinite
loop on S5PV210 due to uninitialized fifo_max and fifo_mask global
variables. This patch adds the correct initialization.

Signed-off-by: Alexey Galakhov <agalakhov@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-02-08 13:44:43 -08:00
Alexander Shiyan
1a4c2a1974 ARM: S3C24XX: Fix compile breakage for SMDK2410
Symbol S3C_DEV_USB_HOST should be defined to avoid this problem.

  LINK    vmlinux
  LD      vmlinux.o
  MODPOST vmlinux.o
WARNING: modpost: Found 2 section mismatch(es).
To see full details build your kernel with:
'make CONFIG_DEBUG_SECTION_MISMATCH=y'
  GEN     .version
  CHK     include/generated/compile.h
  UPD     include/generated/compile.h
  CC      init/version.o
  LD      init/built-in.o
arch/arm/mach-s3c24xx/built-in.o:(.init.data+0x660): undefined reference to `s3c_device_ohci'
make: *** [vmlinux] Error 1

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-02-08 13:41:36 -08:00
Linus Torvalds
3992313488 Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm
Pull ARM fixes from Russell King:
 "I was going to hold these off until v3.8 was out, and send them with a
  stable tag, but as everyone else is pushing much bigger fixes which
  Linus is accepting, let's save people from the hastle of having to
  patch v3.8 back into working or use a stable kernel.

  Looking at the diffstat, this really is high value for its size; this
  is miniscule compared to how the -rc6 to tip diffstat currently looks.

  So, four patches in this set:
   - Punit Agrawal reports that the kernel no longer boots on MPCore due
     to a new assumption made in the GIC code which isn't true of
     earlier GIC designs.  This is the biggest change in this set.
   - Punit's boot log also revealed a bunch of WARN_ON() dumps caused by
     the DT-ification of the GIC support without fixing up non-DT
     Realview - which now sees a greater number of interrupts than it
     did before.
   - A fix for the DMA coherent code from Marek which uses the wrong
     check for atomic allocations; this can result in spinlock lockups
     or other nasty effects.
   - A fix from Will, which will affect all Android based platforms if
     not applied (which use the 2G:2G VM split) - this causes
     particularly 'make' to misbehave unless this bug is fixed."

* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
  ARM: 7641/1: memory: fix broken mmap by ensuring TASK_UNMAPPED_BASE is aligned
  ARM: DMA mapping: fix bad atomic test
  ARM: realview: ensure that we have sufficient IRQs available
  ARM: GIC: fix GIC cpumask initialization
2013-02-09 08:01:18 +11:00
Heiko Stuebner
083c8e28e2 ARM: S3C24XX: add missing platform_device.h include for osiris
The missing include led to a implcit declaration warning:

In file included from arch/arm/mach-s3c24xx/mach-osiris.c:34:0:
include/linux/platform_data/i2c-s3c2410.h:37:26: warning: 'struct platform_device' declared inside parameter list [enabled by default]
include/linux/platform_data/i2c-s3c2410.h:37:26: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default]
include/linux/platform_data/i2c-s3c2410.h:66:38: warning: 'struct platform_device' declared inside parameter list [enabled by default]
include/linux/platform_data/i2c-s3c2410.h:67:38: warning: 'struct platform_device' declared inside parameter list [enabled by default]
include/linux/platform_data/i2c-s3c2410.h:68:38: warning: 'struct platform_device' declared inside parameter list [enabled by default]
include/linux/platform_data/i2c-s3c2410.h:69:38: warning: 'struct platform_device' declared inside parameter list [enabled by default]
include/linux/platform_data/i2c-s3c2410.h:70:38: warning: 'struct platform_device' declared inside parameter list [enabled by default]
include/linux/platform_data/i2c-s3c2410.h:71:38: warning: 'struct platform_device' declared inside parameter list [enabled by default]
include/linux/platform_data/i2c-s3c2410.h:72:38: warning: 'struct platform_device' declared inside parameter list [enabled by default]
include/linux/platform_data/i2c-s3c2410.h:73:38: warning: 'struct platform_device' declared inside parameter list [enabled by default]

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-02-08 11:13:16 -08:00
Heiko Stuebner
7eae354fcd ARM: S3C24XX: let S3C2412_PM select S3C2412_PM_SLEEP
The code to enter sleep is used by both the s3c2412 and s3c2416 and
was thus factored out into an extra config option.

But it seems it was forgotten to add the appropriate select to the
s3c2412 pm option, resulting in breakage when only compiling s3c2412
support.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-02-08 11:13:15 -08:00
Paul Walmsley
b5596a8941 Merge branch 'clock_misc_devel_a_3.9', remote-tracking branch 'remotes/pinchart/omap3isp/clock' into clock_devel_a_3.9 2013-02-08 12:00:39 -07:00
Rajendra Nayak
d0758237ee ARM: OMAP4: clock data: Add missing clkdm association for dpll_usb
dpll_usb needs the clkdm association so the clkdm can be
turned on before a relock. All other dplls for omap4 belong
to the ALWON (always on) domain.

The association was present as part of the older data file
(clock44xx_data.c) but looks like got accidently dropped with
the common clk convertion.

More details of the patch which fixed this up in the older
data file can be dound here..
http://www.spinics.net/lists/linux-omap/msg63076.html

Adding the .clkdm_name as part of the clk_hw_omap struct also
means a new .init needs to be part of the clk_ops for dpll_usb
to initialise the clkdm.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-02-08 11:47:24 -07:00
Chris Metcalf
570fd50153 tile: tag some code with #ifdef CONFIG_COMPAT
This allows us to disable COMPAT mode without a link error.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2013-02-08 13:20:43 -05:00
Chris Metcalf
f456da5e13 tile: fix memcpy_*io functions for allnoconfig
On tilepro without CONFIG_PCI, we can't provide inlines of these
functions, as we don't have readl/writel.

In addition, fix memset_io() signature to take a volatile void *.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2013-02-08 13:20:40 -05:00
Chris Metcalf
7c63e1ee0a tile: export a handful of symbols appropriately
This was shown up by running with "allmodconfig".  I used
EXPORT_SYMBOL() to match existing conventions in files that
were already exporting symbols, or that were exported that way
by other architectures, and otherwise EXPORT_SYMBOL_GPL().

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2013-02-08 13:20:36 -05:00
Oleg Nesterov
74e59dfc6b uprobes: Change handle_swbp() to expose bp_vaddr to handler_chain()
Change handle_swbp() to set regs->ip = bp_vaddr in advance, this is
what consumer->handler() needs but uprobe_get_swbp_addr() is not
exported.

This also simplifies the code and makes it more consistent across
the supported architectures. handle_swbp() becomes the only caller
of uprobe_get_swbp_addr().

Signed-off-by: Oleg Nesterov <oleg@redhat.com>
Acked-by: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
2013-02-08 17:47:11 +01:00
Oleg Nesterov
cf31ec3f7f uprobes/x86: Change __skip_sstep() to actually skip the whole insn
__skip_sstep() doesn't update regs->ip. Currently this is correct
but only "by accident" and it doesn't skip the whole insn. Change
it to advance ->ip by the length of the detected 0x66*0x90 sequence.

Signed-off-by: Oleg Nesterov <oleg@redhat.com>
Acked-by: Srikar Dronamraju <srikar@linux.vnet.ibm.com>
2013-02-08 17:47:11 +01:00
Santosh Shilimkar
cd19010c03 ARM: OMAP2+: PM: Fix the dt return condition in pm_late_init()
Commit 1416408d {ARM: OMAP2+: PM: share some suspend-related functions
across OMAP2, 3, 4} moved suspend code to common place but now with
that change, for DT build on OMAP4, suspend hooks are not getting
registered which results in no suspend support.

The DT return condition is limited to PMIC and smartreflex
initialization and hence restrict it so that suspend ops gets
registered.

Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-02-08 09:43:04 -07:00
Nicolas Ferre
b65adbec2d ARM: at91: remove NEOCORE 926 board
The board is not available anymore and it seems its use
is very limited.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Alexandre Belloni <abelloni@adeneo-embedded.com>
2013-02-08 16:25:20 +01:00
Hebbar Gururaja
169c82a294 ARM: OMAP2: am33xx-hwmod: Fix "register offset NULL check" bug
am33xx_cm_wait_module_ready() checks if register offset is NULL.

int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs)
{
	int i = 0;

	if (!clkctrl_offs)
		return 0;

In case of AM33xx, CLKCTRL register offset for different clock domains
are not uniformly placed. An example of this would be the RTC clock
domain with CLKCTRL offset at 0x00.
In such cases the module ready check is skipped which leads to a data
abort during boot-up when RTC registers is accessed.

Remove this check here to avoid checking module readiness for modules
with clkctrl register offset at 0x00.

Koen Kooi notes that this patch fixes a crash on boot with
CONFIG_RTC_DRV_OMAP=y with v3.8-rc5.

Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
Cc: Koen Kooi <koen@dominion.thruhere.net>
[paul@pwsan.com: noted Koen's test in the patch description]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-02-08 08:21:13 -07:00
Hebbar Gururaja
092bda6277 ARM: OMAP2+: AM33xx: hwmod: add missing HWMOD_NO_IDLEST flags
struct omap_hwmod records belonging to wkup m3 domain is missing
HWMOD_NO_IDLEST flags; add them.

This patch is a prerequisite for a subsequent patch, 'ARM: OMAP2:
am33xx-hwmod: Fix "register offset NULL check" bug'.  That patch would
otherwise attempt to read from reserved bits.

Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
[paul@pwsan.com: add some more explanation in the patch description]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-02-08 08:21:10 -07:00
Philip Avinash
9652d19afc ARM: OMAP: AM33xx hwmod: Add parent-child relationship for PWM subsystem
As part of PWM subsystem integration, PWM subsystem are sharing
resources like clock across submodules (ECAP, EQEP & EHRPWM). To handle
resource sharing & IP integration  rework on parent child relation
between PWMSS and ECAP, EQEP & EHRPWM child devices to support runtime PM.

Signed-off-by: Philip Avinash <avinashphilip@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-02-08 08:10:36 -07:00
Philip Avinash
bee76659e2 ARM: OMAP: AM33xx hwmod: Corrects PWM subsystem HWMOD entries
EQEP IP block integration data is not present in HWMOD data. Also
address ranges specified for EACP & EHRPWM are not correct & HWMOD
flags of ADDR_TYPE_RT are added to PWM subsystem register address
space. This patch:
1. Corrects register address mapping for ECAP & EHRPWM
2. Removes  HWMOD flags in PWM submodule register address space.
3. Adds EQEP HWMOD entries.

Signed-off-by: Philip Avinash <avinashphilip@ti.com>
[paul@pwsan.com: tweaked patch description]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-02-08 07:56:48 -07:00
Vaibhav Bedia
f6575c90f6 ARM: DTS: AM33XX: Add nodes for OCMC RAM and WKUP-M3
Since AM33XX supports only DT-boot, this is needed
for the appropriate device nodes to be created.

Note: OCMC RAM is part of the PER power domain and supports
retention. The assembly code for low power entry/exit will
run from OCMC RAM. To ensure that the OMAP PM code does not
attempt to disable the clock to OCMC RAM as part of the
suspend process add the no_idle_on_suspend flag.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-02-08 07:26:15 -07:00
Vaibhav Bedia
3c06f1b8c3 ARM: OMAP2+: AM33XX: Update the hardreset API
WKUP-M3 has a reset status bit (RM_WKUP_STST.WKUP_M3_LRST)
Update the hardreset API to ensure that the reset line properly
deasserted.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-02-08 07:25:28 -07:00
Vaibhav Bedia
3077fe69d7 ARM: OMAP2+: AM33XX: hwmod: Update the WKUP-M3 hwmod with reset status bit
WKUP-M3 has a reset status bit (RM_WKUP_STST.WKUP_M3_LRST)
Update the WKUP-M3 hwmod data to reflect the same.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-02-08 07:25:16 -07:00
Vaibhav Bedia
f13966608f ARM: OMAP2+: AM33XX: hwmod: Fixup cpgmac0 hwmod entry
The current HWMOD code expects the memory region with
the IP's SYSCONFIG register to be marked with ADDR_TYPE_RT
flag.

CPGMAC0 hwmod entry specifies two memory regions and marks
both with the flag ADDR_TYPE_RT although only the 2nd region
has the SYSCONFIG register. This leads to the HWMOD code
accessing the wrong memory address for idle and standby
operations. Fix this by removing the ADDR_TYPE_RT flag from
the 1st memory region in CPGMAC0 hwmod entry.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-02-08 07:25:04 -07:00
Vaibhav Bedia
0bfbbded8d ARM: OMAP2+: AM33XX: hwmod: Update TPTC0 hwmod with the right flags
Third Party Transfer Controller (TPTC0) needs to be idled and
put to standby under SW control. Add the appropriate flags in
the TPTC0 hwmod entry.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-02-08 07:24:52 -07:00
Vaibhav Bedia
ca903b6f98 ARM: OMAP2+: AM33XX: hwmod: Register OCMC RAM hwmod
OCMC RAM lies in the PER power domain and this memory
support retention.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-02-08 07:24:42 -07:00
Vaibhav Bedia
1a7cb4d9c3 ARM: OMAP2+: AM33XX: CM/PRM: Use __ASSEMBLER__ macros in header files
This is necessary to ensure that macros declared here can
be reused from assembly files.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-02-08 07:24:30 -07:00
Vaibhav Bedia
941a98ae29 ARM: OMAP2+: AM33XX: CM: Get rid of unnecessary header inclusions
cm33xx.h unnecessarily includes a lot of header files.
Get rid of these and directly include "iomap.h" which
is needed to keep things compiling.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-02-08 07:12:15 -07:00
Linus Walleij
7ac63ac61d Merge branch 'allwinner-sunxi' into devel 2013-02-08 14:26:49 +01:00
Will Deacon
79d1f5c9ac ARM: 7641/1: memory: fix broken mmap by ensuring TASK_UNMAPPED_BASE is aligned
We have received multiple reports of mmap failures when running with a
2:2 vm split. These manifest as either -EINVAL with a non page-aligned
address (ending 0xaaa) or a SEGV, depending on the application. The
issue is commonly observed in children of make, which appears to use
bottom-up mmap (assumedly because it changes the stack rlimit).

Further investigation reveals that this regression was triggered by
394ef6403a ("mm: use vm_unmapped_area() on arm architecture"), whereby
TASK_UNMAPPED_BASE is no longer page-aligned for bottom-up mmap, causing
get_unmapped_area to choke on misaligned addressed.

This patch fixes the problem by defining TASK_UNMAPPED_BASE in terms of
TASK_SIZE and explicitly aligns the result to 16M, matching the other
end of the heap.

Acked-by: Nicolas Pitre <nico@linaro.org>
Reported-by: Steve Capper <steve.capper@arm.com>
Reported-by: Jean-Francois Moine <moinejf@free.fr>
Reported-by: Christoffer Dall <cdall@cs.columbia.edu>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-02-08 12:21:07 +00:00
Russell King
633dc92a28 ARM: DMA mapping: fix bad atomic test
Realview fails to boot with this warning:
BUG: spinlock lockup suspected on CPU#0, init/1
 lock: 0xcf8bde10, .magic: dead4ead, .owner: init/1, .owner_cpu: 0
Backtrace:
[<c00185d8>] (dump_backtrace+0x0/0x10c) from [<c03294e8>] (dump_stack+0x18/0x1c) r6:cf8bde10 r5:cf83d1c0 r4:cf8bde10 r3:cf83d1c0
[<c03294d0>] (dump_stack+0x0/0x1c) from [<c018926c>] (spin_dump+0x84/0x98)
[<c01891e8>] (spin_dump+0x0/0x98) from [<c0189460>] (do_raw_spin_lock+0x100/0x198)
[<c0189360>] (do_raw_spin_lock+0x0/0x198) from [<c032cbac>] (_raw_spin_lock+0x3c/0x44)
[<c032cb70>] (_raw_spin_lock+0x0/0x44) from [<c01c9224>] (pl011_console_write+0xe8/0x11c)
[<c01c913c>] (pl011_console_write+0x0/0x11c) from [<c002aea8>] (call_console_drivers.clone.7+0xdc/0x104)
[<c002adcc>] (call_console_drivers.clone.7+0x0/0x104) from [<c002b320>] (console_unlock+0x2e8/0x454)
[<c002b038>] (console_unlock+0x0/0x454) from [<c002b8b4>] (vprintk_emit+0x2d8/0x594)
[<c002b5dc>] (vprintk_emit+0x0/0x594) from [<c0329718>] (printk+0x3c/0x44)
[<c03296dc>] (printk+0x0/0x44) from [<c002929c>] (warn_slowpath_common+0x28/0x6c)
[<c0029274>] (warn_slowpath_common+0x0/0x6c) from [<c0029304>] (warn_slowpath_null+0x24/0x2c)
[<c00292e0>] (warn_slowpath_null+0x0/0x2c) from [<c0070ab0>] (lockdep_trace_alloc+0xd8/0xf0)
[<c00709d8>] (lockdep_trace_alloc+0x0/0xf0) from [<c00c0850>] (kmem_cache_alloc+0x24/0x11c)
[<c00c082c>] (kmem_cache_alloc+0x0/0x11c) from [<c00bb044>] (__get_vm_area_node.clone.24+0x7c/0x16c)
[<c00bafc8>] (__get_vm_area_node.clone.24+0x0/0x16c) from [<c00bb7b8>] (get_vm_area_caller+0x48/0x54)
[<c00bb770>] (get_vm_area_caller+0x0/0x54) from [<c0020064>] (__alloc_remap_buffer.clone.15+0x38/0xb8)
[<c002002c>] (__alloc_remap_buffer.clone.15+0x0/0xb8) from [<c0020244>] (__dma_alloc+0x160/0x2c8)
[<c00200e4>] (__dma_alloc+0x0/0x2c8) from [<c00204d8>] (arm_dma_alloc+0x88/0xa0)[<c0020450>] (arm_dma_alloc+0x0/0xa0) from [<c00beb00>] (dma_pool_alloc+0xcc/0x1a8)
[<c00bea34>] (dma_pool_alloc+0x0/0x1a8) from [<c01a9d14>] (pl08x_fill_llis_for_desc+0x28/0x568)
[<c01a9cec>] (pl08x_fill_llis_for_desc+0x0/0x568) from [<c01aab8c>] (pl08x_prep_slave_sg+0x258/0x3b0)
[<c01aa934>] (pl08x_prep_slave_sg+0x0/0x3b0) from [<c01c9f74>] (pl011_dma_tx_refill+0x140/0x288)
[<c01c9e34>] (pl011_dma_tx_refill+0x0/0x288) from [<c01ca748>] (pl011_start_tx+0xe4/0x120)
[<c01ca664>] (pl011_start_tx+0x0/0x120) from [<c01c54a4>] (__uart_start+0x48/0x4c)
[<c01c545c>] (__uart_start+0x0/0x4c) from [<c01c632c>] (uart_start+0x2c/0x3c)
[<c01c6300>] (uart_start+0x0/0x3c) from [<c01c795c>] (uart_write+0xcc/0xf4)
[<c01c7890>] (uart_write+0x0/0xf4) from [<c01b0384>] (n_tty_write+0x1c0/0x3e4)
[<c01b01c4>] (n_tty_write+0x0/0x3e4) from [<c01acfe8>] (tty_write+0x144/0x240)
[<c01acea4>] (tty_write+0x0/0x240) from [<c01ad17c>] (redirected_tty_write+0x98/0xac)
[<c01ad0e4>] (redirected_tty_write+0x0/0xac) from [<c00c371c>] (vfs_write+0xbc/0x150)
[<c00c3660>] (vfs_write+0x0/0x150) from [<c00c39c0>] (sys_write+0x4c/0x78)
[<c00c3974>] (sys_write+0x0/0x78) from [<c0014460>] (ret_fast_syscall+0x0/0x3c)

This happens because the DMA allocation code is not respecting atomic
allocations correctly.

GFP flags should not be tested for GFP_ATOMIC to determine if an
atomic allocation is being requested.  GFP_ATOMIC is not a flag but
a value.  The GFP bitmask flags are all prefixed with __GFP_.

The rest of the kernel tests for __GFP_WAIT not being set to indicate
an atomic allocation.  We need to do the same.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-02-08 10:25:23 +00:00
Russell King
e210101dbb ARM: realview: ensure that we have sufficient IRQs available
Realview EB with a rev B MPcore tile results in lots of warnings at
boot because it can't allocate enough IRQs.  Fix this by increasing
the number of available IRQs.

WARNING: at /home/rmk/git/linux-rmk/arch/arm/common/gic.c:757 gic_init_bases+0x12c/0x2ec()
Cannot allocate irq_descs @ IRQ96, assuming pre-allocated
Modules linked in:
Backtrace:
[<c00185d8>] (dump_backtrace+0x0/0x10c) from [<c03294e8>] (dump_stack+0x18/0x1c) r6:000002f5 r5:c042c62c r4:c044ff40 r3:c045f240
[<c03294d0>] (dump_stack+0x0/0x1c) from [<c00292c8>] (warn_slowpath_common+0x54/0x6c)
[<c0029274>] (warn_slowpath_common+0x0/0x6c) from [<c0029384>] (warn_slowpath_fmt+0x38/0x40)
[<c002934c>] (warn_slowpath_fmt+0x0/0x40) from [<c042c62c>] (gic_init_bases+0x12c/0x2ec)
[<c042c500>] (gic_init_bases+0x0/0x2ec) from [<c042cdc8>] (gic_init_irq+0x8c/0xd8)
[<c042cd3c>] (gic_init_irq+0x0/0xd8) from [<c042827c>] (init_IRQ+0x1c/0x24)
[<c0428260>] (init_IRQ+0x0/0x24) from [<c04256c8>] (start_kernel+0x1a4/0x300)
[<c0425524>] (start_kernel+0x0/0x300) from [<70008070>] (0x70008070)
---[ end trace 1b75b31a2719ed1c ]---
------------[ cut here ]------------
WARNING: at /home/rmk/git/linux-rmk/kernel/irq/irqdomain.c:234 irq_domain_add_legacy+0x80/0x140()
Modules linked in:
Backtrace:
[<c00185d8>] (dump_backtrace+0x0/0x10c) from [<c03294e8>] (dump_stack+0x18/0x1c) r6:000000ea r5:c0081a38 r4:00000000 r3:c045f240
[<c03294d0>] (dump_stack+0x0/0x1c) from [<c00292c8>] (warn_slowpath_common+0x54/0x6c)
[<c0029274>] (warn_slowpath_common+0x0/0x6c) from [<c0029304>] (warn_slowpath_null+0x24/0x2c)
[<c00292e0>] (warn_slowpath_null+0x0/0x2c) from [<c0081a38>] (irq_domain_add_legacy+0x80/0x140)
[<c00819b8>] (irq_domain_add_legacy+0x0/0x140) from [<c042c64c>] (gic_init_bases+0x14c/0x2ec)
[<c042c500>] (gic_init_bases+0x0/0x2ec) from [<c042cdc8>] (gic_init_irq+0x8c/0xd8)
[<c042cd3c>] (gic_init_irq+0x0/0xd8) from [<c042827c>] (init_IRQ+0x1c/0x24)
[<c0428260>] (init_IRQ+0x0/0x24) from [<c04256c8>] (start_kernel+0x1a4/0x300)
[<c0425524>] (start_kernel+0x0/0x300) from [<70008070>] (0x70008070)
---[ end trace 1b75b31a2719ed1d ]---
------------[ cut here ]------------
WARNING: at /home/rmk/git/linux-rmk/arch/arm/common/gic.c:762 gic_init_bases+0x170/0x2ec()
Modules linked in:
Backtrace:
[<c00185d8>] (dump_backtrace+0x0/0x10c) from [<c03294e8>] (dump_stack+0x18/0x1c) r6:000002fa r5:c042c670 r4:00000000 r3:c045f240
[<c03294d0>] (dump_stack+0x0/0x1c) from [<c00292c8>] (warn_slowpath_common+0x54/0x6c)
[<c0029274>] (warn_slowpath_common+0x0/0x6c) from [<c0029304>] (warn_slowpath_null+0x24/0x2c)
[<c00292e0>] (warn_slowpath_null+0x0/0x2c) from [<c042c670>] (gic_init_bases+0x170/0x2ec)
[<c042c500>] (gic_init_bases+0x0/0x2ec) from [<c042cdc8>] (gic_init_irq+0x8c/0xd8)
[<c042cd3c>] (gic_init_irq+0x0/0xd8) from [<c042827c>] (init_IRQ+0x1c/0x24)
[<c0428260>] (init_IRQ+0x0/0x24) from [<c04256c8>] (start_kernel+0x1a4/0x300)
[<c0425524>] (start_kernel+0x0/0x300) from [<70008070>] (0x70008070)
---[ end trace 1b75b31a2719ed1e ]---

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-02-08 10:23:32 +00:00
Russell King
2bb3135166 ARM: GIC: fix GIC cpumask initialization
Punit Agrawal reports:
> I was trying to boot 3.8-rc5 on Realview EB 11MPCore using
> realview-smp_defconfig as a starting point but the kernel failed to
> progress past the log below (config attached).
>
> Pawel suggested I try reverting 384a290283 - "ARM: gic: use a private
> mapping for CPU target interfaces" that you've authored. With this
> commit reverted the kernel boots.
>
> I am not quite sure why the commit breaks 11MPCore but Pawel (cc'd)
> might be able to shed light on that.

Some early GIC implementations return zero for the first distributor
CPU routing register.  This means we can't rely on that telling us
which CPU interface we're connected to.  We know that these platforms
implement PPIs for IRQs 29-31 - but we shouldn't assume that these
will always be populated.

So, instead, scan for a non-zero CPU routing register in the first
32 IRQs and use that as our CPU mask.

Reported-by: Punit Agrawal <punit.agrawal@arm.com>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-02-08 10:17:22 +00:00
Luciano Coelho
6cc9efed70 wlcore: move wl12xx_platform_data up and make it truly optional
The platform data is used not only by wlcore-based drivers, but also
by wl1251.  Move it up in the directory hierarchy to reflect this.

Additionally, make it truly optional.  At the moment, disabling
platform data while wl1251_sdio or wlcore_sdio are enabled doesn't
work, but it will be necessary when device tree support is
implemented.

Signed-off-by: Luciano Coelho <coelho@ti.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
2013-02-08 10:05:02 +02:00
Ian Munsie
2468dcf641 powerpc: Add support for context switching the TAR register
This patch adds support for enabling and context switching the Target
Address Register in Power8. The TAR is a new special purpose register
that can be used for computed branches with the bctar[l] (branch
conditional to TAR) instruction in the same manner as the count and link
registers.

Signed-off-by: Ian Munsie <imunsie@au1.ibm.com>
Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-08 14:05:50 +11:00
Nishanth Aravamudan
14b6f00f8a pseries/iommu: Remove DDW on kexec
pseries/iommu: remove DDW on kexec

We currently insert a property in the device-tree when we successfully
configure DDW for a given slot. This was meant to be an optimization to
speed up kexec/kdump, so that we don't need to make the RTAS calls again
to re-configured DDW in the new kernel.

However, we end up tripping a plpar_tce_stuff failure on kexec/kdump
because we unconditionally parse the ibm,dma-window property for the
node at bus/dev setup time. This property contains the 32-bit DMA window
LIOBN, which is distinct from the DDW window's. We pass that LIOBN (via
iommu_table_init -> iommu_table_clear -> tce_free ->
tce_freemulti_pSeriesLP) to plpar_tce_stuff, which fails because that
32-bit window is no longer present after
25ebc45b93 ("powerpc/pseries/iommu: remove
default window before attempting DDW manipulation").

I believe the simplest, easiest-to-maintain fix is to just change our
initcall to, rather than detecting and updating the new kernel's DDW
knowledge, just remove all DDW configurations. When the drivers
re-initialize, we will set everything back up as it was before.

Signed-off-by: Nishanth Aravamudan <nacc@us.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-08 14:05:49 +11:00
Nishanth Aravamudan
a1dabadebb pseries/iommu: Restore_default_window does not use liobn parameter
The parameter is unused, and complicates a following fix. Just remove
it.

Signed-off-by: Nishanth Aravamudan <nacc@us.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-08 14:05:48 +11:00
Daniel Borkmann
174ea471c3 powerpc: fix ics_rtas_init and start_secondary section mismatch
It seems, we're fine with just annotating the two functions.
Thus, this fixes the following build warnings on ppc64:

WARNING: arch/powerpc/sysdev/xics/built-in.o(.text+0x1664):
The function .ics_rtas_init() references
the function __init .xics_register_ics().
This is often because .ics_rtas_init lacks a __init
annotation or the annotation of .xics_register_ics is wrong.

WARNING: arch/powerpc/sysdev/built-in.o(.text+0x6044):
The function .ics_rtas_init() references
the function __init .xics_register_ics().
This is often because .ics_rtas_init lacks a __init
annotation or the annotation of .xics_register_ics is wrong.

WARNING: arch/powerpc/kernel/built-in.o(.text+0x2db30):
The function .start_secondary() references
the function __cpuinit .vdso_getcpu_init().
This is often because .start_secondary lacks a __cpuinit
annotation or the annotation of .vdso_getcpu_init is wrong.

Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Daniel Borkmann <dborkman@redhat.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-02-08 14:05:48 +11:00
Linus Torvalds
95436adaa0 Late pinctrl fixes. Luckily just two patches:
- Exynos Kconfig fixup
 - SIRF DT translation bug
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Merge tag 'pinctrl-for-v3.8-late' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull late pinctrl fixes from Linus Walleij:
 "Two patches appeared as of late, one was completely news to me, the
  other one was rotated in -next for the next merge window but turned
  out to be a showstopper.

   - Exynos Kconfig fixup
   - SIRF DT translation bug"

* tag 'pinctrl-for-v3.8-late' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinctrl: sirf: replace of_gpio_simple_xlate by sirf specific of_xlate
  pinctrl: exynos: change PINCTRL_EXYNOS option
2013-02-08 12:00:44 +11:00
Ville Syrjälä
96477b4cd7 x86-32: Add support for 64bit get_user()
Implement __get_user_8() for x86-32. It will return the
64-bit result in edx:eax register pair, and ecx is used
to pass in the address and return the error value.

For consistency, change the register assignment for all
other __get_user_x() variants, so that address is passed in
ecx/rcx, the error value is returned in ecx/rcx, and eax/rax
contains the actual value.

[ hpa: I modified the patch so that it does NOT change the calling
  conventions for the existing callsites, this also means that the code
  is completely unchanged for 64 bits.

  Instead, continue to use eax for address input/error output and use
  the ecx:edx register pair for the output. ]

This is a partial refresh of a patch [1] by Jamie Lokier from
2004. Only the minimal changes to implement 64bit get_user()
were picked from the original patch.

[1] http://article.gmane.org/gmane.linux.kernel/198823

Originally-by: Jamie Lokier <jamie@shareable.org>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link:
http://lkml.kernel.org/r/1355312043-11467-1-git-send-email-ville.syrjala@linux.intel.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-02-07 15:07:28 -08:00
Kees Cook
e575a86fdc x86: Do not leak kernel page mapping locations
Without this patch, it is trivial to determine kernel page
mappings by examining the error code reported to dmesg[1].
Instead, declare the entire kernel memory space as a violation
of a present page.

Additionally, since show_unhandled_signals is enabled by
default, switch branch hinting to the more realistic
expectation, and unobfuscate the setting of the PF_PROT bit to
improve readability.

[1] http://vulnfactory.org/blog/2013/02/06/a-linux-memory-trick/

Reported-by: Dan Rosenberg <dan.j.rosenberg@gmail.com>
Suggested-by: Brad Spengler <spender@grsecurity.net>
Signed-off-by: Kees Cook <keescook@chromium.org>
Cc: stable@vger.kernel.org
Acked-by: H. Peter Anvin <hpa@zytor.com>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Eric W. Biederman <ebiederm@xmission.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/20130207174413.GA12485@www.outflux.net
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2013-02-07 19:57:44 +01:00
Josh Wu
c18c6b29e0 ARM: at91: at91sam9n12: add DT parameters to enable PMECC
Default ecc correctable setting is 2bits in 512 bytes.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-02-07 16:45:06 +01:00
Josh Wu
5314bc2de9 ARM: at91: at91sam9x5: add DT parameters to enable PMECC
Default ecc correctable setting is 2bits in 512 bytes.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-02-07 16:45:05 +01:00
Joachim Eastwood
ce3b2630fd ARM: at91: add EMAC bindings to RM9200 DT
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-02-07 16:40:09 +01:00
Joachim Eastwood
883a07f69c ARM: at91: add SSC bindings to RM9200 DT
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-02-07 16:40:08 +01:00
Joachim Eastwood
4e4c963ea9 ARM: at91: add MMC bindings to RM9200 DT
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-02-07 16:40:08 +01:00
Jean-Christophe PLAGNIOL-VILLARD
a5618928d5 ARM: at91: Animeo IP: enable watchdog support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Sylvain FARGIER <sylvain.fargier@somfy.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-02-07 16:40:07 +01:00
Xiao Guangrong
24db2734ad KVM: MMU: cleanup __direct_map
Use link_shadow_page to link the sp to the spte in __direct_map

Reviewed-by: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2013-02-06 22:42:09 -02:00
Xiao Guangrong
f761620377 KVM: MMU: remove pt_access in mmu_set_spte
It is only used in debug code, so drop it

Reviewed-by: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2013-02-06 22:42:08 -02:00
Xiao Guangrong
55dd98c3a8 KVM: MMU: cleanup mapping-level
Use min() to cleanup mapping_level

Reviewed-by: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2013-02-06 22:42:08 -02:00
Xiao Guangrong
caf6900f2d KVM: MMU: lazily drop large spte
Currently, kvm zaps the large spte if write-protected is needed, the later
read can fault on that spte. Actually, we can make the large spte readonly
instead of making them not present, the page fault caused by read access can
be avoided

The idea is from Avi:
| As I mentioned before, write-protecting a large spte is a good idea,
| since it moves some work from protect-time to fault-time, so it reduces
| jitter.  This removes the need for the return value.

Reviewed-by: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2013-02-06 22:28:01 -02:00
Gleb Natapov
5037878e22 KVM: VMX: cleanup vmx_set_cr0().
When calculating hw_cr0 teh current code masks bits that should be always
on and re-adds them back immediately after. Cleanup the code by masking
only those bits that should be dropped from hw_cr0. This allow us to
get rid of some defines.

Signed-off-by: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2013-02-06 22:00:02 -02:00
Milo(Woogyom) Kim
df4094d24e leds-lp5521/5523: use new lp55xx common header
The LP55xx common driver provides a new header, leds-lp55xx.h.
 This driver enables removing duplicate code for both drivers and
 making coherent driver structure.
 LP5521 and LP5523/55231 platform data were merged into one common file.
 Therefore, the LP5521/5523 platform code need to be fixed.

 This patch has been already acked.

 For ux500: https://lkml.org/lkml/2012/10/11/417
 Acked-by: Linus Walleij <linus.walleij@linaro.org>

 For omap: https://lkml.org/lkml/2012/10/11/334
 Acked-by: Tony Lindgren <tony@atomide.com>

Signed-off-by: Milo(Woogyom) Kim <milo.kim@ti.com>
Signed-off-by: Bryan Wu <cooloney@gmail.com>
2013-02-06 15:59:30 -08:00
Rajendra Nayak
6048009818 ARM: OMAP4: PM: Warn users about usage of older bootloaders
OMAP4 CHIP level PM works only with newer bootloaders. The
dependency on the bootloader comes from the fact that the
kernel is missing reset and initialization code for some
devices.

While the right thing to do is to add reset and init code in
the kernel, for some co-processor IP blocks like DSP and IVA
it means downloading firmware into each one of them to execute
idle instructions.

While a feasible solution is worked upon on how such IP blocks
can be better handled in the kernel, in the interim, to avoid
any further frustration to users testing PM on OMAP4 and finding
it broken, warn them about the bootloader being a possible
cause.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: R Sricharan <r.sricharan@ti.com>
[paul@pwsan.com: tweaked warning messages and comments slightly]
Acked-by: Kevin Hilman <khilman@linaro.org>
[paul@pwsan.com: fixed checkpatch warning]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-02-06 16:38:32 -07:00
H. Peter Anvin
bb9b1a834f Retract MCE-specific UAPI exports which are unused and shouldn't be
used.
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Merge tag 'ras_for_3.8' into x86/urgent

Retract MCE-specific UAPI exports which are unused and shouldn't be
used.

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-02-06 14:18:53 -08:00
Paul Walmsley
814a18a5d0 ARM: OMAP AM3517/05: hwmod data: block WFI when EMAC active
According to Mark Greer, on OMAP AM3517/3505 chips, the EMAC is unable
to wake the ARM up from WFI:

    http://www.spinics.net/lists/arm-kernel/msg174734.html

Further troubleshooting was unable to narrow the problem down.  So we
don't have much choice other than to block WFI when the EMAC is active
with the HWMOD_BLOCK_WFI flag.

Based on Mark's original patch.  We're removing the omap_device-based
pm_lats code, so a different approach was needed.

This third version contains some corrections thanks to Mark's review.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Mark A. Greer <mgreer@animalcreek.com>
Acked-by: Mark A. Greer <mgreer@animalcreek.com>
2013-02-06 13:48:56 -07:00
Paul Walmsley
1e3d8fe771 ARM: OMAP2420: hwmod data/PM: use hwmod to block WFI when I2C active
Use the HWMOD_BLOCK_WFI flag in the hwmod data to prevent the MPU from
entering WFI when the I2C devices are active.  No idea why this is needed;
this could certainly bear further investigation if anyone is interested.
The objective here is to remove some custom code from the OMAP24xx PM
code.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
2013-02-06 13:48:14 -07:00
Paul Walmsley
db27c0c0d0 ARM: OMAP2+: hwmod: add support for blocking WFI when a device is active
Apparently, on some OMAPs, the MPU can't be allowed to enter WFI while
certain peripherals are active.  It's not clear why, and it's likely
that there is simply some other bug in the driver or integration code.
But since the likelihood that anyone will have the time to track these
problems down in the future seems quite small, we'll provide a
flag, HWMOD_BLOCK_WFI, to mark these issues in the hwmod data.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-02-06 13:48:14 -07:00
Paul Walmsley
088e8806c4 ARM: OMAP2xxx: PM: enter WFI via inline asm if CORE stays active
There shouldn't be any need to jump to SRAM code if the OMAP CORE
clockdomain (and consequently the SDRAM controller and CORE PLL) stays
active during MPU WFI.  The SRAM code should only be needed when the RAM
enters self-refresh.  So in the case where CORE stays active, just call
WFI directly from the mach-omap2/pm24xx.c code.  This removes some
unnecessary SRAM code.

This second version replaces the inline WFI with the corresponding
coprocessor register call, using tlbflush.h as an example.  This is
because the assembler doesn't recognize WFI as a valid ARMv6
instruction.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
2013-02-06 13:48:14 -07:00
Kishon Vijay Abraham I
51482be9dc ARM: OMAP: USB: Add phy binding information
This is w.r.t the changes in PHY library to support adding and getting
multiple PHYs of the same type. In the new design, the
binding information between the PHY and the USB controller should be
specified in the platform specific initialization code. So it's been
done here for OMAP platforms.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-02-06 11:40:14 -08:00
Kishon Vijay Abraham I
fa1dfe4abe ARM: OMAP2: MUSB: Specify omap4 has mailbox
Added has_mailbox to the musb platform data to specify that omap uses
an external mailbox (in control module) to communicate with the musb
core during device connect and disconnect.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-02-06 11:40:13 -08:00
Kishon Vijay Abraham I
36273356b2 ARM: OMAP: devices: create device for usb part of control module
A seperate driver has been added to handle the usb part of control
module. A device for the above driver is created here, using the register
address information to be used by the driver for powering on the PHY and
for writing to the mailbox.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-02-06 11:40:13 -08:00
Kishon Vijay Abraham I
5b9479e9f1 ARM: OMAP4: remove control module address space from PHY and OTG
Now that we have a separate driver for the control module,
stop populating the control module device data in other modules
(PHY and OTG) device info.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-02-06 11:39:58 -08:00