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46 Commits

Author SHA1 Message Date
Oak Zeng
3760f76cbe drm/amdgpu: Move IH clientid defs to separate file 
This is preparation for sharing client ID definitions
between amdgpu and amdkfd

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-03-14 15:16:35 -05:00
Christian König
c633c00bf0 drm/amdgpu: separate PASID mapping from VM flush v2 
Stuffing the PASID mapping into the VM flush isn't flexible enough since
the PASID mapping changes not as often as we need a VM flush.

v2: add missing use of gmc_v7_0_emit_pasid_mapping

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:20:18 -05:00
Christian König
f732b6b3c0 drm/amdgpu: move waiting for VM flush into gmc_v9_0_emit_flush_gpu_tlb 
Keep that at a common place instead of spread over all engines.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:19:12 -05:00
Christian König
2b124b0b70 drm/amdgpu: implement vcn_v1_0_(dec|enc)_ring_emit_reg_wait v2 
Add emit_reg_wait implementation for VCN v1.

v2: cleanup the existing code as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:19:11 -05:00
Christian König
4383736340 drm/amdgpu: fix vcn_v1_0_dec_ring_emit_wreg 
That got mixed up with the encode ring function.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:52 -05:00
Christian König
2ee150cda7 drm/amdgpu: remove now superflous *_hdp operation 
All HDP invalidation and most flush can now be replaced by the generic
ASIC function.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:22 -05:00
Christian König
9096d6e51a drm/amdgpu: implement gmc_v9_0_emit_flush_gpu_tlb 
Unify tlb flushing for gmc v9.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:09 -05:00
Christian König
0b5f83a375 drm/amdgpu: wire up emit_wreg for VCN v1 
Needed for vm_flush unification.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:07 -05:00
Christian König
5a4633c4b8 drm/amdgpu: forward pasid to backend flush implementations 
rd the pasid from the VM code to the emit_vm_flush function and update
all implementations with the new parameter.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:17:47 -05:00
Christian König
132f34e4b5 drm/amdgpu: move struct gart_funcs into amdgpu_gmc.h 
And rename it to struct gmc_funcs.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Samuel Li <Samuel.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:17:44 -05:00
Christian König
c4f46f22c4 drm/amdgpu: rename vm_id to vmid 
sed -i "s/vm_id/vmid/g" drivers/gpu/drm/amd/amdgpu/*.c
sed -i "s/vm_id/vmid/g" drivers/gpu/drm/amd/amdgpu/*.h

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-27 11:34:02 -05:00
Christian König
3de676d8e7 drm/amdgpu: allow get_vm_pde to change flags as well 
And also provide the level for which we need a PDE.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-12 14:46:19 -05:00
Shaoyun Liu
4fd09a19a6 drm/admgpu: Reduce the usage of soc15ip.h 
Remove the header where it's not used.

Acked-by: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-08 11:35:19 -05:00
Shaoyun Liu
cd29253f65 drm/amdgpu: Change SOC15_REG_OFFSET to use dynamic register offset 
Acked-by: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-08 11:32:24 -05:00
Shaoyun Liu
946a4d5b30 drm/amdgpu: Avoid use SOC15_REG_OFFSET in static const array 
Handle dynamic offsets correctly in static arrays.

Acked-by: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-08 11:18:51 -05:00
Feifei Xu
b1ebd7c0cd drm/amd/include:cleanup raven1 vcn header files. 
Cleanup asic_reg/raven1/VCN folder. Remove unused vcn_1_0_default.h.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:48:26 -05:00
Feifei Xu
95c1f7aad2 drm/amd/include:cleanup raven1 mmhub header files. 
Cleanup asic_reg/raven1/MMHUB folder.Remove unused mmhub_9_1_default.h

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:48:24 -05:00
Feifei Xu
fb960bd283 drm/amd/include:cleanup vega10 header files. 
Remove asic_reg/vega10 folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:48:22 -05:00
Feifei Xu
75199b8c7f drm/amd/include:cleanup vega10 hdp header files. 
Cleanup asic_reg/vega10/HDP folder, remove hdp_4_0_default.h

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:48:16 -05:00
Michel Dänzer
89ce6e0afe drm/amdgpu: Set adev->vcn.irq.num_types for VCN 
We were setting adev->uvd.irq.num_types instead.

Fixes: 9b257116e7 ("drm/amdgpu: add vcn enc irq support")
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
 2017-11-28 17:44:13 -05:00
Monk Liu
6e2e216fad drm/amdgpu:use formal register to trigger hdp invalidate 
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 15:14:10 -04:00
Tom St Denis
0ad6f0d387 drm/amd/amdgpu: Port VCN over to new SOC15 macros 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2017-06-15 11:50:35 -04:00
Christian König
b116632557 drm/amdgpu: cleanup adjust_mc_addr handling v4 
Rename adjust_mc_addr to get_vm_pde and check the address bits in one place.

v2: handle vcn as well, keep setting the valid bit manually,
    add a BUG_ON() for GMC v6, v7 and v8 as well.
v3: handle vcn_v1_0_enc_ring_emit_vm_flush as well.
v4: fix the BUG_ON mask for GFX6-8

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-31 14:16:35 -04:00
Christian König
f5f3b16aae drm/amdgpu: fix merge of vcn_v1_0.c v2 
That line got missed during the merge.

v2: fix vcn_v1_0_enc_ring_emit_vm_flush as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 18:21:29 -04:00
Hawking Zhang
fbf09b6935 drm/amdgpu: correct emit frame size for vcn dec/enc ring 
only mmhub will be invalidated during vcn dec/enc vm flush

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 18:08:59 -04:00
Hawking Zhang
04e5f2a635 drm/amdgpu: correct vmhub for vcn dec/enc ring 
This got missed due to differences in the trees
when raven support was merged.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: ken wang <Qingqing.Wang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 18:07:59 -04:00
Alex Deucher
0dfafa225d drm/amdgpu/vcn: remove duplicate mask 
Looks like a copy past issue.

Reported-by: Julia Lawall <julia.lawall@lip6.fr>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:57 -04:00
Huang Rui
d2a33871b5 drm/amdgpu: enable sw clock gating for vcn 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:48 -04:00
Huang Rui
fb4d56fa37 drm/amdgpu/vcn: add sw clock gating 
Add sw controlled clockgating for VCN.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:47 -04:00
Leo Liu
62a9f37e4c drm/amdgpu: add vcn firmware header offset 
New firmware add psp header.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:46 -04:00
Leo Liu
25547cfd26 drm/amdgpu: add vcn enc ib test 
Update and enable the vcn encode IB test.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:43 -04:00
Leo Liu
c3bd304009 drm/amdgpu: enable vcn encode ring tests 
Wire up the callback and enable them.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:43 -04:00
Leo Liu
9b257116e7 drm/amdgpu: add vcn enc irq support 
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:42 -04:00
Leo Liu
8ace845ff0 drm/amdgpu: add vcn enc ring type and functions 
Add the ring function callbacks for the encode rings.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:41 -04:00
Leo Liu
101c6fee53 drm/amdgpu: add vcn enc rings 
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:40 -04:00
Leo Liu
3639f7d855 drm/amdgpu: change vcn dec rb command specific for decode 
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:39 -04:00
Leo Liu
81439659f4 drm/amdgpu: implement new vcn cache window programming 
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:38 -04:00
Leo Liu
a4c424c5c6 drm/amdgpu: implement insert end ring function for vcn decode 
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:32 -04:00
Leo Liu
e7501c34aa drm/amdgpu: implement vcn start RB command 
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:31 -04:00
Leo Liu
7741cced67 drm/amdgpu: expose vcn RB command 
Signed-off-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:30 -04:00
Leo Liu
8c303c0190 drm/amdgpu: move vcn ring test to amdgpu_vcn.c 
Hope it will be generic for vcn later

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:29 -04:00
Leo Liu
3ea975e4ff drm/amdgpu: add vcn ip block and type 
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:27 -04:00
Leo Liu
a319f444bb drm/amdgpu: add vcn irq functions 
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:26 -04:00
Leo Liu
cca69fe8ff drm/amdgpu: add vcn decode ring type and functions 
Add the ring function callbacks for the decode ring.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:25 -04:00
Leo Liu
a4bf608be5 drm/amdgpu: add vcn decode ring support 
Add the decode ring init.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:24 -04:00
Leo Liu
88b5af70e2 drm/amdgpu: add vcn ip block functions (v2) 
Fill in the core VCN 1.0 setup functionality.

v2: squash in fixup (Alex)

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:23 -04:00