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Commit Graph

629 Commits

Author SHA1 Message Date
Jordan Lazare
7160c74cd0 drm/amd/display: Log clock source in error condition 
Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:22:32 -04:00
Ding Wang
4e3133c79d drm/amd/display: obtain usHBR3En bit from BP 1 
ASICs using bios parser 1 don't check HBR3 capability as there is no such
a bit usHBR3En in ATOM_ENCODER_CAP_RECORDER.
Therefore, will use ATOM_ENCODER_CAP_RECORDER_V2 and thus obtain the usHBR3En
bit.

Signed-off-by: Ding Wang <ding.wang@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:21:31 -04:00
Tony Cheng
fcbb5ad3fe drm/amd/display: use CP2520-3 for PHY compliance automation 
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:21:24 -04:00
Roman Li
940c654e64 drm/amd/display: increase timeout for dmif dealloc 
In some use-cases, e.g. multiple 4K displays,
exisitng wait time for reg update of 30msec timed out
during mode setiing that sometimes resulted in system bad state
as we continue without waiting for registry update complete.
Increasing timeout to 35msec fixes that problem.

Signed-off-by: Roman Li <Roman.Li@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:21:17 -04:00
Charlene Liu
fd8cc371ed drm/amd/display: voltage request related change 
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:21:13 -04:00
Tony Cheng
0e19401f95 drm/amd/display: support PHY compliance automation for CP2520 pattern 1/2/3 
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:20:19 -04:00
Tony Cheng
3f8a944016 drm/amd/display: support CP2520 pattern 2 for HBR2 compliance 
- also some clean up

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:20:16 -04:00
Alex Deucher
8fa9ca2ec6 drm/amd/display: Remove DCE12 guards 
Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:19:36 -04:00
Alex Deucher
2c8ad2d5a2 drm/amd/display: Enable DCE12 support 
This wires DCE12 support into DC and enables it.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:19:23 -04:00
Jordan Lazare
c0bc0bd587 drm/amd/display: Less log spam 
Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:18:54 -04:00
Charlene Liu
e8c963d6d9 drm/amd/display: refclock from bios firmwareInfoTable 
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:18:11 -04:00
Amy Zhang
ece4f358cb drm/amd/display: Simplify some DMCU waits 
Signed-off-by: Amy Zhang <Amy.Zhang@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:18:08 -04:00
Tony Cheng
773d1bcae7 drm/amd/display: remove independent lock as we have no use case today 
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:17:56 -04:00
Tony Cheng
d98e5cc2dd drm/amd/display: clean up and simply locking logic 
always take update lock instead of using HW built in update
lock trigger with write to primary_addr_lo.

we will be a little more inefficient with the extra registers
write to lock, but this simplify code and make it always correct.

Will revisit locking optimization once update sequence mature

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:17:51 -04:00
Charlene Liu
f0828115ef drm/amd/display: freesync pipe split :VTotal_Min_Mask for Hflip/lock. 
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:16:55 -04:00
Harry Wentland
c2e218dda0 drm/amd/display: Some more warning fixes 
This doesn't show with gcc6

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:16:39 -04:00
Dmytro Laktyushkin
ce9c088051 drm/amd/display: move visual confirm recout adjustment to scaler 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:16:35 -04:00
Harry Wentland
6480136967 drm/amd/display: Fix warnings in DC 
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:16:22 -04:00
Leon Elazar
1781958ff4 drm/amd/display: Surface Validation Fixes + Audio Mask 
1. dc: Adding missing mask for audio register DCCG_AUDIO_DTO_SOURCE
2. Changing the surface validation to check the limits of the clip rect instead of the source rect.

Signed-off-by: Leon Elazar <leon.elazar@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:16:14 -04:00
Dmytro Laktyushkin
227d251899 drm/amd/display: add scaler coefficients for 64 phase 5-8 taps 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:16:09 -04:00
Amy Zhang
3548f0731a drm/amd/display: DMCU PSR Refactor 
- Move PSR programming from link encoder to dmcu

Signed-off-by: Amy Zhang <Amy.Zhang@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:16:02 -04:00
Charlene Liu
4b679bc3ca drm/amd/display: HDMI deep color mode audio issue 
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:15:54 -04:00
Charlene Liu
181a888fcd drm/amd/display: fix incorrect programming for YCbCr422 and YCbCr420 
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:15:36 -04:00
Charlene Liu
896b3cb3f4 drm/amd/display: fix 12bpc truncate to 10bpc 
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:15:33 -04:00
Charlene Liu
87b58768ec drm/amd/display: audio bug fix part 1: Add missing audio ACR 
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:15:30 -04:00
Jordan Lazare
beed42b5bc drm/amd/display: Don't attempt to program missing register fields on DCE8 
When moving to a common dce/ infrastructure for all asics, some register fields
do not exist in DCE8, and cause ASSERTS and debug spam.

Instead, check to see whether a register field mask is valid before attempting
to program the register field

Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:15:06 -04:00
Zeyu Fan
77f36b2712 drm/amd/display: Fix logic that causes segfault on DP display. 
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com>
Acked-by: Jordan Lazare <Jordan.Lazare@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:14:38 -04:00
Zeyu Fan
27e947b0e1 drm/amd/display: Fix program pix clk logic to unblock deep color set. 
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:14:27 -04:00
Dmytro Laktyushkin
871ffb606a drm/amd/display: fix psr status wait 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eagle Yeh <eagle.yeh@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:14:04 -04:00
Charlene Liu
cc4d99b8a8 drm/amd/display: HDMI YCbCr422 12bpc pixel format issue 
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:13:37 -04:00
Harry Wentland
ca709397b5 drm/amd/display: Fix 64-bit division 
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:13:23 -04:00
Charlene Liu
71f7256e41 drm/amd/display: remove CV-specific timing standard 
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:13:20 -04:00
Anthony Koo
90b9d7fa10 drm/amd/display: Support ABM without PPlib 
Fix problem with loading IRAM

Signed-off-by: Anthony Koo <anthony.koo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:13:03 -04:00
Anthony Koo
6728b30c97 drm/amd/display: Move backlight from encoder to ABM 
Signed-off-by: Anthony Koo <anthony.koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:12:56 -04:00
Anthony Koo
5e7773a219 drm/amd/display: DMCU Compile and Load 
Signed-off-by: Anthony Koo <anthony.koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:12:52 -04:00
Joshua Aberback
4d35b093e6 drm/amd/display: Proper de-allocation of OPP 
- refactor opp_destroy functions to dce common file
  - fixes memory leak, dce specific variations didn't free regamma_params
- remove unused dce110_regamma structure

Signed-off-by: Joshua Aberback <Joshua.Aberback@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:11:42 -04:00
Leon Elazar
b565ff86aa drm/amd/display: Add missing MI masks 
This will fix the memory Input programing with MST tiled display.
This Fix should fix connectivity problems with MST tiled Display

Signed-off-by: Leon Elazar <leon.elazar@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:11:07 -04:00
Zeyu Fan
009432e581 drm/amd/display: Fix missing conditions in hw sequencer. 
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:11:03 -04:00
Tony Cheng
8693049a89 drm/amd/display: rename BGRA8888 to ABGR8888 
DC actually support ABGR8888 instead of BGRA8888 (R/B swap rather than endian swap) ,
rename to avoid confusion

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:11:00 -04:00
Tony Cheng
ab7044d0d1 drm/amd/display: refactor clk_resync to avoid assertion 
- not all DCE has PHYPLLA_PIXCLK_DOUBLE_RATE_ENABLE bit defined.

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:10:52 -04:00
Tony Cheng
a10eadfb15 drm/amd/display: remove SIGNAL_TYPE_WIRELESS 
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:10:31 -04:00
Tony Cheng
6235b23cb9 drm/amd/display: remove hw_crtc_timing 
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:10:23 -04:00
Hersen Wu
721d30cf83 drm/amd/display: No audio output heard from DP panel 
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Eagle Yeh <eagle.yeh@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:09:59 -04:00
Leon Elazar
cc0cb445ae drm/amd/display: Fixing some fallout from dc_target removal 
Also avoid allocating memory dce110_set_output_transfer_func
if not needed

Signed-off-by: Leon Elazar <leon.elazar@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:09:56 -04:00
Yongqiang Sun
624d7c4708 drm/amd/display: Pass visible flag into surface programming 
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:09:37 -04:00
Dave Airlie
7d7024ca20 drm/amd/display: drop min/max wrappers 
These aren't needed, and aren't really used in too many places.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:09:23 -04:00
Yongqiang Sun
546b9b619b drm/amd/display: Don't fail validation for SIGNAL_TYPE_VIRTUAL 
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:08:58 -04:00
Tony Cheng
c87af595c0 drm/amd/display: remove HDMI deep color debug flag 
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:08:55 -04:00
Tony Cheng
e33a18f333 drm/amd/display: fix Infoframe byte 28-31 doesn't get written out to register 
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:08:51 -04:00
Yongqiang Sun
10bff00592 drm/amd/display: Check hdr support before setting. 
In case of programing info frame to
some monitors don't support HDR, it will
result in black screen or corruption when
unplug monitor.
By checking hdr flag to avoid unnecessary
setting for monitors don't support HDR.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:08:47 -04:00