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949 Commits

Author SHA1 Message Date
Evan Quan
272308add5 drm/amd/pm: enable MACO support for SMU 13.0.0 
Enable BAMACO reset support for SMU 13.0.0.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-14 21:38:40 -04:00
Evan Quan
d11737f26f drm/amd/pm: enable UCLK DS feature for SMU 13.0.0 
The feature is ready with latest PMFW and IFWI.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-14 21:38:40 -04:00
Tim Huang
526e6ca5d1 drm/amdgpu/pm: remove the repeated EnableGfxImu message sending 
The EnableGfxImu message will be issued in the set_gfx_power_up_by_imu.

Signed-off-by: Tim Huang <tim.huang@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-14 21:38:39 -04:00
Tim Huang
d52ea3dc65 drm/amdgpu/pm: correct the firmware flag address for SMU IP v13.0.4 
For SMU IP v13.0.4, the smnMP1_FIRMWARE_FLAGS address is different,
we need this to correct the reading address.

Signed-off-by: Tim Huang <tim.huang@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-14 21:38:39 -04:00
Yang Wang
72aeb6ee0c drm/amd/pm: fix driver reload SMC firmware fail issue for smu13 
issue calltrace:
[  402.773695] [drm] failed to load ucode SMC(0x2C)
[  402.773754] [drm] psp gfx command LOAD_IP_FW(0x6) failed and response status is (0x0)
[  402.773762] [drm:psp_load_smu_fw [amdgpu]] *ERROR* PSP load smu failed!
[  402.966758] [drm:psp_v13_0_ring_destroy [amdgpu]] *ERROR* Fail to stop psp ring
[  402.966949] [drm:psp_hw_init [amdgpu]] *ERROR* PSP firmware loading failed
[  402.967116] [drm:amdgpu_device_fw_loading [amdgpu]] *ERROR* hw_init of IP block <psp> failed -22
[  402.967252] amdgpu 0000:03:00.0: amdgpu: amdgpu_device_ip_init failed
[  402.967255] amdgpu 0000:03:00.0: amdgpu: Fatal error during GPU init

if not reset mp1 state during kernel driver unload, it will cause psp
load pmfw fail at the second time.

add PPSMC_MSG_PrepareMp1ForUnload support for smu_v13_0_0/smu_v13_0_7

Signed-off-by: Yang Wang <KevinYang.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-14 21:38:02 -04:00
Kenneth Feng
7fc83cd079 drm/amd/pm: support BAMACO reset on smu_v13_0_7 
support BAMACO reset on smu_v13_0_7, take BAMACO as a subset of BACO
for the low latency, and it only happens on specific platforms.

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-10 15:26:38 -04:00
Kenneth Feng
5d6ec040ab drm/amd/pm: enable gfxoff on smu_v13_0_7 
enable gfxoff on smu_v13_0_7

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-10 15:26:29 -04:00
Kenneth Feng
e3c60b4ef4 drm/amd/pm: update the driver if header for smu_v13_0_7 
update the driver if header for smu_v13_0_7

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-10 15:26:23 -04:00
Kenneth Feng
5b64478339 drm/amd/pm: enable BACO on smu_v13_0_7 
enable BACO on smu_v13_0_7

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-08 11:44:11 -04:00
Kenneth Feng
9e68c38413 drm/amd/pm: add interface to deallocate power_context for smu_v13_0_7 
add interface to deallocate power_context for smu_v13_0_7

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-08 11:44:02 -04:00
Evan Quan
26c763875e drm/amd/pm: drop unneeded dpm features disablement for SMU 13.0.0/7 
PMFW will handle that properly. Driver involvement may cause some
unexpected issues.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-08 11:43:35 -04:00
Evan Quan
da4d45b7da drm/amd/pm: drop redundant declarations 
Drop those redundant declarations in smu_v13_0.h.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-08 11:43:28 -04:00
Evan Quan
d7053e631e drm/amd/pm: enable mode1 reset support for SMU 13.0.0 
Fulfill the interfaces for mode1 reset related.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-08 11:43:19 -04:00
Evan Quan
6f73d67626 drm/amd/pm: optimize the interface for dpm feature status query 
Drop extra CMN2ASIC_MAPPING_FEATURE transform. Also some cosmetic
fixes for better readability.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-08 11:42:44 -04:00
Evan Quan
bb50bba9c6 drm/amd/pm: drop unneeded thermal_controller_type check 
As there is actually no direct dependence between them.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-08 11:42:37 -04:00
Evan Quan
cde83d4748 drm/amd/pm: enable FW CTF feature for SMU 13.0.0 
The new 78.40.0 PMFW has this feature supported.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-08 11:42:29 -04:00
Alex Deucher
7a09f61f8e drm/amdgpu/swsmu: use new register offsets for smu_cmn.c 
Use the per asic offsets so the we don't have to have
asic specific logic in the common code.

Reviewed-by: Luben Tuikov <luben.tuikov@amd.com>
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-03 16:45:00 -04:00
Alex Deucher
da1db031cd drm/amdgpu/swsmu: add SMU mailbox registers in SMU context 
So we can eventaully use them in the common smu code for
accessing the SMU mailboxes without needing a lot of
per asic logic in the common code.

Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-03 16:45:00 -04:00
Alex Deucher
9d6b204176 drm/amdgpu: convert sienna_cichlid_populate_umd_state_clk() to use IP version 
Rather than asic type.

Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-03 16:45:00 -04:00
Huang Rui
7101ab97e3 drm/amdgpu/pm: implement the SMU_MSG_EnableGfxImu function 
GC v11_0_1 asic needs to issue the EnableGfxImu message after start IMU.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Tim Huang <Tim.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-03 16:44:15 -04:00
Huang Rui
8763e4c1a0 drm/amdgpu/pm: update MP v13_0_4 smu message register marco 
Update MP v13_0_4 register macro for SMU message

v2: squash in missed case (Alex)

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Tim Huang <Tim.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-03 16:44:15 -04:00
Stanley.Yang
cbd3e8440e drm/amdgpu: print umc correctable error address 
Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com>
Acked-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-03 16:44:15 -04:00
Stanley.Yang
2f6247dad2 drm/amdgpu/pm: support mca_ceumc_addr in ecctable 
SMU add a new variable mca_ceumc_addr to record
umc correctable error address in EccInfo table,
driver side add EccInfo_V2_t to support this feature

Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-03 16:43:36 -04:00
pengfuyuan
faf26f2b12 drm/amd: Fix spelling typo in comments 
Fix spelling typo in comments.

Reported-by: k2ci <kernel-bot@kylinos.cn>
Signed-off-by: pengfuyuan <pengfuyuan@kylinos.cn>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-03 16:43:36 -04:00
Evan Quan
e309434ac5 drm/amd/pm: enable fclk ds feature for SMU 13.0.0 
The feature is ready with latest 78.39.0 PMFW.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-03 16:43:36 -04:00
Evan Quan
66f5499298 drm/amd/pm: update SMU 13.0.0 driver_if header 
To fit the latest 78.39.0 PMFW.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-03 16:43:36 -04:00
Evan Quan
d5fe83d26d drm/amd/pm: correct the way for retrieving current uclk frequency 
There is some problem with average frequency reading. Thus, we
switch to the target frequency reading instead.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-03 16:43:36 -04:00
Alex Deucher
ab9d97d6f9 drm/amdgpu: convert sienna_cichlid_get_default_config_table_settings() to IP version 
Use IP version rather than asic type.

Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-03 16:43:36 -04:00
Evan Quan
4513edf74c drm/amd/pm: suppress compile warnings about possible unaligned accesses 
Suppress the following compile warnings:
>> drivers/gpu/drm/amd/amdgpu/../pm/swsmu/inc/smu_v11_0_pptable.h:163:17:
warning: field smc_pptable within 'struct smu_11_0_powerplay_table' is
less aligned than 'PPTable_t' and is usually due to 'struct smu_11_0_powerplay_table'
being packed, which can lead to unaligned accesses [-Wunaligned-access]
         PPTable_t smc_pptable;                        //PPTable_t in smu11_driver_if.h
                   ^
   1 warning generated.
--
>> drivers/gpu/drm/amd/amdgpu/../pm/swsmu/inc/smu_v11_0_7_pptable.h:193:17:
warning: field smc_pptable within 'struct smu_11_0_7_powerplay_table' is
less aligned than 'PPTable_t' and is usually due to 'struct smu_11_0_7_powerplay_table'
being packed, which can lead to unaligned accesses [-Wunaligned-access]
         PPTable_t smc_pptable;                        //PPTable_t in smu11_driver_if.h
                   ^
   1 warning generated.
--
>> drivers/gpu/drm/amd/amdgpu/../pm/swsmu/inc/smu_v13_0_pptable.h:161:12:
warning: field smc_pptable within 'struct smu_13_0_powerplay_table' is less aligned than
'PPTable_t' and is usually due to 'struct smu_13_0_powerplay_table' being packed, which
can lead to unaligned accesses [-Wunaligned-access]

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-06-03 16:43:36 -04:00
Lijo Lazar
39dbde650f drm/amd/pm: Return auto perf level, if unsupported 
When powerplay is not enabled, return AUTO as default level.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-26 14:56:33 -04:00
Evan Quan
396beb91a9 drm/amd/pm: correct the metrics version for SMU 11.0.11/12/13 
Correct the metrics version used for SMU 11.0.11/12/13.
Fixes misreported GPU metrics (e.g., fan speed, etc.) depending
on which version of SMU firmware is loaded.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1925
Signed-off-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-26 14:56:33 -04:00
Lijo Lazar
b0f4d663fc drm/amd/pm: Fix missing thermal throttler status 
On aldebaran, when thermal throttling happens due to excessive GPU
temperature, the reason for throttling event is missed in warning
message. This patch fixes it.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-26 14:56:32 -04:00
Dan Carpenter
2c270d3e71 drm/amdgpu/pm: smu_v13_0_4: delete duplicate condition 
There is no need to check if "clock_ranges' is non-NULL.  It is checked
already on the line before.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-26 14:56:32 -04:00
Evan Quan
3670c46f07 drm/amd/pm: enable memory temp reading for SMU 13.0.0 
With the latest vbios, the memory temp reading is working.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-26 14:56:32 -04:00
Evan Quan
0aceb728f4 drm/amd/pm: enable more dpm features for SMU 13.0.0 
Enable OOB Monitor and SOC CG which are ready since 78.38.0.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-26 14:56:32 -04:00
Evan Quan
6fd693817d drm/amd/pm: correct the softpptable ids used for SMU 13.0.0 
To better match with the pptable_id settings from VBIOS.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-26 14:56:32 -04:00
Evan Quan
1c65e54881 drm/amd/pm: update SMU 13.0.0 driver_if header 
To align with 78.37.0 and later PMFWs.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-26 14:56:31 -04:00
Evan Quan
704d6bf605 drm/amd/pm: skip dpm disablement on suspend for SMU 13.0.0 
Since PMFW will handle this properly. Driver involvement is
unnecessary.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-26 14:56:31 -04:00
Evan Quan
72063c71c3 drm/amd/pm: enable more dpm features for SMU 13.0.0 
Enable MP0CLK DPM and FW Dstate since they are already supported
by latest 78.36.0 PMFW.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-26 14:56:31 -04:00
Gong Yuanjun
d2f4460a3d drm/amd/pm: fix a potential gpu_metrics_table memory leak 
gpu_metrics_table is allocated in yellow_carp_init_smc_tables() but
not freed in yellow_carp_fini_smc_tables().

Signed-off-by: Gong Yuanjun <ruc_gongyuanjun@163.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-26 14:56:31 -04:00
Sathishkumar S
494c143254 drm/amd/pm: consistent approach for smartshift 
create smartshift sysfs attributes from dGPU device even
on smartshift 1.0 platform to be consistent. Do not populate
the attributes on platforms that have APU only but not dGPU
or vice versa.

V2:
 avoid checking for the number of VGA/DISPLAY devices (Lijo)
 move code to read from dGPU or APU into a function and reuse (Lijo)

Suggested-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-16 14:20:55 -04:00
Hans de Goede
4b9caaa028 drm/amdgpu: Move mutex_init(&smu->message_lock) to smu_early_init() 
Lockdep complains about the smu->message_lock mutex being used before
it is initialized through the following call path:

amdgpu_device_init()
 amdgpu_dpm_mode2_reset()
  smu_mode2_reset()
   smu_v12_0_mode2_reset()
    smu_cmn_send_smc_msg_with_param()

Move the mutex_init() call to smu_early_init() to fix the mutex being
used before it is initialized.

This fixes the following lockdep splat:

[    3.867331] ------------[ cut here ]------------
[    3.867335] fbcon: Taking over console
[    3.867338] DEBUG_LOCKS_WARN_ON(lock->magic != lock)
[    3.867340] WARNING: CPU: 14 PID: 491 at kernel/locking/mutex.c:579 __mutex_lock+0x44c/0x830
[    3.867349] Modules linked in: amdgpu(+) crct10dif_pclmul drm_ttm_helper crc32_pclmul ttm crc32c_intel ghash_clmulni_intel hid_lg_g15 iommu_v2 sp5100_tco nvme gpu_sched drm_dp_helper nvme_core ccp wmi video hid_logitech_dj ip6_tables ip_tables ipmi_devintf ipmi_msghandler fuse i2c_dev
[    3.867363] CPU: 14 PID: 491 Comm: systemd-udevd Tainted: G          I       5.18.0-rc5+ #33
[    3.867366] Hardware name: Micro-Star International Co., Ltd. MS-7C95/B550M PRO-VDH WIFI (MS-7C95), BIOS 2.90 12/23/2021
[    3.867369] RIP: 0010:__mutex_lock+0x44c/0x830
[    3.867372] Code: ff 85 c0 0f 84 33 fc ff ff 8b 0d b7 50 25 01 85 c9 0f 85 25 fc ff ff 48 c7 c6 fb 41 82 99 48 c7 c7 6b 63 80 99 e8 88 2a f8 ff <0f> 0b e9 0b fc ff ff f6 83 b9 0c 00 00 01 0f 85 64 ff ff ff 4c 89
[    3.867377] RSP: 0018:ffffaef8c0fc79f0 EFLAGS: 00010286
[    3.867380] RAX: 0000000000000028 RBX: 0000000000000000 RCX: 0000000000000027
[    3.867382] RDX: ffff9ccc0dda0928 RSI: 0000000000000001 RDI: ffff9ccc0dda0920
[    3.867384] RBP: ffffaef8c0fc7a80 R08: 0000000000000000 R09: ffffaef8c0fc7820
[    3.867386] R10: 0000000000000003 R11: ffff9ccc2a2fffe8 R12: 0000000000000002
[    3.867388] R13: ffff9cc990808058 R14: 0000000000000000 R15: ffff9cc98bfc0000
[    3.867390] FS:  00007fc4d830f580(0000) GS:ffff9ccc0dd80000(0000) knlGS:0000000000000000
[    3.867394] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[    3.867396] CR2: 0000560a77031410 CR3: 000000010f522000 CR4: 0000000000750ee0
[    3.867398] PKRU: 55555554
[    3.867399] Call Trace:
[    3.867401]  <TASK>
[    3.867403]  ? smu_cmn_send_smc_msg_with_param+0x98/0x240 [amdgpu]
[    3.867533]  ? __mutex_lock+0x90/0x830
[    3.867535]  ? amdgpu_dpm_mode2_reset+0x37/0x60 [amdgpu]
[    3.867653]  ? smu_cmn_send_smc_msg_with_param+0x98/0x240 [amdgpu]
[    3.867758]  smu_cmn_send_smc_msg_with_param+0x98/0x240 [amdgpu]
[    3.867857]  smu_mode2_reset+0x2b/0x50 [amdgpu]
[    3.867953]  amdgpu_dpm_mode2_reset+0x46/0x60 [amdgpu]
[    3.868096]  amdgpu_device_init.cold+0x1069/0x1e78 [amdgpu]
[    3.868219]  ? _raw_spin_unlock_irqrestore+0x30/0x50
[    3.868222]  ? pci_conf1_read+0x9b/0xf0
[    3.868226]  amdgpu_driver_load_kms+0x15/0x110 [amdgpu]
[    3.868314]  amdgpu_pci_probe+0x1a9/0x3c0 [amdgpu]
[    3.868398]  local_pci_probe+0x41/0x80
[    3.868401]  pci_device_probe+0xab/0x200
[    3.868404]  really_probe+0x1a1/0x370
[    3.868407]  __driver_probe_device+0xfc/0x170
[    3.868410]  driver_probe_device+0x1f/0x90
[    3.868412]  __driver_attach+0xbf/0x1a0
[    3.868414]  ? __device_attach_driver+0xe0/0xe0
[    3.868416]  bus_for_each_dev+0x65/0x90
[    3.868419]  bus_add_driver+0x151/0x1f0
[    3.868421]  driver_register+0x89/0xd0
[    3.868423]  ? 0xffffffffc0bd4000
[    3.868425]  do_one_initcall+0x5d/0x300
[    3.868428]  ? do_init_module+0x22/0x240
[    3.868431]  ? rcu_read_lock_sched_held+0x3c/0x70
[    3.868434]  ? trace_kmalloc+0x30/0xe0
[    3.868437]  ? kmem_cache_alloc_trace+0x1e6/0x3a0
[    3.868440]  do_init_module+0x4a/0x240
[    3.868442]  __do_sys_finit_module+0x93/0xf0
[    3.868446]  do_syscall_64+0x5b/0x80
[    3.868449]  ? rcu_read_lock_sched_held+0x3c/0x70
[    3.868451]  ? lockdep_hardirqs_on_prepare+0xd9/0x180
[    3.868454]  ? do_syscall_64+0x67/0x80
[    3.868456]  ? do_syscall_64+0x67/0x80
[    3.868458]  ? do_syscall_64+0x67/0x80
[    3.868460]  ? do_syscall_64+0x67/0x80
[    3.868462]  entry_SYSCALL_64_after_hwframe+0x44/0xae
[    3.868465] RIP: 0033:0x7fc4d8ec1ced
[    3.868467] Code: 5d c3 66 2e 0f 1f 84 00 00 00 00 00 90 f3 0f 1e fa 48 89 f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d fb 70 0e 00 f7 d8 64 89 01 48
[    3.868472] RSP: 002b:00007fff687ae6b8 EFLAGS: 00000246 ORIG_RAX: 0000000000000139
[    3.868475] RAX: ffffffffffffffda RBX: 0000560a76fbca60 RCX: 00007fc4d8ec1ced
[    3.868477] RDX: 0000000000000000 RSI: 00007fc4d902343c RDI: 0000000000000011
[    3.868479] RBP: 00007fc4d902343c R08: 0000000000000000 R09: 0000560a76fb59c0
[    3.868481] R10: 0000000000000011 R11: 0000000000000246 R12: 0000000000020000
[    3.868484] R13: 0000560a76f8bfd0 R14: 0000000000000000 R15: 0000560a76fc2d10
[    3.868487]  </TASK>
[    3.868489] irq event stamp: 120617
[    3.868490] hardirqs last  enabled at (120617): [<ffffffff9817169e>] __up_console_sem+0x5e/0x70
[    3.868494] hardirqs last disabled at (120616): [<ffffffff98171683>] __up_console_sem+0x43/0x70
[    3.868497] softirqs last  enabled at (119684): [<ffffffff980ee83a>] __irq_exit_rcu+0xca/0x100
[    3.868501] softirqs last disabled at (119679): [<ffffffff980ee83a>] __irq_exit_rcu+0xca/0x100
[    3.868504] ---[ end trace 0000000000000000 ]---

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-16 10:02:58 -04:00
Tim Huang
33ef11cd7c drm/amdgpu/pm: add GFXOFF control IP version check for SMU IP v13.0.4 
Enable the SMU IP v13.0.4 GFXOFF control

Signed-off-by: Tim Huang <tim.huang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-16 10:02:58 -04:00
Tim Huang
17f78bb409 drm/amdgpu/pm: enable swsmu for SMU IP v13.0.4 
Add the entry to set the ppt functions for SMU IP v13.0.4.

Signed-off-by: Tim Huang <tim.huang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-16 10:02:57 -04:00
Tim Huang
55c894945b drm/amdgpu/pm: add swsmu ppt implementation for SMU IP v13.0.4 
Add swsmu ppt files for SMU IP v13.0.4.

Signed-off-by: Tim Huang <tim.huang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-16 10:02:57 -04:00
Tim Huang
a0219175b3 drm/amdgpu/pm: add some common ppt functions for SMU IP v13.0.x 
Add some common ppt functions that will be used by SMU IP v13.0.x
and drop the not used function smu_v13_0_mode2_reset.

Signed-off-by: Tim Huang <tim.huang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-16 10:02:57 -04:00
Tim Huang
563cb2d82f drm/amdgpu/pm: add EnableGfxImu message dummy map for SMU IP v13.0.4 
The SMU needs this message to trigger IMU initialization.

Signed-off-by: Tim Huang <tim.huang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-16 10:02:57 -04:00
Huang Rui
6384d44bc4 drm/amdgpu/pm: add smu v13.0.4 driver SMU if headers 
Add smu v13.0.4 driver SMU interface headers.

v2: squash in the header updates (Alex)

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Tim Huang <Tim.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-16 10:02:57 -04:00
Sathishkumar S
cdf4c8ec39 drm/amd/pm: update smartshift powerboost calc for smu13 
smartshift apu and dgpu power boost are reported as percentage
with respect to their power limits. adjust the units of power before
calculating the percentage of boost.

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-16 10:02:57 -04:00
Sathishkumar S
138292f1dc drm/amd/pm: update smartshift powerboost calc for smu12 
smartshift apu and dgpu power boost are reported as percentage with
respect to their power limits. This value[0-100] reflects the boost
for the respective device.

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-16 10:02:57 -04:00